Intel® G31/P31 Express Chipset

Document Number: 317497-002

Intel® G31/P31 Express Chipset Thermal and Mechanical Design Guidelines

— For the Intel® 82G31 Graphics and Memory Controller Hub (GMCH) and Intel® 82P31 Memory Controller Hub (MCH)

October 2007

2 Thermal and Mechanical Design Guidelines

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining applications.

Intel may make changes to specifications and product descriptions at any time, without notice.

Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

The Intel® G31 and P31 Express Chipsets may contain design defects or errors known as errata, which may cause the product to deviate from published specifications. Current characterized errata are available on request.

Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.

Intel, Pentium, Intel Core, Intel Inside, and the Intel logo are trademarks of Intel Corporation in the U.S. and other countries.

*Other names and brands may be claimed as the property of others.

Copyright ©2007 Intel Corporation

Thermal and Mechanical Design Guidelines 3

Contents 1 Introduction .....................................................................................................7

1.1 Terminology ..........................................................................................8 1.2 Reference Documents .............................................................................9

2 Product Specifications......................................................................................11 2.1 Package Description..............................................................................11

2.1.1 Non-Grid Array Package Ball Placement ......................................11 2.2 Package Loading Specifications...............................................................12 2.3 Thermal Specifications ..........................................................................13

2.3.1 Thermal Design Power (TDP) ....................................................13 2.3.1.1 Definition ................................................................13

2.3.2 TDP Prediction Methodology......................................................14 2.3.2.1 Pre-Silicon ...............................................................14 2.3.2.2 Post-Silicon..............................................................14

2.3.3 Thermal Specifications .............................................................14 2.4 Non-Critical to Function Solder Balls........................................................15

3 Thermal Metrology ..........................................................................................17 3.1 Case Temperature Measurements ...........................................................17

3.1.1 Thermocouple Attach Methodology.............................................17 3.2 Airflow Characterization ........................................................................19 3.3 Thermal Mechanical Test Vehicle ............................................................20

4 Reference Thermal Solution..............................................................................21 4.1 Operating Environment .........................................................................21

4.1.1 ATX Form Factor Operating Environment ....................................21 4.1.2 Balanced Technology Extended (BTX) Form Factor Operating

Environment...........................................................................23 4.2 Reference Design Mechanical Envelope ....................................................25 4.3 Thermal Solution Assembly....................................................................25 4.4 Environmental Reliability Requirements ...................................................27

Appendix A Enabled Suppliers ...........................................................................................29

Appendix B Mechanical Drawings .......................................................................................31


Figures

Figure 1. (G)MCH Non-Grid Array......................................................................12 Figure 2. Package Height .................................................................................13 Figure 3. Non-Critical to Function Solder Balls .....................................................16 Figure 4. 0° Angle Attach Methodology (top view, not to scale) .............................18 Figure 5. 0° Angle Attach Heatsink Modifications (generic heatsink side and

bottom view shown, not to scale) ........................................................18 Figure 6. Airflow and Temperature Measurement Locations...................................19 Figure 10. ATX Boundary Conditions ..................................................................22 Figure 11. Side View of ATX Boundary Conditions ................................................22 Figure 12. Processor Heatsink Orientation to Provide Airflow to (G)MCH

Heatsink on an ATX Platform..............................................................23 Figure 13. Processor Heatsink Orientation to Provide Airflow to (G)MCH Heatsink

on a Balanced Technology Extended (BTX) Platform .............................24 Figure 14. Design Concept for ATX (G)MCH Heatsink - Installed on Board ...............26 Figure 15. Design Concept for Balanced Technology Extended (BTX) (G)MCH

Heatsink Design - Installed on Board...................................................26 Figure 18. Intel® G31, P31 Express Chipset Package Drawing................................32 Figure 19. Intel® G31, P31 Express Chipset Component Keep-Out Restrictions

for ATX Platforms .............................................................................33 Figure 20. Intel® G31, P31 Express Chipset Component Keep-Out Restrictions

for Balanced Technology Extended (BTX) Platforms ...............................34 Figure 21. Intel® G31, P31 Express Chipset Reference Heatsink for

ATX Platforms – Sheet 1 ...................................................................35 Figure 22. Intel® G31, P31 Express Chipset Reference Heatsink for ATX

Platforms – Sheet 2..........................................................................36 Figure 23. Intel® G31, P31 Express Chipset Reference Heatsink for ATX

Platforms – Anchor ..........................................................................37 Figure 24. Intel® G31, P31 Express Chipset Reference Heatsink for ATX

Platforms – Ramp Retainer Sheet 1....................................................38 Figure 25. Intel® G31, P31 Express Chipset Reference Heatsink for ATX

Platforms – Ramp Retainer Sheet 2.....................................................39 Figure 26. Intel® G31, P31 Express Chipset Reference Heatsink for ATX

Platforms – Wire Preload Clip .............................................................40 Figure 27. Intel® G31, P31 Express Chipset Reference Heatsink for Balanced

Technology Extended (BTX) Platforms .................................................41 Figure 28. Intel® G31, P31 Express Chipset Reference Heatsink for Balanced

Technology Extended (BTX) Platforms – Clip ........................................42


Tables Table 1. Package Loading Specifications............................................................13 Table 2. Thermal Specifications .......................................................................15 Table 5. Projected Chassis Conditions by Case.....................................................24 Table 6. ATX Reference Thermal Solution Environmental Reliability Requirements

(Board Level) ....................................................................................27 Table 7. Balanced Technology Extended (BTX) Reference Thermal Solution

Environmental Reliability Requirements (System Level) ..........................28 Table 8. ATX Intel Reference Heatsink Enabled Suppliers for the (G)MCH...............29 Table 9. BTX Intel Reference Heatsink Enabled Suppliers for the (G)MCH...............29 Table 10. Supplier Contact Information ..............................................................30

§


Revision History

Revision Number

Description Date

-001 • Initial Release July 2007

-002 • Updated TC-MAX specification October 2007

§

Introduction


1 Introduction

As the complexity of computer systems increases, so do power dissipation requirements. The additional power of next generation systems must be properly dissipated. Heat can be dissipated using improved system cooling, selective use of ducting, and/or passive heatsinks.

The objective of thermal management is to ensure that the temperatures of all components in a system are maintained within functional limits. The functional temperature limit is the range within which the electrical circuits can be expected to meet specified performance requirements. Operation outside the functional limit can degrade system performance, cause logic errors, or cause component and/or system damage. Temperatures exceeding the maximum operating limits may result in irreversible changes in the operating characteristics of the component.

This document is for the following devices:

• Intel® G31 Express Chipset GMCH (82G31 GMCH)

• Intel® P31 Express Chipset MCH (82P31 MCH)

This document presents the conditions and requirements to properly design a cooling solution for systems that implement the (G)MCH. Properly designed solutions provide adequate cooling to maintain the (G)MCH case temperature at or below thermal specifications. This is accomplished by providing a low local-ambient temperature, ensuring adequate local airflow, and minimizing the case to local-ambient thermal resistance. By maintaining the (G)MCH case temperature at or below those recommended in this document, a system designer can ensure the proper functionality, performance, and reliability of this component.

Note: Unless otherwise specified the information in this document applies to all configurations of Intel® G31 and P31 Express Chipset. The Intel® 82G31 GMCH will be available with integrated graphics and associated SDVO and analog display ports. In this document the integrated graphics version and may be referred to as GMCH. In addition a version (82P31 MCH) will be offered using discrete graphics and is referred to as the MCH. The term (G)MCH is used to when referring to all configurations.

Note: The (G)MCH is targeted for use with the Intel® Core™2 Duo processor family in the LGA775 Land Grid Array Package and the Intel ICH7 in desktop platforms.

Note: In this document the use of the term chipset refers to the combination of the (G)MCH and the Intel ICH7. For ICH7 thermal details, refer to the Intel® I/O Controller Hub 7 (ICH7) Thermal Design Guidelines.

Introduction


1.1 Terminology

Term Description

FC-BGA Flip Chip Ball Grid Array. A package type defined by a plastic substrate where a die is mounted using an underfill C4 (Controlled Collapse Chip Connection) attach style. The primary electrical interface is an array of solder balls attached to the substrate opposite the die. Note that the device arrives at the customer with solder balls attached.

Intel ICH7 Intel® I/O Controller Hub 7. The chipset component that contains the primary PCI interface, LPC interface, USB, ATA, and/or other legacy functions.

GMCH Graphic Memory Controller Hub. The chipset component that contains the processor and memory interface and integrated graphics core.

TA The local ambient air temperature at the component of interest. The ambient temperature should be measured just upstream of airflow for a passive heatsink or at the fan inlet for an active heatsink.

TC The case temperature of the (G)MCH component. The measurement is made at the geometric center of the die.

TC-MAX The maximum value of TC.

TC-MIN The minimum valued of TC.

TDP Thermal Design Power is specified as the maximum sustainable power to be dissipated by the (G)MCH. This is based on extrapolations in both hardware and software technology. Thermal solutions should be designed to TDP.

TIM Thermal Interface Material: thermally conductive material installed between two surfaces to improve heat transfer and reduce interface contact resistance.

ΨCA Case-to-ambient thermal solution characterization parameter (Psi). A measure of thermal solution performance using total package power. Defined as (TC – TA) / Total Package Power. Heat source size should always be specified for Ψ measurements.

Introduction


1.2 Reference Documents

Document Location

Intel® G31/P31 Express Chipset Datasheet http://www.intel.com /design/chipsets/datashts/317495.htm

Intel® I/O Controller Hub 7 (ICH7) Thermal Design Guidelines

http://developer.intel.com//design/chipsets/designex/307015.htm

Balanced Technology Extended (BTX) Interface Specification

http://www.formfactors.org

Various System Thermal Design Suggestions http://www.formfactors.org

Various Chassis Thermal and Mechanical Design Suggestion

http://www.formfactors.org

§

http://www.intel.com/

http://www.formfactors.org/



Introduction


Product Specifications


2 Product Specifications

2.1 Package Description

The (G)MCH is available in a 34 mm [1.34 in] x 34 mm [1.34 in] Flip Chip Ball Grid Array (FC-BGA) package with 1226 solder balls. The die size is currently 10.41 mm [0.410 in] x 10.41 mm [0.410 in] and is subject to change. A mechanical drawing of the package is shown in Figure 13, Appendix B.

2.1.1 Non-Grid Array Package Ball Placement

The (G)MCH package uses a “balls anywhere” concept. Minimum ball pitch is 0.8 mm [0.031 in], but ball ordering does not follow a 0.8 mm grid. Board designers should ensure correct ball placement when designing for the non-grid array pattern.



Figure 1. (G)MCH Non-Grid Array

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Non-standard grid ball pattern. Minimum Pitch 0.8mm [0.31 in]

2.2 Package Loading Specifications

Table 1 provides static load specifications for the package. This mechanical maximum load limit should not be exceeded during heatsink assembly, shipping conditions, or standard use conditions. Also, any mechanical system or component testing should not exceed the maximum limit. The package substrate should not be used as a mechanical reference or load-bearing surface for the thermal and mechanical solution.



Table 1. Package Loading Specifications

Parameter Maximum Notes

Static 15 lbf 1,2,3

NOTES: 1. These specifications apply to uniform compressive loading in a direction normal to the

package. 2. This is the maximum force that can be applied by a heatsink retention clip. The clip

must also provide the minimum specified load on the package. 3. These specifications are based on limited testing for design characterization. Loading

limits are for the package only.

To ensure the package static load limit is not exceeded, the designer should understand the post reflow package height. Figure 2 shows the nominal post-reflow package height assumed for calculation of a heatsink clip preload of the reference design. Refer to the package drawing in Appendix B to perform a detailed analysis.

Figure 2. Package Height

PCB

2.38 mm

Solder Ball

Top of (G)MCH

2.3 Thermal Specifications

To ensure proper operation and reliability of the (G)MCH , the case temperature must be at or below the maximum value specified in Table 2. System and component level thermal enhancements are required to dissipate the heat generated and maintain the (G)MCH within specifications. Chapter 3 provides the thermal metrology guidelines for case temperature measurements.

2.3.1 Thermal Design Power (TDP)

2.3.1.1 Definition

Thermal design power (TDP) is the estimated power dissipation of the (G)MCH based on normal operating conditions including VCC and TC-MAX while executing real worst-case power intensive applications. This value is based on expected worst-case data traffic patterns and usage of the chipset and does not represent a specific software application. TDP attempts to account for expected increases in power due to variation in (G)MCH current consumption due to silicon process variation, processor speed, DRAM capacitive bus loading and temperature. However, since these variations are subject to change, there is no assurance that all applications will not exceed the TDP value.



The system designer must design a thermal solution for the (G)MCH such that it maintains TC below TC-MAX for a sustained power level equal to TDP. Note that the TC-MAX specification is a requirement for a sustained power level equal to TDP, and that the case temperature must be maintained at temperatures less than TC-MAX when operating at power levels less than TDP. This temperature compliance is to ensure component reliability. The TDP value can be used for thermal design if the thermal protection mechanisms are enabled. The (G)MCH incorporate a hardware-based fail-safe mechanism to keep the product temperature in spec in the event of unusually strenuous usage above the TDP power.

2.3.2 TDP Prediction Methodology

2.3.2.1 Pre-Silicon

In order to determine TDP for pre-silicon products in development, it is necessary to make estimates based on analytical models. These models rely on knowledge of the past (G)MCH power dissipation behavior along with knowledge of planned architectural and process changes that may affect TDP. Knowledge of applications available today and their ability to stress various aspects of the (G)MCH is also included in the model. The projection for TDP assumes (G)MCH operation at TC-MAX. The TDP estimate also accounts for normal manufacturing process variation.

2.3.2.2 Post-Silicon

Once the product silicon is available, post-silicon validation is performed to assess the validity of pre-silicon projections. Testing is performed on both commercially available and synthetic high power applications and power data is compared to pre-silicon estimates. Post-silicon validation may result in a small adjustment to pre-silicon TDP estimates.

2.3.3 Thermal Specifications

The data in Table 2 is based on post-silicon power measurements for the (G)MCH. The TDP values are based on system configuration with one (1) DIMM per channel, DDR2 and the FSB operating at the top speed allowed by the chipset with a processor operating at that system bus speed. Intel recommends designing the (G)MCH thermal solution to the highest system bus speed and memory frequency for maximum flexibility and reuse. The (G)MCH packages have poor heat transfer capability into the board and have minimal thermal capability without thermal solutions. Intel requires that system designers plan for an attached heatsink when using the (G)MCH.



Table 2. Thermal Specifications

Component System Bus

Speed

Memory Frequency

Max Idle Power

TDP TC-MIN TC-MAX Notes

Intel® G31 Express Chipset

1066 MT/s 800 MT/s 7.4 W 15.5 W 0 °C 106 °C

1,2,3,4,5

Intel® P31 Express Chipset

1066 MT/s 800 MT/s 7.6 W 15.5 W 0 °C 106 °C

1,2,3,4

NOTES: 1. Thermal specifications assume an attached heatsink is present. 2. Max Idle power is the worst case idle power in the system booted to Windows* with no

background applications running. 3. For Intel® G31/P31 Express Chipset TDP and Max Idle power are measured with DDR2

with 2 channels, 1 DIMM per channel. 4. Max Idle data is measured on Intel® G31 and P31 Express Chipset assumed no C2 /

ASPM enabled. 5. When an external graphics card is installed in a system with the Intel® G31 the TDP for

this part will assume the worst possible PCIe design and consume as much as P31 TDP (15.5 W).

2.4 Non-Critical to Function Solder Balls

Intel has defined selected solder joints of the (G)MCH as non-critical to function (NCTF) when evaluating package solder joints post environmental testing. The (G)MCH signals at NCTF locations are typically redundant ground or non-critical reserved, so the loss of the solder joint continuity at end of life conditions will not affect the overall product functionality. Figure 3 identifies the NCTF solder joints of the (G)MCH package.



Figure 3. Non-Critical to Function Solder Balls

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§

Thermal Metrology


3 Thermal Metrology

The system designer must measure temperatures in order to accurately determine the thermal performance of the system. Intel has established guidelines for proper techniques of measuring (G)MCH component case temperatures.

3.1 Case Temperature Measurements

To ensure functionality and reliability of the (G)MCH the TC must be maintained at or below the maximum temperature listed in Table 2. The surface temperature measured at the geometric center of the die corresponds to TC. Measuring TC requires special care to ensure an accurate temperature reading.

Temperature differences between the temperature of a surface and the surrounding local ambient air can introduce error in the measurements. The measurement errors could be due to a poor thermal contact between the thermocouple bead and the surface of the package, heat loss by radiation and/or convection, conduction through thermocouple leads, or contact between the thermocouple cement and the heatsink base (if a heatsink is used). To minimize these measurement errors a thermocouple attach with a zero-degree methodology is recommended.

3.1.1 Thermocouple Attach Methodology 1. Mill a 3.3 mm [0.13 in] diameter hole centered on bottom of the heatsink base.

The milled hole should be approximately 1.5 mm [0.06 in] deep.

2. Mill a 1.3 mm [0.05 in] wide slot, 0.5 mm [0.02 in] deep, from the centered hole to one edge of the heatsink. The slot should be in the direction parallel to the heatsink fins (see Figure 5).

3. Attach thermal interface material (TIM) to the bottom of the heatsink base.

4. Cut out portions of the TIM to make room for the thermocouple wire and bead. The cutouts should match the slot and hole milled into the heatsink base.

5. Attach a 36 gauge or smaller K-type thermocouple bead to the center of the top surface of the die using a cement with high thermal conductivity. During this step, make sure no contact is present between the thermocouple cement and the heatsink base because any contact will affect the thermocouple reading. It is critical that the thermocouple bead makes contact with the die (see Figure 4).

6. Attach heatsink assembly to the (G)MCH, and route thermocouple wires out through the milled slot.

Thermal Metrology


Figure 4. 0° Angle Attach Methodology (top view, not to scale)

Figure 5. 0° Angle Attach Heatsink Modifications (generic heatsink side and bottom view shown, not to scale)

Thermal Metrology


3.2 Airflow Characterization

Figure 6 describes the recommended location for air temperature measurements measured relative to the component. For a more accurate measurement of the average approach air temperature, Intel recommends averaging temperatures recorded from two thermocouples spaced about 25 mm [1.0 in] apart. Locations for both a single thermocouple and a pair of thermocouples are presented.

Figure 6. Airflow and Temperature Measurement Locations

Airflow velocity can be measured using sensors that combine air velocity and temperature measurements. Typical airflow sensor technology may include hot wire anemometers. Figure 6 provides guidance for airflow velocity measurement locations which should be the same as used for temperature measurement. These locations are for a typical JEDEC test setup and may not be compatible with chassis layouts due to the proximity of the processor to the (G)MCH. The user may have to adjust the locations for a specific chassis. Be aware that sensors may need to be aligned perpendicular to the airflow velocity vector or an inaccurate measurement may result. Measurements should be taken with the chassis fully sealed in its operational configuration to achieve a representative airflow profile within the chassis.

Thermal Metrology


3.3 Thermal Mechanical Test Vehicle

A Thermal Mechanical Test Vehicle (TMTV) is available for early thermal testing prior to the availability of actual silicon. The TMTV contains a heater die and can be powered up to a desired power level to simulate the heating of a (G)MCH package. The TMTV also contains daisy chain functionality and can be used for mechanical testing. The TMTV needs to be surface mounted to a custom board designed to provide connectivity to the die heater and/or daisy chain depending on the needs of the user. The package ball connections are provided so the user may design and build a board to interface with the TMTV. Note that although the TMTV is designed to closely match the (G)MCH package mechanical form and fit, it is recommended that final validation be performed with actual production silicon. The TMTV mechanical features, including die size, ball count, etc., may not reflect those of the final production package.

§

Reference Thermal Solution


4 Reference Thermal Solution

The design strategy for the reference thermal solution for the (G)MCH for use in ATX platforms reuses the ramp retainer and MB anchors from the Intel® G965 Express Chipset thermal solution. The extrusion design and a wire preload clip requirements are being evaluated for changes necessary to meet the (G)MCH thermal requirements. The thermal interface material and keep out zone remains the same as used with the Intel G965 Express Chipset, see Figure 14.

The BTX reference design for the (G)MCH will be similar to the Intel® G965 Express Chipset thermal solution. The thermal interface material, extrusion design and a wire preload clip requirements are being evaluated for changes necessary to meet the (G)MCH thermal requirements. The keep out zone remains the same as used with the Intel® G965 Express Chipset, see Figure 15.

This chapter provides detailed information on operating environment assumptions, heatsink manufacturing, and mechanical reliability requirements for the (G)MCH.

4.1 Operating Environment

The operating environment of the (G)MCH will differ depending on system configuration and motherboard layout. This section defines operating environment boundary conditions that are typical for ATX and BTX form factors. The system designer should perform analysis in the expected platform operating environment to assess impact on thermal solution selection.

4.1.1 ATX Form Factor Operating Environment

In ATX platforms, an airflow speed of 1.21 m/s [240lfm] is assumed to be approaching the heatsink at a 30° angle from the processor thermal solution, see Figure 7 and Figure 8 for more details. The local ambient air temperature, TA,, at the (G)MCH heatsink in an ATX platform is assumed to be 45.6°C for the (G)MCH. The airflow assumed above can be achieved by using a processor heatsink providing omni directional airflow, such as a radial fin or “X” pattern heatsink. Such a heatsink can deliver airflow to both the (G)MCH and other areas like the voltage regulator, as shown in Figure 9. In addition, (G)MCH board placement should ensure that the (G)MCH heatsink is within the air exhaust area of the processor heatsink.

Note that heatsink orientation alone does not guarantee that airflow speed will be achieved. The system integrator should use analytical or experimental means to determine whether a system design provides adequate airflow speed for a particular (G)MCH heatsink.

The thermal designer must carefully select the location to measure airflow to get a representative sampling. ATX platforms need to be designed for the worst-case thermal environment, typically assumed to be 35 °C ambient temperature external to the system measured at sea level.



Figure 7. ATX Boundary Conditions

Figure 8. Side View of ATX Boundary Conditions



Figure 9. Processor Heatsink Orientation to Provide Airflow to (G)MCH Heatsink on an ATX Platform

Other methods exist for providing airflow to the (G)MCH heatsink, including the use of system fans and/or ducting, or the use of an attached fan (active heatsink).

4.1.2 Balanced Technology Extended (BTX) Form Factor Operating Environment

This section provides operating environment conditions based on what has been exhibited on the Intel micro-BTX reference design. On a BTX platform, the (G)MCH obtains in-line airflow directly from the processor thermal module. Since the processor thermal module provides lower inlet temperature airflow to the processor, reduced inlet ambient temperatures are also often seen at the (G)MCH as compared to ATX. An example of how airflow is delivered to the (G)MCH on a BTX platform is shown in Figure 10.

A set of three system level boundary conditions will be established to determine (G)MCH thermal solution requirement.

• Low external ambient (23°C)/ idle power for the components (Case 3). This covers the system idle acoustic condition.

• Low external ambient (23°C)/ TDP for the components (Case 2). The TMA fan speed is limited by the thermistor in the fan hub.

• High ambient (35°C)/ TDP for the components (Case 1). This covers the maximum TMA fan speed condition.



In addition to the 3 cases listed above the analysis considered both microtower and 3”-thick ePC chassis configurations to determine the worst case: The values in Table 3 correspond to the ePC configuration. For more details on the TMA airflow set points, refer to the Balanced Technology Extended (BTX) System Design Guide.

Table 3. Projected Chassis Conditions by Case

TA into (G)MCH heatsink (°C)

Airflow into the (G)MCH heatsink

(LFM)

Case 1 45.2 139

Case 2 42.0 68.8

Case 3 34.7 32.4

NOTES: 1. For all cases a thermal solution is required on the (G)MCH. 2. These values are supplied based on final design review.

The customer should analyze their system design to verify their applicable boundary conditions prior to design. The thermal designer must carefully select the location to measure airflow to get a representative sampling. BTX platforms need to be designed for the worst-case thermal environment, typically assumed to be 35 °C ambient temperature external to the system measured at sea level.

Note: The local ambient air temperature is a projection based on the power on a 2007 platform, processor TDP up to 65 W, and is subject to change in the next revision of this document.

Note: The risk of the solder ball fracture can be minimized with good chassis structure design on a BTX platform, refer to the Balanced Technology Extended (BTX) Chassis Design Guide (or Balanced Technology Extended (BTX) System Design Guide) for detail chassis mechanical design.

Figure 10. Processor Heatsink Orientation to Provide Airflow to (G)MCH Heatsink on a Balanced Technology Extended (BTX) Platform



4.2 Reference Design Mechanical Envelope

The motherboard component keep-out restrictions for the (G)MCH on an ATX platform are included in Appendix B, Figure 14. The motherboard component keep-out restrictions for the (G)MCH on a BTX platform are included in Appendix B, Figure 15.

4.3 Thermal Solution Assembly

The reference thermal solution for the (G)MCH for an ATX chassis is shown in Figure 11 and is an aluminum extruded heatsink that uses two ramp retainers, a wire preload clip, and four motherboard anchors. Refer to Appendix B for the mechanical drawings. The heatsink is attached to the motherboard by assembling the anchors into the board, placing the heatsink, with the wire preload clip over the (G)MCH and anchors at each of the corners, and securing the plastic ramp retainers through the anchor loops before snapping each retainer into the fin gap. Leave the wire preload clip loose in the extrusion during the wave solder process. The assembly is then sent through the wave process. Post wave, the wire preload clip is snapped into place on the hooks located on each of the ramp retainers. The clip provides the mechanical preload to the package. This mechanical preload is necessary to provide both sufficient pressure to minimize thermal contact resistance and improvement for solder ball joint reliability. The mechanical stiffness and orientation of the extruded heatsink also provides protection to reduce solder ball reliability risk. A thermal interface material (Honeywell PCM45F) is pre-applied to the heatsink bottom over an area which contacts the package die.

The design concept for the (G)MCH in a BTX chassis is shown in Figure 12. The heatsink is aluminum extruded and utilizes a Z-clip for attach. The clip is secured to the system motherboard via two solder down anchors around the (G)MCH. The clip helps to provide a mechanical preload to the package via the heatsink. A thermal interface material (Honeywell PCM45F) will be pre-applied to the heatsink bottom over an area in contact with the package die.

Note: To minimize solder ball joint reliability risk, the BTX Z-clip heatsink is intended to be used with the Support Retention Mechanism (SRM) described in the Balanced Technology Extended (BTX) Interface Specification. For additional information on designing the BTX chassis to minimize solder ball joint reliability, refer to the Balanced Technology Extended (BTX) Chassis Design Guide.



Figure 11. Design Concept for ATX (G)MCH Heatsink - Installed on Board

Figure 12. Design Concept for Balanced Technology Extended (BTX) (G)MCH Heatsink Design - Installed on Board



4.4 Environmental Reliability Requirements

The environmental reliability requirements for the reference thermal solution are shown in Table 4 and Table 5. These should be considered as general guidelines. Validation test plans should be defined by the user based on anticipated use conditions and resulting reliability requirements.

The ATX testing will be performed with the sample board mounted on a test fixture and includes a processor heatsink with a mass of 550g. The test profiles are unpackaged board level limits.

Table 4. ATX Reference Thermal Solution Environmental Reliability Requirements (Board Level)

Test1 Requirement Pass/Fail Criteria2

Mechanical Shock

• 3 drops for + and - directions in each of 3 perpendicular axes (i.e., total 18 drops)

• Profile: 50 G, Trapezoidal waveform, 4.3 m/s [170 in/s] minimum velocity change

Visual\Electrical Check

Random Vibration

• Duration: 10 min/axis, 3 axes

• Frequency Range: 5 Hz to 500 Hz

• Power Spectral Density (PSD) Profile: 3.13 g RMS

Visual/Electrical Check

Thermal Cycling

• -40 °C to +85 °C, TBD cycles Thermal Performance

Unbiased Humidity

• 85 % relative humidity / 55 °C, TBD hours Visual Check

NOTES: 1. The above tests should be performed on a sample size of at least 12 assemblies from 3

different lots of material. 2. Additional Pass/Fail Criteria may be added at the discretion of the user.

The current plan for BTX reference solution testing is to mount the sample board mounted in a representative BTX chassis with a thermal module assembly having a mass of 900g. The test profiles are unpackaged system level limits.



Table 5. Balanced Technology Extended (BTX) Reference Thermal Solution Environmental Reliability Requirements (System Level)

Test1 Requirement Pass/Fail Criteria2

Mechanical Shock

• 2 drops for + and - directions in each of 3 perpendicular axes (i.e., total 12 drops)

• Profile: 25g, Trapezoidal waveform, 5.7 m/s [225 in/sec] minimum velocity change

Visual\Electrical Check

Random Vibration

• Duration: 10 min/axis, 3 axes

• Frequency Range: .001 g2/Hz @ 5Hz, ramping to .01 g2/Hz @20 Hz, .01 g2/Hz @ 20 Hz to 500 Hz

• Power Spectral Density (PSD) Profile: 2.20 g RMS

Visual/Electrical Check

Thermal Cycling

• -40 °C to +85 °C, TBD cycles Thermal Performance

Unbiased Humidity

• 85 % relative humidity / 55 °C, 500 hours Visual Check

NOTES: 1. The above tests should be performed on a sample size of at least 12 assemblies from 3

different lots of material. 2. Additional Pass/Fail Criteria may be added at the discretion of the user. 3. Mechanical Shock minimum velocity change is based on a system weight of 20 lbs to

29 lbs. 4. For the chassis level testing the system will include: 1 HD, 1 ODD, 1 PSU, 2 DIMMs and

the I/O shield.

§

Enabled Suppliers


Appendix A Enabled Suppliers

Enabled suppliers for the (G)MCH reference thermal solution are listed in Table 6 and Table 7. The supplier contact information is listed in Table 8.

Note: These vendors and devices are listed by Intel as a convenience to Intel's general customer base, but Intel does not make any representations or warranties whatsoever regarding quality, reliability, functionality, or compatibility of these devices. This list and/or these devices may be subject to change without notice.

Table 6. ATX Intel Reference Heatsink Enabled Suppliers for the (G)MCH

ATX Items

Intel PN AVC CCI Foxconn Wieson

Heatsink & TIM

D77030-001 S907C00002

Plastic Clip

C85370-001 P109000024 334C863501A

3EE77-002

Wire Clip D29082-001 A208000233 334I833301A 3KS02-155

Anchor C85376-001

2Z802-015 G2100C888-143

Table 7. BTX Intel Reference Heatsink Enabled Suppliers for the (G)MCH

BTX Items Intel PN AVC Foxconn Wieson

Heatsink assembly (HS/TIM & Wire Clip)

D75473-001 S906Z00001

Anchor (Lead Free)

A13494-008 HB9703E-DW G2100C888-064H

Enabled Suppliers


Table 8. Supplier Contact Information

Supplier Contacts Phone Email

David Chao +886-2-2299-6930 ext. 7619

[email protected]

AVC (Asia Vital Components) Raichel Hsu +886-2-2299-6930 ext.

7630 [email protected]

Monica Chih +886-2-2995-2666 [email protected] CCI (Chaun Choung

Technology) Harry Lin (714) 739-5797 [email protected]

Jack Chen (408) 919-6121 [email protected] Foxconn

Wanchi Chen (408) 919-6135 [email protected]

Beatrice Chang

+886-2-2647-1896 ext. 6395

[email protected]

Wieson Technologies Edwina Chu +886-2-2647-1896 ext.

6390 [email protected]

§

mailto:[email protected]




Mechanical Drawings


Appendix B Mechanical Drawings

The following table lists the mechanical drawings available in this document.

Drawing Name Page Number

Intel® G31, P31 Express Chipset Package Drawing 32

. Intel® G31, P31 Express Chipset Component Keep-Out Restrictions for ATX Platforms 33

Intel® G31, P31 Express Chipset Component Keep-Out Restrictions for Balanced Technology Extended (BTX) Platforms

34

. Intel® G31, P31 Express Chipset Reference Heatsink for ATX Platforms – Sheet 1 35

. Intel® G31, P31 Express Chipset Reference Heatsink for ATX Platforms – Sheet 2 36

. Intel® G31, P31 Express Chipset Reference Heatsink for ATX Platforms – Anchor 37

. Intel® G31, P31 Express Chipset Reference Heatsink for ATX Platforms – Ramp Retainer Sheet 1

38

. Intel® G31, P31 Express Chipset Reference Heatsink for ATX Platforms – Ramp Retainer Sheet 2

39

. Intel® G31, P31 Express Chipset Reference Heatsink for ATX Platforms – Wire Preload Clip

40

Intel® G31, P31 Express Chipset Reference Heatsink for Balanced Technology Extended (BTX) Platforms

41

. Intel® G31, P31 Express Chipset Reference Heatsink for Balanced Technology Extended (BTX) Platforms – Clip

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SIZ

E 20

mm

x 20

mm

) AT

CEN

TER

OF H

EAT

SINK

BAS

E

ALL

FINS

IN O

UTER

COL

UMN

MUS

T BE

INLI

NE O

R CO

NVEX

TO

MID

DLE

FINS

ALL

FINS

IN O

UTER

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UMN

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T BE

INLI

NE O

R CO

NVEX

TO

MID

DLE

FINS

SEE

DETA

IL

A

SEE

DETA

IL

B

8X F

ULL

ROUN

D

SEE

DETA

IL

A

SEE

DETA

IL

B

M

ech

an

ical D

raw

ing

s

36

Ther

mal

and M

echan

ical

Des

ign G

uid

elin

es

Fig

ure

17

. In

tel®

G3

1,

P3

1 E

xp

ress

Ch

ipse

t R

efe

ren

ce H

eats

ink f

or

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– S

heet

2

H G F E D C B A

H G F E D C B A

8

7

6

5

4

3

2

8

7

6

5

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3

2

1

66 2.59

8[

]

23 .906

[]

TYP

135

TYP

R1 .0

39[

]

31.

50.

15.0

59.0

05[

]

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6.72

0.15

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4X R

0.5 .0

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]

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3

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[]

20 .787

[]

20 .787

[]

13.5 .532

[]

TYP

4 .157

[]

2X

3

0.6 .0

24[

]

THI

S DR

AWIN

G CO

NTAI

NS IN

TEL

CORP

ORAT

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CONF

IDEN

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INFO

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ION.

IT IS

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FIDE

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AND

ITS

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ENTS

MAY

NOT

BE

DISC

LOSE

D, R

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DUCE

D, D

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AYED

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OX 5

8119

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7030

ASC

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2

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54X

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Ther

mal

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3

7

Fig

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18

. In

tel®

G3

1,

P3

1 E

xp

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Ch

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t R

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ink f

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nch

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6

5.21

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4X

6

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[]

2X 1

0.13

0.12

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[]

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6

0.77

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[]

7.62

0.15

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[]

2.5

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0 -0.0

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25+.

000

-.002

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2X 4

52

2X 4

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20.0

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0.7

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30[

]

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0 -0.0

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000

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[]

NOTE

S: 1.

THI

S DR

AWIN

G T

O B

E US

ED IN

CO

NJUN

CTIO

N W

ITH

SUPP

LIED

3D

DA

TABA

SE F

ILE.

ALL

DIM

ENSI

ONS

AND

TO

LERA

NCES

ON

THIS

DR

AWIN

G T

AKE

PREC

EDEN

CE O

VER

SUPP

LIED

FIL

E AN

D AR

E

APPL

ICAB

LE A

T PA

RT F

REE,

UNC

ONS

TRAI

NED

STAT

E UN

LESS

IN

DICA

TED

OTH

ERW

ISE.

2. T

OLE

RANC

ES O

N DI

MEN

SIO

NED

AND

UNDI

MEN

SIO

NED

FE

ATUR

ES U

NLES

S O

THER

WIS

E SP

ECIF

IED:

DI

MEN

SIO

NS A

RE IN

MIL

LIM

ETER

S.

FOR

FEAT

URE

SIZE

S <

10M

M: L

INEA

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7

FOR

FEAT

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SIZE

S >

10M

M: L

INEA

R .0

8

ANG

LES:

0

.53.

MAT

ERIA

LS:

I

NSUL

ATO

R: P

OLY

CARB

ONA

TE T

HERM

OPL

ASTI

C, U

L 94

V-0,

BLA

CK (7

39)

(

REF.

GE

LEXA

N 34

12R-

739)

C

ONT

ACT:

BRA

SS O

R EQ

UIVA

LENT

UPO

N IN

TEL

APPR

OVA

L

CO

NTAC

T FI

NISH

: .00

0050

u" M

IN. N

ICKE

L UN

DER

PLAT

ING

;

SO

LDER

TAI

LS, 0

.000

100"

MIN

TIN

ONL

Y SO

LDER

(LEA

D FR

EE).

5. M

ARK

WIT

H IN

TEL

P/N

AND

REVI

SIO

N PE

R IN

TEL

MAR

KING

STAN

DARD

164

997;

PER

SEC

3.8

(PO

LYET

HYLE

NE B

AG)

6 C

RITI

CAL

TO F

UNCT

ION

DIM

ENSI

ON

7. A

LL D

IMEN

SIO

NS S

HOW

N SH

ALL

BE M

EASU

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FOR

FAI

8. N

OTE

REM

OVE

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DEG

ATE:

FLU

SH T

O 0

.35

BELO

W S

TRUC

TURA

L TH

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(

GAT

E W

ELL

OR

GAT

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CESS

ACC

EPTA

BLE)

10. F

LASH

: 0.1

5 M

AX.

11. S

INK:

0.2

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12. E

JECT

OR

MAR

KS: F

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TO

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513

. PAR

TING

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E M

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ATCH

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T TO

EXC

EED

0.25

.14

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CTIO

N PI

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, GAT

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NG IN

SERT

S RE

QUI

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INTE

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16. T

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. ALL

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0.2

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TO IN

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INTE

RFAC

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PLIE

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N

M

ech

an

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raw

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s

38

Ther

mal

and M

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ical

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uid

elin

es

Fig

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19

. In

tel®

G3

1,

P3

1 E

xp

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t R

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5[

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05.0

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2[

]

6

70.4

92.

775

[]

2X 2

7.95 1.10

0[

]

3 .118

[]

NOTE

S: 1.

THI

S DR

AWIN

G T

O B

E US

ED IN

CO

NJUN

CTIO

N W

ITH

SUPP

LIED

3D

DA

TABA

SE F

ILE.

ALL

DIM

ENSI

ONS

AND

TO

LERA

NCES

ON

THIS

DR

AWIN

G T

AKE

PREC

EDEN

CE O

VER

SUPP

LIED

FIL

E AN

D AR

E

APPL

ICAB

LE A

T PA

RT F

REE,

UNC

ONS

TRAI

NED

STAT

E UN

LESS

IN

DICA

TED

OTH

ERW

ISE.

2. T

OLE

RANC

ES O

N DI

MEN

SIO

NED

AND

UNDI

MEN

SIO

NED

FE

ATUR

ES U

NLES

S O

THER

WIS

E SP

ECIF

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DI

MEN

SIO

NS A

RE IN

MIL

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ETER

S.

FOR

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SIZE

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10M

M: L

INEA

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7

FOR

FEAT

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SIZE

S BE

TWEE

N 10

AND

25

MM

: LIN

EAR

.08

FO

R FE

ATUR

E SI

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BETW

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25 A

ND 5

0 M

M: L

INEA

R .1

0

FOR

FEAT

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SIZE

S >

50M

M: L

INEA

R .1

8

ANG

LES:

0

.53.

MAT

ERIA

L:

A

) TYP

E: E

NVIR

ONM

ENTA

LLY

COM

PLIA

NT T

HERM

OPL

ASTI

C O

R

E

QUI

VALE

NT U

PON

INTE

L AP

PRO

VAL

(REF

. GE

LEXA

N 50

0ECR

-739

)

B) C

RITI

CAL

MEC

HANI

CAL

MAT

ERIA

L PR

OPE

RTIE

S

F

OR

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VALE

NT M

ATER

IAL

SELE

CTIO

N:

T

ENSI

LE Y

IELD

STR

ENG

TH (A

STM

D63

8) >

57

MPa

TEN

SILE

ELO

NGAT

ION

AT B

REAK

(AST

M D

638)

>=

46%

FLE

XURA

L M

ODU

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(AST

M D

638)

311

6 M

Pa

10%

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OFT

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EMP

(VIC

AT, R

ATE

B): 1

54C

C

) CO

LOR:

APP

ROXI

MAT

ING

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CK, (

REF

GE

739)

D

) REG

RIND

: 25%

PER

MIS

SIBL

E.

E) V

OLU

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- 1.7

3e+0

3 CU

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MM

(REF

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HT -

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MS

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MAR

K PA

RT W

ITH

INTE

L P/

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ION,

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ITY

NUM

BER

AN

D DA

TE C

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WHE

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HOW

N PE

R IN

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MAR

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164

997

6 C

RITI

CAL

TO F

UNCT

ION

DIM

ENSI

ON

7. A

LL D

IMEN

SIO

NS S

HOW

N SH

ALL

BE M

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FOR

FAI

8. N

OTE

REM

OVE

D9.

DEG

ATE:

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SH T

O 0

.35

BELO

W S

TRUC

TURA

L TH

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(

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ELL

OR

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E RE

CESS

ACC

EPTA

BLE)

10. F

LASH

: 0.1

5 M

AX.

11. S

INK:

0.2

5 M

AX.

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JECT

OR

MAR

KS: F

LUSH

TO

-0.2

513

. PAR

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E M

ISM

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NO

T TO

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EED

0.25

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NG IN

SERT

S RE

QUI

RE

INTE

L'S A

PPRO

VAL

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CONS

TRUC

TIO

N.

A

LL E

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ES A

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SHO

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RE F

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Mech

an

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9

Fig

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20

. In

tel®

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1,

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5.56 .2

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52[

]

6

3.15 .1

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4.75

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[]

5.2 .2

05[

]

1.19 .0

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2X

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5.76 .2

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ech

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Intel® G31/P31 Express Chipset

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Transcript of Intel® G31/P31 Express Chipset