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Transcript of Intel 8088 Microprocessor
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Microprocessor System Design 3-1
ECE 424 Design of Microprocessor-Based Systems
Dr. Esam Al_Qaralleh
CE Department
Princess Sumaya University for Technology
Intel 8088 (8086) Microprocessor Structure
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Microprocessor System Design 3-2
Overview
Textbook:J. L. Antonakos, "An Introduction to the Intel Family of
Microprocessors," Third Edition, Prentice Hall, 1999
Objectives:
The course will provide knowledge to build and programmicroprocessor-based systems.
Microprocessor architecture
Architecture of microprocessor-based systems
Programming microprocessor-based systems
Future trends
Grading:
Two midterms, one final exam, and homeworks
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Microprocessor System Design 3-3
What are microprocessor-based systems?
Microprocessor-based systems are electrical systems consistingof microprocessors, memories, I/O units, and other peripherals.
MemoryOutput
units
Input
units
Bus
Microprocessor
Control
unit
Datapath
ALU
Reg.
Microprocessors access memories and other units through buses
The operations of microprocessors are controlled by instructions
stored in memories
Microprocessors are the brains of the systems
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Microprocessor System Design 3-4
What are microprocessors?
A microprocessor is a processor (or Central Processing Unit, CPU)fabricated on a single integrated circuit.
X
Y
Control
unit
IR
PC
ALU ACC
MAR
Data bus
Control bus
Address bus
A simple microprocessor architecture
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Microprocessor System Design 3-5
Evolution of Computers
First generation (1939-1954) - vacuum tube
Second generation (1954-1959) - transistor
Third generation (1959-1971) - IC
Fourth generation (1971-present) - microprocessor
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Microprocessor System Design 3-6
Evolution of Computers
Http://history.acusd.edu/gen/recording/computer1.html
http://www.cs.virginia.edu/brochure/museum.html
http://www.columbia.edu/acis/history/650.html
First generation (1939-1954) - vacuum tube
IBM 650, 1954
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Microprocessor System Design 3-7
Evolution of Computers
Second generation (1954-1959) - transistor
Http://history.acusd.edu/gen/recording/computer1.html
http://www.computer50.org/kgill/transistor/trans.html
Manchester University Experimental Transistor Computer
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Microprocessor System Design 3-8
Evolution of Computers
Third generation (1959-1971) - IC
Http://history.acusd.edu/gen/recording/computer1.html
http://www.piercefuller.com/collect/pdp8.html
PDP-8, Digital Equipment Corporation
Thanks to the use of ICs, the DEC PDP-8is the least expensive general purpose small
computer in 1960s
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Microprocessor System Design 3-9
Evolution of Computers
Fourth generation (1971-present) - microprocessor
In 1971, Intel developed 4-bit 4004 chip for calculator
applications.
ALU
Instruction
decoder
Reg.
Program
counter
I/ORefresh
logic
System bus
Control logic
ROM/RAM buffer Timing Reset
http://www.intel.com
A good review article: The History of The Microprocessor, Bell Labs Technical Journal,
Autumn, 1997
Block diagram of Intel 4004 4004 chip layout
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Microprocessor System Design 3-10
Evolution of Intel Microprocessors
1
10
100
1000
10000
1974 1979 1982 1985 1989 1993 1997 1999 2000
8080
8088
80286
80386
80486
PentiumP II
P III
P 4
0
1
2
3
4
5
6
7
1974 1979 1982 1985 1989 1993 1997 1999 2000
8080
8088
80286
80386
80486PentiumP II P III P 4
1
10
100
1,000
10,000
100,000
1,000,000
10,000,000
100,000,000
1 97 4 1 97 9 1 98 2 1 98 5 1 98 9 1 99 3 1 99 7 1 99 9 2 00 0
8080
808880286
8038680486
Pentium
P II
P IIIP 4
0.1
1
10
100
1000
10000
1974 1979 1982 1985 1989 1993 1997 1999 2000
80808088
80286
8038680486
PentiumP II
P IIIP 4
Number of transistors Minimum transistor sizes (m)
Clock frequencies (MHz) MIPS
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Microprocessor System Design 3-11
Other Commercial Microprocessors
PowerPC (IBM, Motorola)
Athlon, Dulon, Hammer (AMD)
Crusoe (Transmeta)
SPARC, UltraSPARC (Sun Microsystems)
ARM cores (Advanced RISC Machines)
MIPS cores (MIPS Technologies)
TIs TMS DSP chips (Texas Instruments)
StarCore (Motorola, Agere)
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Microprocessor System Design 3-12
Applications of Microprocessor-Based Systems
Computers
Block diagram of a computer
MemoryTiming &
control
Keyboard
Interrupt
control
... ...Monitor
Micro-
processor
Disk Otherperipherals
Bus
System performance is normally the most important design concern
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1.3 System block diagram
System bus (data, address & control signals)
Memory
Interrupt circuitrySerial I/OParallel I/O
Timing CPU
P +associated
logic
circuitry:
Bus controller
Bus drivers
Coprocessor
ROM (Read Only Memory)
(start-up program)
RAM (Random Access Memory)
DRAM (Dynamic RAM) -high capacity, refresh needed
SRAM (Static RAM) - low
power, fast, easy to interface
Crystal oscillator
Timing circuitry(counters dividing to
lower frequencies)
At external unexpected events,
P has to interrupt the mainprogram execution, service the
interrupt request (obviously a
short subroutine) and retake
the main program from the
point where it was interrupt.
Simple (only two wires
+ ground) but slow.
Printer (low resolution)
Modem
Operators console
MainframePersonal computer
Many wires, fast.
Printer (high resolution)
External memory
Floppy Disk
Hard Disk
Compact DiskOther high speed devices
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The Personal Computer
Processor(8086
trough
Pentium
System bus (data, address & control signals)
System
ROM
Interrupt
logic (8259)
Keyboard
logic (8253)
DMA
Controller
(8237)
Timer logic
(8253)
Coprocessor(8087
trough
80387
640KB
DRAM
Expansion
logic
Keyboard
Speaker
Extension slots
Video cardDisk controller
Serial port
...
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Microprocessor System Design 3-15
CPU
RAM ROM
Timer
Interrupt
I/O port
USART
A/D, D/A
OSC.
Applications of Microprocessor-Based Systems
Microcontrollers
Block diagram of a microcontroller
In general, microcontrollers
are cheap and have low
performance
A microcontroller is a simple
computer implemented in a
single VLSI chip.
Microcontrollers are widely
used in industrial control,automobile and home
applications
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Microprocessor System Design 3-16
http://www.ti.com
Applications of Microprocessor-Based Systems
ASICs
Microprocessors are embedded
into ASIC chips to implement
complex functions
In general, it requires that
the microprocessors have
low power consumption and
takesmall silicon area
A TI baseband chip for cellular
phone applications
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Microprocessor System Design 3-17
Class Objectives
Hardware architecture of microprocessor-based systems
Programming of microprocessor-based systems
Microprocessor architecture
Memory organization
I/O units of microprocessor-based systems
How to put them together
Intel 80x86 instruction set
Microprocessor Interrupt services
Assembly language programming
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Microprocessor System Design 3-18
Overview
&
Review
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Microprocessor System Design 3-19
Overview
Intel 8088 facts
8088
VDD (5V)
GND
CLK
20-bit
address
8-bit data
control
signals
To 8088
control
signals
from 8088
8088 signal classification
20 bit address bus allow accessing
1 M memory locations
16-bit internal data bus and 8-bitexternal data bus. Thus, it need
two read (or write) operations toread (or write) a 16-bit datum
Byte addressable and byte-swapping
Memory locations
5A
2F18000
18001
Low byte of word
High byte of word
Word: 5A2F
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Microprocessor System Design 3-20
Organization of 8088
AH AL
BH BL
CH CL
DH DL
SP
BP
SI
DI
ALU
Flag register
Execution Unit
(EU)
EU
control
CS
DS
SS
ESALU Data bus
(16 bits)
Address bus (20 bits)
Instruction Queue
Buscontrol
External bus
IP
Data bus
(16 bits)
Bus Interface Unit (BIU)
General purpose
register
Segment
register
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Microprocessor System Design 3-21
General Purpose Registers
15 8 7 0
AX
BX
CX
DX
AH AL
BH BL
CH CL
DH DL
Accumulator
Base
Counter
Data
SP
BP
SI
DI
Data Group
Pointer and
Index Group
Stack Pointer
Base Pointer
Source Index
Destination Index
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Microprocessor System Design 3-22
Arithmetic Logic Unit (ALU)
n bits n bits
A B
Y
F
Carry
Y= 0 ?
A > B ?
F Y
0 0 0 A + B
0 0 1 A - B
0 1 0 A - 1
0 1 1 AandB
1 0 0 Aor B1 0 1 not A
Signal F control which function will be conducted by ALU.
Signal F is generated according to the current instruction.
Basic arithmetic operations: addition, subtraction,
Basic logic operations: and, or, xor, shifting,
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Microprocessor System Design 3-23
Flag Register
OF DF IF TF ZFSF AF PF CF
015
Control Flags Status Flags
IF: Interrupt enable flag
DF: Direction flag
TF: Trap flag
CF: Carry flag
PF: Parity flag
AF: Auxiliary carry flag
ZF: Zero flag
SF: Sign flag
OF: Overflow flag
Flag register contains information reflecting the current status of amicroprocessor. It also contains information which controls the
operation of the microprocessor.
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Microprocessor System Design 3-24
Instruction Machine Codes
Instruction machine codes are binary numbers For Example:
1 0 0 0 1 0 0 0 1 1 0 0 0 0 1 1 MOV AL, BL
MOV
Machine code structure
Opcode Operand1
Opcode tells what operation is to be performed.(EU control logic generates ALU control signals according to Opcode)
Some instructions do not have operands, or have only one operand
Operands tell what data should be used in the operation. Operands can
be addresses telling where to get data (or where to store results)
Register
mode
Mode Operand2
Mode indicates the type of a instruction:Register type, or Memory type
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Microprocessor System Design 3-25
EU Operation
ALU Data bus
(16 bits)
AH AL
BH BL
CH CL
DH DL
SP
BPSI
DI
General purpose
register
ALU
Flag register
EUcontrol instruction
1011000101001010
1. Fetch an instruction from instruction
queue
2. According to the instruction, EU control
logic generates control signals.
(This process is also referred to as instructiondecoding)
3. Depending on the control signal,
EU performs one of the following
operations:
An arithmetic operation
A logic operation
Storing a datum into a register
Moving a datum from a register
Changing flag register
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Microprocessor System Design 3-26
Generating Memory Addresses
How can a 16-bit microprocessor generate 20-bit memory addresses?
Segment
(64K)
0000
+
16-bit register
16-bit register
20-bit memory address
00000
FFFFFLeft shift 4 bits
Intel 80x86 memory address generation 1M memory space
Offset
Segment
address
OffsetAddr1
Addr1 + 0FFFF
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Microprocessor System Design 3-27
Memory Segmentation
A segment is a 64KB block of memory starting from any 16-byteboundary
For example: 00000, 00010, 00020, 20000, 8CE90, and E0840 are all valid
segment addresses
The requirement of starting from 16-byte boundary is due to the 4-bit
left shifting
Segment registers in BIU
CS
SS
DS
ES
Code Segment
Data Segment
Stack Segment
Extra Segment
015
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Microprocessor System Design 3-28
Memory Address Calculation
Segment addresses must be stored
in segment registers
Offset is derivedfrom the combinationof pointer registers, the Instruction
Pointer (IP), and immediate values
0000
+
Segment address
Offset
Memory address
Examples
3 4 8 A 0
4 2 1 4
8 A B 43
CS
IP +
Instruction address
5 0 0 0 0
F F E 0
F F E 05
SS
SP +
Stack address
1 2 3 4 0
0 0 2 2
2 3 6 21
DS
DI +
Data address
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Microprocessor System Design 3-29
Fetching Instructions
Where to fetch the next instruction?
CS
IP
1 2 3 4
0 0 1 2
1 2 3 5 2
12352 MOV AL, 0
8088 Memory
Update IP
After an instruction is fetched, Register IP is updated as follows:
IP = IP + Length of the fetched instructionFor Example: the length ofMOV AL, 0 is 2 bytes. After fetching this instruction,
the IP is updated to 0014
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Microprocessor System Design 3-30
Accessing Data Memory
There is a number of methods to generate the memory address whenaccessing data memory. These methods are referred to as
Addressing Modes
Examples:
Direct addressing: MOV AL, [0300H]
1 2 3 4 0
0 3 0 0
2 6 4 01
DS
Memory address
(assume DS=1234H)
Register indirect addressing: MOV AL, [SI]
1 2 3 4 0
0 3 1 0
2 6 5 01
DS
Memory address
(assume DS=1234H)
(assume SI=0310H)
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Microprocessor System Design 3-31
Reserved Memory Locations
FFFFF
FFFF0
003FF
00000
Reset
instructionarea
Interrupt
pointer
table
Locations from00000H to 003FFHare used for the interrupt pointer table
Locations fromFFFF0H to FFFFFH
are used for system reset code
Some memory locations are reserved for special purposes.Programs should not be loaded in these areas
It has 256 table entries
Each table entry is 4 bytes
256 4 = 1024 = memory addressing space
From 00000H to 003FFH
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Microprocessor System Design 3-32
Interrupts
An interrupt is an event that occurs while the processor is executing a program
The interrupt temporarily suspends execution of the program and switch the
processor to executing a special routine (interrupt service routine)
When the execution of interrupt service routine is complete, the processor
resumes the execution of the original program
Hardware Interrupts Software Interrupts
Caused by activating the processors
interrupt control signals (NMI,
INTR)
Caused by the execution of an INT
instruction
Caused by an event which is
generated
by the execution of a program, such
as division by zero
Interrupt classification
8088 can have 256 interrupts
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Microprocessor System Design 3-33
Minimum and Maximum Operation modes
Intel 8088 (8086) has two operation modes:
Minimum Mode Maximum Mode
8088 generates control signals
for memory and I/O operations
It needs 8288 bus controller to generate
control signals for memory and I/Ooperations
Some functions are not available
in minimum mode
It allows the use of 8087 coprocessor;
it also provides other functions
Compatible with 8085-based
systems