Intel 32nm TechnologyFeb 10, 2009  · D1D Oregon - Now D1C Oregon - 4Q 2009 Fab 32 Arizona - 2010...

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1 Intel 32nm Technology Mark Bohr Intel Senior Fellow Logic Technology Development Feb. 10, 2009

Transcript of Intel 32nm TechnologyFeb 10, 2009  · D1D Oregon - Now D1C Oregon - 4Q 2009 Fab 32 Arizona - 2010...

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    Intel 32nm Technology

    Mark Bohr

    Intel Senior Fellow

    Logic Technology Development

    Feb. 10, 2009

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    Key Messages

    • Intel has developed a 32nm logic technology with

    industry-leading features

    • Intel is first to demonstrate working 32nm processors

    • Intel’s 32nm process is on track for production

    readiness in Q4 ’09

    • Both CPU and SoC versions of this 32nm process will

    be available

    • Intel’s strength as an integrated device manufacturer

    allows us to continue to deliver new generations of

    advanced process technology on a 2 year cadence

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    Intel Logic Technology Development

    Process Name P1264 P1266 P1268 P1270 P1272

    Lithography 65nm 45nm 32nm 22nm 16nm

    1st Production 2005 2007 2009 2011 2013

    Manufacturing

    Development

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    45nm High-k + Metal Gate Transistors

    Revolutionary transistor technology for

    improved performance and lower leakage

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    45nm Microprocessor Products

    45nm production ramp has been the fastest yet

    Twice as fast as the 65nm ramp in its first year

    Single Core

    6 Core

    Dual Core

    8 Core

    Quad Core

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    Intel Logic Technology Evolution

    Process Name P1264 P1266 P1268 P1270 P1272

    Lithography 65nm 45nm 32nm 22nm 16nm

    1st Production 2005 2007 2009 2011 2013

    Manufacturing

    Development

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    32nm Technology

    • 2nd generation high-k + metal gate transistors

    • Immersion lithography on critical layers

    • 9 copper + low-k interconnect layers

    • ~70% dimension scaling from 45nm generation

    • Pb-free and halogen-free packages

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    32nm Transistors

    • 2nd generation high-k + metal gate

    0.9nm equivalent oxide thickness high-k

    (scaled from 1.0 nm on 45nm)

    Replacement Metal Gate process flow

    30nm gate length

    4th generation strained silicon

    • >22% performance increase

    • Tightest reported gate pitch

    • Highest reported drive currents

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    Transistor Pitch Scaling

    Transistor gate pitch continues to scale 0.7x every 2 years

    Tightest gate pitch of all reported 32nm technologies

    100

    1000

    1995 2000 2005 2010

    Gate Pitch

    (nm)

    0.7x every

    2 years

    32nm Generation

    112.5 nm Pitch

    PitchPitchPitch

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    32nm Transistor Performance

    32nm provides improved performance or reduced leakage

    Highest drive current of all reported 32nm technologies

    1

    10

    100

    1000

    0.6 0.8 1.0 1.2 1.4 1.6 1.8

    ION (mA/um)I O

    FF

    (n

    A/u

    m)

    1.0 VIntel

    45nm

    Intel

    32nm

    1

    10

    100

    1000

    0.8 1.0 1.2 1.4 1.6 1.8 2.0

    ION (mA/um)

    I OF

    F (n

    A/u

    m)

    1.0 VIntel

    45nm

    Intel

    32nm

    Better Better

    +14% +22%

    >5x

    >10x

    NMOS PMOS

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    SRAM Cell Size Scaling

    Transistor density doubles every 2 years

    Moore’s Law continues!

    0.1

    1

    10

    1995 2000 2005 2010

    Cell Area

    (um2)

    0.5x every

    2 years32nm Generation

    0.171 um2 Cell

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    32nm SRAM Test Chip

    • 0.171 um2 cell

    • 291 Mbit

    • >1.9 billion transistors

    • 4 GHz operation

    • First demonstrated Sep ’07

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    Rapid Yield Improvement

    Defect

    Density

    (log scale)

    2002 2003 2004 2005 2006 2007 2008 2009 20102002 2003 2004 2005 2006 2007 2008 2009 20102002 2003 2004 2005 2006 2007 2008 2009 2010

    90 nm 65 nm 45 nm 32 nm

    32nm yield improvement on track for Q4 ’09 production

    2 year

    Higher

    Chip

    Yield

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    32nm Manufacturing Fabs

    D1D Oregon - Now D1C Oregon - 4Q 2009

    Fab 11X New Mexico - 2010Fab 32 Arizona - 2010

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    System Integration

    High

    Performance

    Logic

    Memory

    Analog Graphics

    Low

    Power

    Logic

    Power

    Regulator

    I/O I/O

    I/O

    Analog

    High Perf.

    Logic

    GraphicsLow Power

    Logic

    Power

    Reg.

    Memory

    Discrete SoC

    System integration will continue, using key elements

    such as the AtomTM core, to realize improved

    performance and power in a smaller form factor

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    32nm SoC Process

    45 nm 32 nm 22 nm

    Process: P1266 P1266.8 P1268 P1269 P1270 P1271

    Products: CPU SoC CPU SoC CPU SoC

    Intel is developing both CPU and SoC versions of each

    process generation, to provide transistors, interconnects

    and other device features optimized for each product line

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    Integrated Device Manufacturer Advantage

    PackagingMasks

    Process

    Design Tools

    Product

    Manufacturing

    Design for Manufacturing

    Co-Optimized Process+Product

    Rapid Yield Learning

    Early Product Ramp

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    Summary

    • Intel has developed a 32nm logic technology with

    industry-leading features

    • Intel is first to demonstrate working 32nm processors

    • Intel’s 32nm process is on track for production

    readiness in Q4 ’09

    • Both CPU and SoC versions of this 32nm process will

    be available

    • Intel’s strength as an integrated device manufacturer

    allows us to continue to deliver new generations of

    advanced process technology on a 2 year cadence

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