Integration of the General Network Theorem in ADE and ADE XL

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Integration of the General Network Theorem in ADE and ADE XL Toward a Deeper Insight Into Circuit Behavior Jochen Verbrugghe Bart Moeneclaey [email protected] [email protected]

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CDNLive 2014 presentation

Transcript of Integration of the General Network Theorem in ADE and ADE XL

Page 1: Integration of the General Network Theorem in ADE and ADE XL

Integration of the General Network Theorem

in ADE and ADE XL

Toward a Deeper Insight Into Circuit Behavior

Jochen Verbrugghe Bart Moeneclaey

[email protected] [email protected]

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Integration of the General Network Theorem in ADE and ADE XL

• General Network Theorem

• Integration in ADE (XL)

• Application example

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General Network Theorem

• Decomposition of transfer function in simpler parts: lower-level transfer functions, useful for design

• Using test signal injection and nulling techniques

• Using multiple injections T, Tn and H0 can be further factored

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Ref: R. D. Middlebrook 2006, IEEE Microwave Magazine

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General Network Theorem: N-EET and CT

• Injection points determine decomposition and interpretation

• GNT morphs into three interpretations

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N-Extra Element Theorem (N-EET)

Chain Theorem (CT)

Extra Elements absent

Effect of Extra Elements

Buffered gain

Loading effect of second stage

N injections

single V or I injection

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General Network Theorem: GFT

• Injection points determine decomposition and interpretation

• GNT morphs into three interpretations

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• ‘Ideal’ transfer function, infinite loop gain • Loop gain • Null loop gain • Direct feedthrough, zero loop gain

General Feedback Theorem (GFT)

Lower-level TF factorization example: loop gain T

Compare to stb loop gain Tt

V and I injection

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Integration of the General Network Theorem in ADE and ADE XL

• General Network Theorem

• Integration in ADE (XL)

• Application example

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Integration in ADE (XL): motivation

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• GNT advantages General framework Same techniques for different applications, hand calculations

Well-known results derive cleanly from GNT

Results are useful for design

Divide-and-conquer approach

• Integration in Virtuoso Application of GNT to real-world designs

Deeper insight into complex circuit behavior

• Find out dominant lower-level TFs (a priori)

• Validate hand-analysis results (a posteriori)

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Integration in ADE (XL): circuit setup

• Insert GNT Probes in schematic at appropriate points Inject small-signal test signals: voltage and/or current

• Uninvasive Does not interfere with other analyses

Layout XL and Calibre LVS tools supported

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Integration in ADE (XL): analysis setup

• New analysis ‘gnt’ in Choosing Analysis… Same use model as stb, ac, …

• Familiar options Sweep variable, sweep range, sweep type

• Source instance, output net or probe Indicates the transfer function H to decompose

• (Nested) GNT analyses GNT Probe instance(s)

Analysis type: GFT, N-EET, CT

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Integration in ADE (XL): internals

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• Internally always flat N-EET calculated Using AC analysis per injection

• Data to be saved optionally Flat N-EET results

Any possible permutations of nested analyses

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Integration in ADE (XL): results

• Results included in psf data

Nested results as folders

• Accessible in the usual ways

ViVa’s Results Browser

getData() SKILL API

• GFT Tt identical to stb loop gain

Given identical reference nodes

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Integration in ADE (XL): ADE support

• ADE L Incl. parametric sweep

• ADE (G)XL

Corners

Parameters

Monte Carlo sampling

Sensitivity analysis

Optimization

Worst-case corners

• Tested in IC 6.1.5 and IC 6.1.6

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Integration of the General Network Theorem in ADE and ADE XL

• General Network Theorem

• Integration in ADE (XL)

• Application example

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Application example: voltage regulator

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• Input voltage source • Folded cascode OTA • Emitter follower • Output voltage

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Application example: voltage regulator

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• Input voltage source • Folded cascode OTA • Emitter follower • Output voltage

Problem

Output voltage inaccurate

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Application example: GFT analysis - setup

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GFT analysis

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Application example: GFT analysis - results

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Problem

Output voltage inaccurate

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-2.5 dB

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Application example: GFT analysis - results

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Problem

Output voltage inaccurate

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Problem

H too low Output voltage inaccurate

-2.5 dB

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Application example: GFT analysis - results

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Problem

Output voltage inaccurate

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Problem

H too low Output voltage inaccurate 10 dB

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Application example: GFT analysis - results

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Problem

Output voltage inaccurate

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Problem

H too low Output voltage inaccurate 10 dB

Problem

Forward voltage loop gain insufficient H too low

Output voltage inaccurate

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Application example: CT analysis nested in GFT analysis - setup

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Emitter follower

CT analysis

GFT analysis

Folded cascode OTA

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Application example: CT analysis nested in GFT analysis - setup

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Emitter follower

CT analysis

GFT analysis

Folded cascode OTA

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Application example: CT analysis nested in GFT analysis - results

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-60 dB

70 dB

Problem

Forward voltage loop gain insufficient H too low

Output voltage inaccurate

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Application example: CT analysis nested in GFT analysis - results

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-60 dB

70 dB

Problem

Forward voltage loop gain insufficient H too low

Output voltage inaccurate

Problem

Excessive interaction between stages Forward voltage loop gain

insufficient H too low

Output voltage inaccurate

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Application example: reducing the interaction between stages

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Insert a PMOS source follower

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Application example: reducing the interaction between stages - results

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-1.5 mdB

70 dB

Problem

H shows peaking

Problem

Excessive interaction between stages Forward voltage loop gain

insufficient H too low

Output voltage inaccurate

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Application example: reducing the interaction between stages - results

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-1.5 mdB

70 dB

Problem

H shows peaking

Problem

Excessive interaction between stages Forward voltage loop gain

insufficient H too low

Output voltage inaccurate

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Application example: reducing the interaction between stages - results

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Problem

H shows peaking

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Application example: reducing the interaction between stages - results

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Problem

H shows peaking PM = 34°

Problem

Forward voltage loop gain insufficient phase margin H shows peaking

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Application example: reducing peaking, EET analysis nested in GFT analysis - setup

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additional capacitance

EET analysis

GFT analysis

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Application example: reducing peaking, EET analysis nested in GFT analysis - results

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PM = 78°

Problem

Forward voltage loop gain insufficient PM H shows peaking

PM = 34°

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Application example: reducing peaking, EET analysis nested in GFT analysis - results

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PM = 78°

Problem

Forward voltage loop gain insufficient PM H shows peaking

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Application example: reducing peaking, EET analysis nested in GFT analysis - results

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PM = 78°

Problem

Forward voltage loop gain insufficient PM H shows peaking

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Conclusion

• GNT analysis integrated in ADE and ADE XL

• Allows direct application of theorem

• Valuable to increase insight, provides design guidance

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[email protected] [email protected]

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Helpful instrument for design and analysis of electronic circuits and education of future designers

analogdesign.be

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References and acknowledgement

• R. D. Middlebrook, "The general feedback theorem: A final solution for feedback systems," IEEE Microwave Magazine, vol. 7, no. 2, pp. 50+, April 2006

• V. Vorpérian, Fast analytical techniques for electrical and electronic circuits. 2002 • R. D. Middlebrook, “The DT and the CT: The Dissection Theorem and the Chain Theorem.”

[Online]. Available: http://www. rdmiddlebrook.com/D-OA-Rules&Tools/index.asp • R. D. Middlebrook, "Null double injection and the extra element theorem," IEEE

Transactions on education, vol. 32, no. 3, pp. 167-180, August 1989 • R. D. Middlebrook, V. Vorperian, and J. Lindal, “The N Extra Element Theorem,” IEEE Trans.

Circuits Syst. I Fundam. Theory Appl., vol. 45, no. 9, pp. 919–935, 1998 • J. Verbrugghe, B. Moeneclaey, "Implementation of the Dissection Theorem in Cadence

Virtuoso", International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, pp. 145-148, September, 2012

• M. Tian, V. Visvanathan, J. Hantgan, and K. Kundert, "Striving for small-signal stability," IEEE Circuits & Devices, vol. 17, no. 1, pp. 31-41, january 2001

• F. Wiedmann. Loop gain simulation. [Online]. Available: http://sites.google.com/site/frankwiedmann/loopgain

• Research funded by a Ph.D. grant of the Agency for Innovation by Science and Technology of Flanders (IWT).

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