Improved Global Routing Using â‰‰-Geometry

Western Michigan University Western Michigan University

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Master's Theses Graduate College

12-1992

Improved Global Routing Using ⋋-Geometry Improved Global Routing Using -Geometry

Surendra Burman

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IMPROVED GLOBAL ROUTING USING A-GEOMETRY

by

Surendra Burman

A Thesis Subm itted to the

Faculty of The G raduate College in partial fulfillment of the

requirem ents for the Degree of M aster of Science

D epartm ent of Com puter Science

W estern Michigan University K alam azoo, M ichigan

December 1992

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.


Surendra Burm an, M.S.

W estern Michigan University, 1992

In th is thesis, we study global routing problem in VLSI Design using A-

geometry. We study the problem of global routing of m ultiterm inal nets in a

generalized geom etry called A-geometry in order to improve layout and conse

quently enhance the perform ance. In A-geometry, edges w ith angles Z7r/A, for all

i , are allowed, where A (> 2 ) is a positive integer. A = 2, 4 and oo correspond to

rectilinear, 45° and Euclidean geometries respectively.

In th is thesis, we prove th a t all minimum spanning trees in A-geometry

satisfy the separability property, for A = 4. Furtherm ore, we extend our result

and prove th a t all m inim um spanning trees are separable for all A-geometries,

A > 4. We develop a polynom ial tim e algorithm to find an optim al steiner tree

in A-geometry which is derivable from the minimum spanning tree. Our exper

im ents indicate th a t tree length can be reduced by 10-12% by using 4-geometry

as com pared to rectilinear geometry; however, length reduction is quite m arginal

for higher geometries. As a consequence, we conclude th a t for purpose of global

rou ting it is sufficient to consider layouts in 4-geometry.


ACKNOWLEDGMENTS

I t is very difficult to acknowledge the contributions from m any people who

helped in the fulfillment of a dream . T he following are ju s t a few who contributed

in th e com pletion of th is thesis.

Firstly, I thank my advisor, Dr. Naveed A. Sherwani whose role for me

has been much much m ore th an ju st an advisor. I could not have m ade so much

progress w ithout his guidance, help and continued encouragem ent. He has been an

everlasting source of m otivation for me. I sincerely acknowledge his contribution

in my progress. Secondly, I would like to thank the m em bers of my com m ittee, Dr.

Fred Boals and Dr. Ajay G upta; I extend my sincere thanks for their supervision

and support. I would like to thank all the faculty in the D epartm ent of Com puter

Science who have ever provided opportunity , encouragem ent, and support to me.

I also want to m ention my colleagues in the night group, Arun, Sid, Wo Bu,

C hander, Jahangir, M oazzem, Sivakumar, Roshan, W asim, and others. I enjoyed

working w ith them and th an k them for their encouragem ent and support.

Finally, to my fam ily m em bers, who supported me and I owe a debt of

g ratitude . I th an k them for their love and continued help to do my research.

Surendra Burm an

ii


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Improved global routing using A-geometry

B urm an , S urendra K um ar, M.S.

Western Michigan University, 1992

U M I300 N. Zeeb Rd.Ann Arbor, MI 48106


To night group.


TABLE OF CONTENTS

A C K N O W L E D G M E N T S ........................................................................................... ii

LIST O F T A B L E S ......................................................................................................... iv

LIST O F F I G U R E S ...................................................................................................... v

I. VLSI D ESIG N AU TOM A TION .................................................................... 1

1.1 R outing Problem s in V L S I ...................................................................... 2

1.2 Thesis O r g a n iz a t io n ................................................................................ 4

II. GLOBAL R O U T I N G ........................................................................................... 5

2.1 Global Routing M odels ......................................................................... 6

2.2 Global R outing A lg o r i th m s ........................ 7

2.3 Steiner Tree Approach to Global R o u t i n g ....................................... 9

III. IM PR O V ED GLOBAL RO UTING USING A -G E O M E T R Y .................. 12

3.1 Basic Concepts of A-Geometry ........................................................... 13

3.2 A-Separability of M inimum Spanning T r e e s ................................... 17

IV. A LG O R ITH M FO R O PTIM A L STEIN ER T R E E IN A-GEOM ETRY 21

V. CONCLUSIONS AND FU T U R E R E S E A R C H .......................................... 26

5.1 C o n c lu s io n s .................................................................................................. 26

5.2 Fu ture Research ....................................................................................... 26

R E F E R E N C E S ................................................................................................................ 28


LIST OF TABLES

1. Experim ental R esults for O ptim al A-SMT

iv


LIST O F FIGU RES

1. Exam ple of G lobal R outing and Channel R outing ................................. 3

2. Types of Parallelogram s in A-Neighborhood............................................. 14

3. Exam ples of G rid G raphs in A-Geometry.................................................. 16

4. Separability P roo f in 4-Geom etry................................................................. 18

5. M ST N onseparable in 2-Geom etry B ut Separable in 4-Geometry. . 20

6. Exam ple of a Point S et.................................................................................... 25

v


CHAPTER I

VLSI DESIGN AUTOM ATION

In the com binatorial sense, the layout problem is a constrained optim iza

tion problem . We are given a description of a c ircu it-m ost often as a netlist,

which is a description of sw itching elements and their connecting wires. We look

for an assignm ent of geom etric coordinates of the circuit com ponents-in the plane

or in one of a few p lanar lay e rs-th a t satisfies the requirem ents of the fabrication

technology (sufficient spacing between wires, restricted num ber of wiring layers,

and so 011) and th a t minimizes certain cost criteria (the area of the sm allest cir

cum scribing rectangle, the length of the longest wire, and so 011).

P ractically all versions of the layout problem as a whole are in tractable;

th a t is, they are N P-hard . Thus, we have to resort to heuristic m ethods. One

of these m ethods is to break up the problem into subproblem s, which are then

solved one after the other. A lm ost always, these subproblem s are N P-hard as well,

bu t they are m ore am enable to heuristic solution than is the layout problem itself.

Each one of the layout subproblem s is decomposed in an analogous fashion. In this

way, we proceed to break up the optim ization problems until we reach prim itive

subproblem s. These subproblem s are not decomposed further, but ra ther are

solved directly, either op tim ally -if an efficient optim ization algorithm ex ists-o r

approxim ately.

T he m ost common way of breaking up the layout problem into subproblem s

is first to do com ponent placement, and then to determ ine the approxim ate course

of the wires in a global-routing phase. This phase may be followed by a topological

compaction th a t reduces th e a rea requirem ent of the layout, after which a detailed-

routing phase determ ines the exact course of the wires wit hout changing the layout

area. A fter detailed routing, a geometric-compaction phase may further reduce the

1


2

area requirem ent of the layout. This whole procedure m ay be done hierarchically,

s ta rtin g w ith large blocks as circuit com ponents, which are themselves laid out

recursively in the same m anner. This recursive process may be controlled by

algorithm s and heuristics th a t allow for choosing am ong layout alternatives for

th e blocks such th a t the layout area of the circuit is minimized. Exactly how a

given version of the layout problem is broken up into subproblem s depends on

bo th the design and the fabrication technology. For instance, in standard-cell

design, the detailed-routing phase essentially reduces to channel routing.

1.1 R outing Problem s in VLSI

R outing is an im portan t problem in circuit layout and between 20% to

30% of all VLSI layout design tim e is spent on routing. A set of term inals,

which are to be m utually connected, is called a net. The purpose of routing is to

estab lish connectivity am ong all term inals belonging to the same net, i.e., route

wires between all term inals of a net. The space available for wiring is the space

betw een two adjacent blocks. This space usually has a rectilinear shape. The

routing task is usually divided into two steps: (1) global routing, and (2) channel

routing.

T he purpose of global routing is to assign wires to channels, w ithout going

in to detailed routing. The usual approach is to route one net at a tim e sequentially

until all nets are connected. Figure 1 illustrates an example of global and channel

routing.

To connect a net, a greedy approach or maze runner rou ter is used. In

m ost cases “rip-up and rerou te” and m anual routing are necessary to route those

nets th a t can not be handled by global routers. This m ethod is only useful if a

reasonable order of nets can be found. U nfortunately, no m ethod exists for finding

such an order.


3

Figure 1. Exam ple of Global R outing and Channel Routing.

A lthough global rou ting assigns nets to channels, the task of assigning nets

to specific tracks within channel still rem ains incomplete. In the next step, called

channel routing, the nets are assigned to specific tracks, thus com pleting all details

o f routing.

In VLSI design, channel routing is done by etching conductor pa ths on

one or more metallization layers. T he num ber of layers available depends on

th e fabrication technology. Traditionally, two layers have been used for routing.

However, three m etal layer technology also has been used by industry. The routing

m ay be done in such a m aim er th a t each net consists of vertical and horizontal

wire segments. Then, one layer is used for horizontal wire segments while the o ther

layers are used for vertical wire segments. The electrical connection between two

segm ents of a net is established through contact windows which are com m only

known as via-holes or sim ply vias.

T he channel routing problem depends 011 the num ber of layers being used

for routing. Thus based 011 num ber of layers, we have (a) one layer, (b) two layer

and (c) th ree layer routing problem s.


4

1.2 Thesis O rganization

A prelim inary version of th is work was presented a t the Tw enty-N inth An

nual A llerton Conference on Com m unication, Control, and Com puting [16]. This

thesis is organized into five chapters. In C hapter II, we explain global routing

problem in VLSI Design and different approaches taken to solve it. In C hap

te r III, we introduce a new concept of Steiner tree in lion-rectilinear geometry.

In C hap ter IV, we present a polynom ial tim e algorithm to obtain Steiner tree

in A-geometry. Open problem s and future research directions in routing in non-

rectilinear geom etry are proposed in C hapter V.


CHAPTER II

GLOBAL RO U TIN G

In th is chapter we review the global routing problem in VLSI Design au

tom ation and discuss the various approaches which have been taken to solve it.

As discussed earlier, the purpose of global router is to decompose a large

routing problem into small, m anageable problem s, so th a t the detailed routers can

be used to find exact routes efficiently. This decom position is done by assigning

each net to a set of rou ting regions such as channels, switchboxes, and river-route

areas. T he objective of th is assignm ent is to plan the routing globally to reduce the

chip size, shorten connection length, (and therefore delay), improve routability,

and balance congestion across the layout surface. In some references, this process

is also called loose routing or topological routing.

Before global rou ting phase begins, channels have to be defined on the

layout surface. Channel definition is stra ight forward for standard cells and gate

arrays because they are usually laid out in rows or columns w ith intervening

em pty areas for routing. Channel definition is less obvious for general cell layouts.

C hannel definition for general cells is highly dependent on placement. It has been

proven th a t order constrain ts for channel routing are acyclic if and only if the

channel s truc tu re corresponds to a slicing of the chip [18]. Partitioning-based

placem ent techniques have the desirable property of creating such a struc tu re as

a n a tu ra l effect. They are, therefore, well suited for general cell layouts which use

channel routers. A lot of work has already been done to autom atically generate

channel s truc tu res for general cell layouts [3].

5


6

2.1 Global R outing M odels

T here are basically two types of models used in global routing. T he one

which models the channel s truc tu re in the form of a channel graph and the o ther

which models the routing surface as a coarse routing grid. B oth of these models

u ltim ately view the problem as finding routing paths in a weighted graph, and

m any of the sam e algorithm s apply to bo th models.

A channel intersection graph has been defined as graph in which each

vertex represents a channel intersection and edge represents a channel or channel

subsection. By assigning the edge weights to model wire length and channel

capacity, such a graph can be used to select a channel sequence for each net. Any

shortest p a th algorithm can be used on this graph. In gate arrays and standard

cells, it is necessary to m odel the availability of feedthroughs. Feedthroghs are

w iring paths which cross the cell rows and thereby provide paths between two

channels which do not intersect. This means th a t connections can leave and

en ter the channels a t places other th an channel intersections, and therefore a

finer resolution is required. To model this feature the channel intersection graph

m ust be refined subdividing channels into minichannels. Edges are added to the

g raph to represent feedthroughs which connect adjacent channels. T he effect of

m inichannels is to model each channel not as a single edge but rather as a string

of edges. T he result is longer search tim e but more accuracy of the edge weights

and more accurate m odeling of a wire th a t does not span the entire length of the

channel.

A nother approach to global routing is to obtain the channel-graph by rep

resenting channels as vertices and channel adjacencies as edges (the opposite of

w hat is done in the channel intersection graph). T he use of such a graph is the

sam e as for the channel intersection graph. It is a weighted graph, and the edge

weights m odel the length and capacity of the routing channels. The differences

betw een these two m odels are subtle. For the channel intersection graph where


7

th e edges correspond to channels, the notion of density can be used to calculate

the portion of the cost due to congestion. For the o ther model, edges represent

the boundaries between adjacent channels. Rem aining capacity can be really de

term ined at these boundaries, but the area of the m aximum density of a channel

intersections. Representing the channel intersections as edges, therefore, may fail

to m odel the most critical portion of the channel in term s of density.

I t is possible to take greater advantage of the regularity of s tandard cell

and gate array structu res by confining the graph to be regular grid. T he wiring

capacity of the cells form ed by th is s tructu re is imposed on the routing surface.

T he wiring capacity of the cells form ed by this struc tu re is readily com putable.

T his s truc tu re is m odeled as a grid graph much like th a t used in Lee routers,

except th a t the wiring capacity in each direction is no longer lim ited to a single

segm ent. A cost is supplied to each edge in the graph based upon the rem aining

track capacity a t the cell boundary. Note th a t exact positioning of the wires along

th e cell edge is not modeled; th a t is the task of the detailed router. D uring the

global routing stage, only the capacity of the cell boundary and the num ber of

wires th a t are currently assigned to cross that boundary need to be known. W ire

length is modeled im plicitly by the fact th a t each cell is the sam e size as all others.

2.2 G lobal R outing Algorithms

Researchers have studied global routing for the past two decades. Various

approaches have been proposed such as hierarchical wiring [2], rerouting tech

niques [19], and sim ulated annealing [21]. W hichever model is selected, the task

of the global router is to find a suitable pa th for each connection through the

weighted graph. Ideally, a m inim al cost Steiner tree would be found for each

net, bu t th is problem is N P-C om plete in the general case and will be discussed

in the next chapter. Furtherm ore, since edge weights model w iring congestion,


8

th e optim al w iring for each net depends on wiring for all the o ther nets. Con

sequently, heuristic techniques m ust be used which yield acceptable results th a t

allow successful detailed routing of the circuit.

The first technique for global routing is using the fam iliar Lee router. In

th is technique, nets are sequentially selected for routing, and edge weights are

u pdated after each net is completed. W ithin each net, one pin is selected to be

the source point, and sym m etric expansion is perform ed until any one of the o ther

pins in the net is encountered. This subtree is then used as the source of the next

expansion, and the process continues until all pins in the net are in the same

subtree. The global rou ting models contain m any fewer vertices than the maze

routing model; therefore, goal-directed searching is not usually necessary. The

shortest pa th guarantee is still viable.

As in the Lee router, this net-at-a-tim e global routing is order dependent.

T here is a great deal of inconclusive study 011 connection ordering, but it is certain

th e results are different for different connection orderings of the sam e problem. A11

advantage of such an approach is th a t nets designed as critical because of delay

considerations can be favored by scheduling them early in the routing process.

A nother approach to initial global routing is to construct an initial layout

by determ ining the m inim um -distance Steiner tree for each net, ignoring other

nets in the process. By ignoring wiring capacities in th is step, the connection

ordering dependencies discussed earlier are avoided. This approach requires an

im provem ent phase of the global router to alleviate congestion. In other words,

som e routing regions may be grossly oversubscribed while others are left nearly

empty. However, this technique gives a good s ta rting point for im provement,

because each net is known to have its minimum path.

A th ird approach to global routing is to employ a least-com m itm ent tech

nique. For some simple nets, there is only one choice for routing. For exam ple, a


9

connection th a t goes s tra igh t across a single channel has only one feasible a lter

native to consider. This situa tion suggests a three-step process. Firstly, route the

short nets first (i.e. the nets which have only two or th ree pin nets). These com

prise approxim ately 75% of the nets in a typical design. Use a close-to-optim al

Steiner tree algorithm to route nets of interm ediate length. R oute rem aining big

long nets using maze routing procedures.

A nother variation of the routing techniques is to use iterative improve

m ent global route techniques. The search-type, in itial global routers are highly

dependent on net ordering. T he Steiner-type, initial global routers often result

in channels which are oversubscribed. Both of these problem s can be reduced by

following the initial global routing w ith an improvement phase. The basic idea of

th is approach is to s ta r t w ith a feasible global routing solution and improve it by

repeatedly selecting connections, removing them , and distinguished by how the

connections are selected for removal and how they are reconnected. One selection

approach is to identify critical nets. Critical nets are those nets which if removed

would make the design sm aller. These nets can be readily identified by finding a

position of maximum density along a critical channel. Nets which have segments

w ithin th is area are poten tia lly critical nets. These nets are then rerouted using

graph search technique. Because the graph is updated to reflect the current ca

pacities, the pa th chosen is likely to be different from the in itial routing solution

arrived a t w ith less com plete congestion information.

2.3 Steiner Tree Approach to G lobal R outing

Global routing of m ulti-term inal nets is an im portan t problem in physical

layout and design of VLSI circuits. This problem has been traditionally viewed as

a steiner tree problem [4, 13]. Due to th is application and m any other uses, steiner

trees have been a subject of intensive research [4, 7, 9, 11, 10, 12, 13,15, 20], A tree

interconnecting a set P — { p :,p 2 > • • • ,Pn} of specified points (demand points) in a


10

cartesian plane and some arb itra ry points Q = {q i ,q 2, ■ < • ,Qm} ( steiner points) is

called a steiner tree of P. T he location and num ber of steiner points is arbitrary. A

steiner tree w ith m inimum to ta l length is called a Steiner M inimum Tree (SM T).

I t has been shown th a t finding a Steiner M inimum Tree is N P-com plete [7]. In

view of the N P-com pleteness of the problem, several heuristic algorithm s have

been developed for this problem .

A global router based on Steiner M in-M ax tree has been presented in [4].

T he stra tegy is to route the net one by one. First the ordering of the nets to be

processed is decided. T hen for each net, global routing is obtained try ing to avoid

crowded channels. T he second step is form ulated as a graph problem . Given

a weighted graph, a special type of steiner tree called Steiner m in-m ax tree is

found. A Steiner m in-m ax tree is defined to be a spanning tree whose maximum

weight-edge is minimized over all Steiner trees. A polynom ial tim e algorithm

to find Steiner m in-m ax tree has also been presented in [4]. A nother approach

to find suboptim al Steiner trees is presented in [14]. This m ethods is based on

extending the two classic m inim al spanning tree algorithm s, P rim ’s and K ruskal’s.

In ano ther m ethod [1], algorithm s for special cases of rectilinear Steiner tree are

presented. In th is technique, a special case is considered in which the points lie on

the boundary of a rectilinear rectangle and give an 0 (n ) algorithm to construct

a minimum rectilinear S teiner tree for such points.

A quite different approach to global routing using Steiner tree has been

taken by [5]. In this technique, the problem of global routing has been consid

ered aim ing to sim ultaneously minimize the wire lengths and density through the

regions. Previous global routers have a ttem pted th is goal, however, they mini

mized one of the two param eters as the main objective and proposed heuristics

for minimizing the o ther param eter. This task is accom plished by introducing

the concept of weighted Steiner trees. A W eighted Steiner tree is defined as a

Steiner tree w ith weighted lengths. The proposed global rou ter a t each step finds


11

a w eighted Steiner tree for a net, where real points represent the regions containing

the term inals of the given net, Steiner points represent interm ediate regions and

weight of a region represents its complexity. In another approach, Steiner trees

have been applied to find routing in switchbox in presence of obstacles [6 ]. The

sw itchbox rectilinear Steiner tree problem is to construct an optim al rectilinear

Steiner tree interconnecting n term inals on the perim eter of a switchbox w ithout

crossing any obstacles inside the switchbox. However, intersecting boundaries of

obstacles is allowed. An 0 ( n ) tim e algorithm is presented to solve this problem .


CHAPTER III


So far, we have seen th a t several approaches have been taken to the problem

of G lobal routing. M ulti-term inal nets can be modeled as minimum cost Steiner

trees. However, finding the minimum cost Steiner tree is an N P-C om plete problem

and hence, m any heuristic approaches to find minimum cost Steiner trees are

known to exist as discussed in the previous chapter. All the approaches in the

past deal w ith finding the Steiner tree in rectilinear geometry. In th is thesis, we

consider a different approach to finding Steiner trees. We consider the concept of

Steiner trees in A-geometry.

T he Steiner tree whose edges are constrained to be of rectilinear shape is

called Rectilinear Steiner Tree (RST). I t is well known th a t any minimum cost

rectilinear spanning tree (RM ST) is a | approxim ation of a SM T [10]. As a result ,

m any heuristic algorithm s use minimum spanning tree (M ST) U U Cl/ Stci rting point

and apply local m odifications to obtain a SMT. In this way, these algorithm s

can guaran tee th a t weight of the SM T is at most § of the weight of the optim al

tree [8 , 9 ,1 3 , 15]. A key idea of separability of trees, which leads to optim al steiner

trees for some special cases was introduced in [13]. Two non-adjacent edges are

called separable if their corresponding layouts do not intersect. A tree is called

separable if no two non-adjacent edges intersect. Based on th is idea, it was shown

th a t it is possible to develop a polynomial tim e algorithm to find optim al steiner

tree derivable from a separable minimum spanning tree.

T he restriction of layout to rectilinear geomet ry and thus restriction to the

use of only rectilinear steiner trees was necessary to account for restricted com

pu ting capabilities. Recently, due to enhanced com puting capabilities and need

for high perform ance layout designs, non-rectilinear geom etry is gaining ground.

12


13

In order to obtain sm aller length steiner trees, we have recently in troduced the

concept of A-geometry [17] discussed in detail in next chapter.

In A-geometry only edges w ith angles Z7r/A, for any integer i, are allowed,

where A = 2,4,6 ,8 ....0 0 . Obviously we can see th a t A-geometry always includes

rectilinear edges and perhaps a useful geom etry w ith respect to the fabrication

technologies.

3.1 Basic Concepts of A-Geometry

In th is section we establish some basic properties of A-geometry which will

be used in la ter rem aining of the thesis. The concept of A-geometry is very closely

rela ted to uniform geom etry [20]. The key difference is inclusion of rectilinear

orientations in all A-geometries.

D e f in i t io n 1 A X-angle is defined as an angle of measure irr/X for an integer i

(0 < i < A), where A = ‘2k for k being a 'positive integer.

D e f in i t io n 2 A \-parallelogram is a parallelogram with boundaries at X-angles.

D e f in i t io n 3 Let e = p^po be an edge. A X-neighborhood of e is the closure of a

X-parallelogram with e as a diagonal. We denote a X-neighborhood of e as N \(e) .

For example, when A=4, only the above shown six parallelogram s are pos

sible A-neighborhoods. We denote them as ty p e l through typeG as shown in

Figure 2. We observe th a t for a given edge e there exists a A-neighborhood which is

enclosed in all o ther A-neighborhoods. Such a A-neighborhood is called a smallest

A-neighborhood of e.

For a given edge w ith the angle of m easurem ent of 0° and 45°, the ty p e l A-

neighborhood is sm allest. T he readers may check other cases for type2 ('45° —90°),

type3 (90° — 135°) and type4 (135° — 180°). In fact, only ty p e l, type2, type3 and

type4 A-neighborhoods are possible to be smallest. We s ta te th is observation as

the following lemma.


Tn»i

Figure 2. T ypes of Parallelogram s in A-Neighborhood.

L e m m a 1 For a given edge e, there exists a smallest X-neighborhood which is

among typel, typeS, type3 and tigpef.

D e f in i t io n 4 A X-layout of an edge e — pipn is the path from p i to p2 along the

smallest X-neighborhood of e.

T he num ber of A-Iayouts of an M ST edge is an exponential function of

the num ber of points on the subgrid w ithin the bounding parallelogram of the

two end points of the edge. Choosing different A-layouts for the edges of the

M ST will result in different am ount of overlaps am ong these layouts. If we merge

these overlapping portions by in troducing appropriate steiner points, the resulting

s tru c tu re is a steiner tree of the given point set. These steiner points are a result

of m erging the overlaps between the various A-layouts.

D e f in i t io n 5 Let e = pppo be an edge. The X-distance between p\ and p2, or

X-length of e, is defined as the length of the X-layout of e. We denote X-distance

as d \ (p i ,P 2) ■


15

D e f in i t io n 6 A X-MST (X-minimum spanning tree) of a point set K in the Eu

clidean plane is a minimum spanning tree, of the complete graph G (K ) over K ,

with respect to X-distance.

D e f in i t io n 7 A X-ST (X-steiner tree) is a steiner tree in which edges are all at

X-angles.

Iu considering A-Steiner M inimum Tree (A-SMT), we shall first identify

the com plete set of possible steiner points. The nodes of A-SMT which are not

dem and points and have degree a t least 3 are the steiner points. The optim al A-

SM T of a point set is known to be subgraph of its underlying grid [1 1 ]. Therefore

it is sufficient to consider routes for the edges of Minimum Spanning Tree on the

underlying grid.

D e f in i t io n 8 The X-underlying grid of a point s e t K is the grid obtained by draw

ing the lines through each point of K at all X-angles.

The following theorem gives a relationship between a given point set K

and A.

T h e o r e m 1 Let K be a point set in the plane. Then the maximum number of

points in the X-underlying grid is given by p = •U(A~*)(A:~.1I + &

P ro o f : A grid is determ ined by A and K . At most there are Ak lines in a grid.

Therefore there are at m ost (A — 1)(A: — 1) possible steiner points on each line.

In th is way, we count each possible steiner points on two lines. Therefore, to ta l

num ber of possible steiner points is . The to ta l num ber of dem and

points is given to be k. Hence to ta l num ber of grid points is p — 'U(A~^)(A:~1) +& 0

Clearly for rectilinear geom etry th a t is A = 2, then p = k 2. Also we see

th a t for Euclidean geom etry th a t is A = oo, then the num ber of grid points is

infinite as expected. Some examples of grid graphs in A-geometry are shown in

F igure 3.


16

( a ) G r i d G ra ph f o r n=4 a n d A=4 (b) g r i d G r a p h f o r n=2 and A=«

Figure 3. Exam ples of Grid G raphs in A-Geometry.


17

T h e o r e m 2 There exists a A -SM T for a given point set on its X-underlying grid.

P ro o f : Since there always exists a A-layout for a given edge e = p xp 2 in the A-

underlying grid. We can always connect two points using the A-layout. This can

be done for each edge of the A-MST. This means th a t a A-SMT can be constructed

using the A-underlying grid for the given point set. B

3.2 A-Separability of Minimum Spanning Trees

In th is section we establish th a t any minimum cost spanning tree in 4-

geom etry is A-separable. From this we show results for higher geometry. We s ta r t

by first defining the concept of A-separability. A-geometry.

D e f in i t io n 9 Let T be a tree. Let ex and 62 be two non-adjacent edges in T . If

there exists two X-neighborhoods N^(ef) and N\{eo) such that N \ ( e x) r N x (e 2) = (f>,

then ex and eo, are X-separable. T is X-separable if any two non-adjacent edges are

X-separable.

T h e o r e m 3 Any minimal spanning tree over a given set in the plane is X-separable

for A = 4.

P ro o f : Let T be a given m inim al spanning tree. Assume th a t T is not 4-separable.

T hen there exists two non-adjacent edges e\ = p xp 2 and e2 = q\Q2 such th a t e\

and e2 are not 4-separable. Let A4 (e4) and W4 (e2) be two sm allest neighbors of

ex and e2 respectively. T hen lV4 (ei) fl lV4 (e2 ) # <f). By lem m a 1, there are four

possible sm allest neighbors. Since reflections abou t 90° line or about 45° line do

not change the smallest 4-neighborhood.

W ithou t loss of generality, let p x be disconnected from e2 if ex is removed

from T and let qx be disconnected from e4 if e2 is removed. We also assum e the

length of e4 is greater th a n or equal to the length of e2 , i.e. |e4 1 > |e21, where |e|

denotes the length of the edge e,-, (i = 1 , 2 ).


18

I

, S I *

Figure 4. Separability P roof in 4-Geometry.

Let us draw a circle w ith center a t pi and |e j| as radius (See Figure 4.).

N either qi or q2 can be inside the circle, otherwise we can remove e4 and connect

p j to this point to m ake a smaller cost spanning tree. This contradicts the fact

th a t T is a minimum cost spanning tree. Now, let us assum e th a t bo th q\ and

qo lie on the boundary of the circle. Let us divide the plane into eight regions

R i th rough R$ as shown in the Figure 4. The regions, R \ through R 7 are all

considered outside the circle. Under our assum ptions th a t iV4 (ei) fl iV4 (e2) ^ <j>

and |e j| > |e2|, we shall consider positions of qi and q2 in all regions R 1 through

R r.

Case 1 (gi and q2 lie in / ? 4 U R$ U R G): qi and q2 can not bo th he in i ?4 U

R b U Ro, otherwise iV4 (e2) fl iV4 (ej) = <j).

C ase 2 (gi and q2 lie in R G(J R 7) : qx and q2 can not bo th lie in R G U R 7, by

the sam e reasoning as above, if they lie then iV4 (e2) fl iV4 (ei) = <f>.

Case 3 (qi and q2 lie in R 2 U R 2 U R 7): By same argum ents as above, 51 and

q2 can not both lie in R2 U R 2 U R 7 otherwise iV4 (e2) D AT4 (ej) = 4>.


19

Case 4 {q\ and q2 lie ill R 2 U R i U i?4) : <71 and q2 can not both lie in n Rz U

i?i U by same argum ents as above.

Case 5 (<72 lies a t the boundary of R i and R j and q\ is in R 2 U Ry)\ In this

case if d i(q i ,p 2) < |e2|, then we can remove e2 and connect qi to p 2 to

construct a sm aller cost spanning tree. This is a contradiction to the

fact th a t T is a m inim um spanning tree, otherwise d i(q i ,q2) > l^ l-

T he same argum ent leads to the conclusion th a t we can not have the

' neighborhoods of the edges ei and e2 intersect each other.

Case 6 (<71 lies a t the boundary of R i and R 2 and q2 is in Ro U R 2): In this

case if di(q2,p 2) < l ^ l , then we can remove e2 and connect q2 to p2 to

construct a sm aller cost spanning tree. This is a contradiction to the

fact th a t T is a m inim um spanning tree, otherwise di(q2,q2) > \e2\.

T he sam e argum ent leads to the conclusion th a t we can not have the

neighborhoods of the edges e4 and e2 intersect each other. In the same

way, we can discuss the boundary of R 2 and R%.

Case 7 (If q2 lies 011 the boundary of the circle and Ri): In this case since q2

is on the boundary 011 the circle, N i(e2) fl iV4 (e4) = <f>. We need to

consider only the case of qi being in region R$. The boundary case

is the worst case as shown in the Figure 4. qi can not be in R$ since

otherwise \e2\ > |e i| which is a contradiction. In th is case, we know

A^(e2) is of type 2. T hen q2b is parallel to p2c. This ensures th a t

A ^(ei) fl N i(e2) = <j>.

Since we consider all cases which show th a t N i(e{) fl A 4 (e2) — <f>, we con

clude th a t our previous assum ption is impossible. This proves the theorem. H.

T he following theorem establishes a relationship between separability con

cept in different geometries.


20

Figure 5. M ST N onseparable in 2-Geometry B ut Separable in 4-Geometry.

T h e o r e m 4 If a X-MST for given a point set is Xl-separable then this is X2-

separable also for 2 < A* < A2 < oo where X1 and X2 are even positive integers.

P ro o f : It is easy to see th a t enclosing parallelogram of points pi and pi in A2-

geom etry properly lies w ithin the enclosing parallelogram of the sam e points in

Ai-geometry. This is due to the fact th a t smaller legal angles are allowed in

A2-geom etry as com pared to legal angles in Ai-geometry. It follows from the

separability definition th a t if two edges have non-intersecting parallelogram s in

Ai-geometry, then their respective parallelogram s in A2 geom etry will be non

intersecting. 1

It can be seen from Figure 5. th a t the converse of the theorem 4 is not

true. Theorem 3 and 4 lead to the following result.

T h e o r e m 5 Any minimum spanning tree for given a point set in the plane is

X-separable for any even lambda > 4.


CHAPTER IV

ALGORITHM FOR OPTIMAL STEINER TREE IN A-GEOMETRY

As m entioned above, [13] uses separability in rectilinear geom etry to de

velop an algorithm for op tim al steiner tree derivable from minimum spanning tree.

T he inpu t to the algorithm is a separable minimum spanning tree. The basic idea

of th is algorithm is to first find separable M ST in rectilinear geom etry for the

given point set, then construct optim al SM T considering the rectilinear layouts

for each edge of the M ST and maximizing the overlap between the adjacent edges.

We have developed a algorithm to find optim al steiner trees in A-geometry.

O ur algorithm is a generalized version of the one presented in [13] and finds the

optim al steiner tree in A-geometry for any value of A. T he algorithm s ta rts in a

bo ttom up approach by finding the layouts for smaller point sets for the A-MST

edges and then combine these steiner trees recursively in a hierarchical fashion,

to obtain the SM T for the given point set. F irst we investigate the problem of

finding distances in A m etric, which are needed to construct the M ST. We refer

to a M ST in A m etric as A-MST

Given two points pi and po in a two dimensional plane, then A-distance

d is t(p i ,P 2 ,X) refers to the distance between points pi and po, as the sum m ation

of lengths of line segm ents joining these points. These line segments must have

legal directions in A-geometry and dist(pi,po, A) should be minimum am ong all

such paths. [2 2 ] showed th a t the minimum distance between two points consists

of a t most two line segments. Moreover, these line segments make the minimum

possible (legal) angle w ith line segment joining pi and po in Euclidean geometry.

Using th is fact we can determ ine dist(p i,p j, A) for pairs of points in P. We can

now form a com plete graph G = (V, E), such th a t each vertex Vi G V correspond

to point pi and weight of each edge = d ist(p i,p j, A). We can then find

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A-MST by applying the m inim um cost spanning tree algorithm to find the M ST

in graph G. As we proved above th a t A-MST in 4-geom etry and higher geometries

is always separable, then th is implies th a t input to our algorithm is always a

separable A-MST which is a prerequisite to our algorithm to find the optim al

steiner m inim um tree. A fter we find the separable A-MST, we process the A-MST

edges in a bo ttom up fashion by finding the A-2 -layouts and A-3-layouts for each

given edges of A-MST in th e given A-geometry and combining these layouts to get

the best layout using the dynam ic program m ing approach.

T he form ally s ta ted algorithm is as follows

Algorithm LA M BD A -O PT-SM TQ

Input: A-Separable A-MST

Output: O ptim al A-SMT

Begin A lgorithm

Tp := A-Separable A-MST

/* C onstruction of R ooted Tree Tp * /

for all e i E T P = (V ',E ') do

if e,- = leaf edge then

root r = ei

E' = E' - { ei }

for all e,- & T P = {V ',E ') do

V" = V"U {e,} where Tp = {V",E")

/* C onstruction of A-SMT for each edge of Tp * /

/* Let us denote to ta l num ber of possible A-3-layouts of an edge by L3 * /

/* and to ta l num ber of child edges for a given edge by C E * /

m in-layout 0 ;

for i := 1 to L3 of root e

for j := 1 to C E of root edge e in Tp do


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3-layout.y = COM PUTEJLAYOUT(ey)

SAVE(3-layoutjy)

/* C onstruction of O ptim al A-SMT from T r * /

for i := 1 to L3 of e do

for j := 1 to C E of the root edge e in T r do

for k := 1 to L3 for each child edge ey

cur-layout = M ERG E.LA YOU T(layout(eyt ),layout(e,))

if cur-layout < m in-layout then

m in-layout = cur-layout;

/* D etails of the COM PUTE_L AY O U T routine * /

CO M PUTE_LAY OU T(e)

begin

for j := 1 to LZ of e do

for k := 1 to num ber of child edges of e do

if ef. is leaf edge

then Ijk := M E R G E (layou t(ey ),layou t^ ))

else COM PUTE_LAYOUT(e*)

end

end A lgorithm

We im plem ented the algorithm in C on SPA R C station 1+ . To illustrate

our algorithm , let us consider point set in Figure 6 . T he algorithm presented

in [13] produced rectilinear steiner tree w ith a cost 15.00 Using our algorithm

we obtained 4-SM T w ith cost 13.64 and 6 -SM T with cost 13.06 Table 1 shows

the experim ental results ob tained w ith several random ly generated examples. It

can be observed th a t average length of the steiner tree can be reduced by 8.72%

by using 4-geom etry as com pared to rectilinear geometry. However the length is


24

reduced to only 4.18% if 6 -geom etry is used as com pared to 4-geometry. As a

resu lt we conclude th a t for all practical purpose use of 4-geom etry is sufficient

for global routing because higher geometries do not significantly contribute to the

gain.

Table 1

Experim ental R esults for O ptim al A-SMT

Num

of

Points

Rectilinear

Geom etry

4-geom etry 6 -geom etry % G ain

from 2 to 4-

georaetry

% Gain

from 4 to 6 -

geom etry

16 75.00 6 6 .0 0 63.00 1 2 .0 0 4.55

32 99.00 90.00 8 6 .0 0 9.09 4.44

64 140.00 1 1 2 .0 0 107.00 1 2 .8 6 4.46

128 169.00 156.57 152.39 7.36 2.67

256 236.00 216.00 208.47 8.47 3.67

512 317.00 309.00 305.56 2.52 1 .1 1


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I

3

C ost o f 4-SM T =r 13.64C ost o f 2-SM T = 15

C ost of 6-SMT = 13.OB

5

Figure 6 . Exam ple of a Poiut Set.


CHAPTER V

CONCLUSIONS AND FU T U R E RESEARCH

5.1 Conclusions

We study the problem of global routing of m ultiterm inal nets in a general

ized geometry, called A-geometry, in order to reduce the delay and consequently

enhance the perform ance. In A-geometry, edges with angles in f A, for all i, are a l

lowed, where A (> 2) is a positive integer. A = 2 , 4 and oo correspond to rectilinear,

45° and Euclidean geometries respectively. In this thesis, we study separability of

trees in A-geometry. Global routing can significantly be improved by considering

A-geometry because the angles of increasing orientations are allowed as we go to

higher geometries. We show th a t it is possible to find optim al steiner tree in A-

geom etry from minimum spanning trees and develop a polynom ial tim e algorithm .

We prove th a t 4-geom etry is sufficient and there is no need to consider geometries

beyond 4-geom etry for global routing, where the com putational overhead become

too complex and the gain is not considered worth the efforts. This algorithm can

be used by the advanced VLSI design tools in order to reduce the routing length

and hence delay. We have im plem ented the algorithm in C on SPA R C station 1 + .

Experim ental results show th a t our 4-geom etry algorithm perform s 10-12% b e tte r

th a n rectilinear geom etry for random ly point sets for some difficult circuits.

5.2 Future Research

A-geometry can be used in a num ber of VLSI design problems. As the

need for high perform ance increases, the reduction in routing lengths becomes

more im portan t. Since, A-geometry reduces lengths com pared to the rectilinear

geometry, th is can be applied successfully to chip technologies such as Sea-of-Gate

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27

Arrays, O ver-the-Cell R outing, and also M ultichip M odules routing. We plan to

investigate the areas which can be used for A-geometry.


REFEREN CES

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Improved Global Routing Using â‰‰-Geometry

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