Implementing Physics of Failure into the Design Process - DfR … DfR Conference... · 2018. 3....
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Transcript of Implementing Physics of Failure into the Design Process - DfR … DfR Conference... · 2018. 3....
Implementing Physics of Failure into the
Design Process
March 20, 2018
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o Abstracto This course, developed for management level and above, will provide insight into how to
use Physics of Failure (PoF) to enhance the Design Process to create more robust products. Reliability is the measure of a product’s ability to perform its specified function, in its use environment, over the desired lifetime. Utilizing PoF in the design phase is the process for ensuring the reliability of the product or system before a physical prototype is produced. Failure to capture and understand these parameters lays the groundwork for mistakes at the schematic and layout functions.
o To properly perform these assessments requires examination of the new features in a design as well as ways to improve existing features. At the concept phase of a project that would include proper part selection which could include moisture sensitivity levels, ESD classification, manufacturability, materials, and life expectancies. Similarly, the layout of the PWB can have a profound impact on the product’s reliability. This could involve the selection of the laminate and pre-preg materials, the stackup of the layers, and the surface finish. The housing can also have a significant impact on the reliability due to its support structure, materials, and configuration. These parameters, if not properly implemented, can create situations where excess warpage occurs.
o This course will detail these issues from a management perspective and provide insight into the life cycle cost savings potentially achieved through proper implementation.
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o Physics of Failure: Reliability Assurance
o Reliability is the measure of a product’s ability to
o …perform the specified function
o …at the customer (with their use environment)
o …over the desired lifetime
o Physics of failure therefore requires an understanding of
the desired lifetime and the use environment
o Desired lifetime: When the customer will be satisfied
o Use environment: Must include assembly, transportation,
storage, operation
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o What is Physics of Failure (PoF)?
o Also known as reliability physics
o Common Definition:
o The process of using modeling
and simulation based on the
fundamentals of physical
science (physics, chemistry,
material science, mechanics,
etc.) to predict reliability and
prevent failures
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o What is Physics of Failure (PoF)?
o Army: An engineering-based approach to reliability that uses modeling and simulation to eliminate failures early in the design process by addressing root-cause failure mechanisms in a Computer-Aided-Engineering environment
o NASA-JPL: Modeling of failure mechanisms, based on science/ engineering first principles, that support deterministic or probabilistic predictions of reliability and provide a scientific basis for determining the effectiveness of screens or inspections
o DfR Solutions: Leverages the knowledge and understanding of the processes and mechanisms that induce failure to predict reliability and improve product performance
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o The Typical Design Process Flow
o Block Diagram
o Bill-of-Materials (BOM) Development
o Electrical Input – Schematic, Critical Components
o Mechanical Input – Housing, Mounting
o Preliminary Design Review
o Critical Design Review
o Where to insert Reliability Physics?
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o Management Insertion of Reliability
Physics into Design Process
o Specification Development
o Capture Reliability Goals
o Don’t use outdated MTBF
o Define Use and Test Environments
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o Reliability at Schematic Review
o Review specifications
o Look at all components from the perspective of proper derating
o Look at susceptibility from Electro-Static-Discharge (ESD)
o Look at susceptibility from EMI/EMC and Safety
o Look at external loads and impact on thermal conditions
o Look at operation with respect to the use environment
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Understand Your Use Environment
o Use standards when…
o Certain aspects of your environment are common
o No access to use environment
o Measure when…
o Certain aspects of your environment are unique
o Strong relationship with customer
o Do not mistake test specifications for the actual use
environment
o Common mistake with vibration loads
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Use Environment
o The critical first step is a good understanding of the shipping and
use environment for the product
o Do you really understand the customer and how they use your
product (even the corner cases)?
o How well is the product protected during shipping (truck, ship, air,
storage etc.
o Do you have data or are you guessing?
o Temperature/humidity, thermal cycling, ambient temperature,
o Salt, sulfur, dust, fluids, etc.
o Mechanical Cycles (lid cycling, connector cycling, torsion, etc.
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Use Environment –
Failure Inducing Loads• Temperature Cycling
– Tmax, Tmin, dwell, ramp times• Sustained Temperature
– T and exposure time• Humidity
– Controlled, condensation• Corrosion
– Salt, corrosive gases (Cl2, etc.)• Power cycling
– Duty cycles, power dissipation• Electrical Loads
– Voltage, current, current density– Static and transient
• Electrical Noise• Mechanical Bending (Static and Cyclic)
– Board-level strain• Random Vibration
– PSD, exposure time, kurtosis• Harmonic Vibration
– G and frequency• Mechanical shock
– G, wave form, # of events
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Use Environment – Thermal-Case Study
Container and Ambient Temperature
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Hours
Te
mp
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ture
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)
Container Temp (°C)
Outdoor Temp (°C)
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PART SELECTION
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o Part Selection
o The process of creating the bill of materials
(BOM) during the ‘virtual’ design process
o Before physical layout
o For some companies, this is during the creation of
the approved vendor list (AVL)
o Design-independent
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o Part Selection
o As technology progresses, functional performance has
become a limited aspect of the part selection process
o Other concerns are increasingly taking center stageo Moisture sensitivity level (MSL)
o Temperature sensitivity level
o Electrostatic discharge (ESD) classification
o Manufacturability (Design for Assembly)
o Plating material
o Lifetime / Long-term reliability
o Sometimes Physics of Failure is required
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o Part Selectiono KIS: Keep it Simple
o New component technology can be very attractive
o Not always appropriate for high reliability systems
o Be conservative
o Reality: Marketing hype far exceeds actual implementationo Component manufacturers typically use portable sales to boost
numbers
o Claim: We have built 100’s of millions of these components without a single return!
o Actuality: All sales were to two cell phone customers with lifetimes of 18 months
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o Critical Componentso What is susceptible to long-term degradation in electronic designs?
o Ceramic Capacitors (oxygen vacancy migration)
o Memory Devices (limited write cycles, read times)
o Electrolytic Capacitors (electrolyte evaporation, dielectric dissolution)
o Film Capacitors
o Resistors (if improperly derated)
o Silver-Based Platings (if exposed to corrosive environments)
o Relays and other Electromechanical Components
o Light Emitting Diodes (LEDs) and Laser Diodes
o Connectors (if improperly specified and designed)
o Tin Whiskers*
o Integrated Circuits (EM, TDDB, HCI, NBTI)
o Interconnects (Creep, Fatigue)
o Plated through holes
o Solder joints
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o Moisture Sensitivity
Level (MSL)
o Popcorning controlled through moisture sensitivity levels (MSL)
o Defined by IPC/JEDEC documents J-STD-020D and J-STD-033B
o Higher profile in the industry due to transition to Pb-free and more aggressive packaging
o Higher die/package ratios
o Multiple die (i.e., stacked die)
o Larger components
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o MSL Issueso Identify your maximum MSL
o Driven by contract manufacturer (CM) capability and OEM risk aversion
o Majority limit between MSL3 and MSL4 (survey of the MSD Council of SMTA)
o High volume, low mix: tends towards MSL4Low volume, high mix: tends towards MSL3
o Not all datasheets list MSLo Can be buried in reference or quality documents
o Ensure that listed MSL conforms to latest version of J-STD-020
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o Temperature Sensitivityo Limits on process temperatures provided by component
manufacturer
o Components of concern with SnPb (220C peak) included RF devices and some optoelectronic components
o Broader issue with Pb-free processes (260C peak)
o Initially limited: SnPb reflow sensitive components, SMT connectors, ceramic capacitors, SMT electrolytic capacitors
o Primary issue for some OEMs
o Current component packagingtechnology is insufficiently robust
o Numerous components in a telecom / enterprise design now have peak temperatures below 260C
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o Part Selection for ESD
o Industry movement to decreasing feature sizes and
high frequency technology
o 90nm 65nm 45nm 22nm 14nm 8nm
o GaAs / SiGe desirable at high GHz
o Increasing ESD risks
o More parts are ESD susceptible
o ESD sensitivity is increasing due to the reduced
geometries
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o Part Selection for ESD
o Know the ESD rating for each part and select parts
with the best ESD rating
o Identify all ESD Sensitive Parts on drawings
o Mark Locations of ESD Sensitive parts on the Board with the
ESD symbol
o Be aware that the appropriate ESD rating is driven
by part location
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o Part Selection – Plating Materials
o What are Tin Whiskers?
o Metallic filaments that grow from tin
plating
o Initiate due to stress gradients within the
plating
o If the whisker grows to a sufficient
length and in the correct orientation, it
can induce an electrical short to an
adjacent conductor
o Other potential failure modes include
electromagnetic interference (for signals >
6 GHz) and foreign object debris (FOD)
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o Component Wearout
o New technology nodes (65nm, 45nm,
etc.) are resulting in new process
technology, increasing failure rates,
and concerns about end of life
1995 2005 2015
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Mean
Service
life, yrs.Computers
laptop/palm
cell phones
Airplanes
Telecom
Medical
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Technology
Reliability
Gap
1995 2005 2015
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Mean
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life, yrs.Computers
laptop/palm
cell phones
Airplanes
Telecom
Medical
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Technology
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Gap
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o Component Wearout
o Ceramic Capacitors
Ceramic chip capacitors with high capacitance / volume (C/V) ratios
Can fail in less than one year when operated at rated voltage and temperature
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o Solder Wearout
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o PoF for the Printed Circuit Board
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o PoF for the Printed Circuit Board
o PCB Composition
o Dielectric material is laminated between layers of metal
conductors or other conductive media.
o The conductive circuit is generally copper.
o Soldermask material insulates the outer layer conductive
surface and prevents solder flow to areas that are
“masked” or covered.
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o Surface Finish – Importanceo The selection of the surface finish to be used on your PCBs
could be the most important material decision made for the electronic assembly.
o The surface finish influences the process yield, the amount of rework necessary, field failure rate, the ability to test, the scrap rate, and of course the cost.
o One can be lead astray by selecting the lowest cost surface finish only to find that the total cost is much higher.
o The selection of a surface finish should be done with a holistic approach that considers all important aspects of the assembly.
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o Considerations with Surface Finish Selection
o Cost sensitivity
o Volume of product (finish availability)
o SnPb or LF process
o Shock/Drop a concern?
o Cosmetics a concern?
o User environment (corrosion a concern)?
o Fine pitch assembly (<0.5 mm)
o Wave solder required (PCB > 0.062”)
o High yield ICT is important
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o Surface Finish Attributes
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o Surface Finish Summary
o The surface finish you select will have a large influence on quality, reliability and cost.
o It is a complex decision that impacts many areas of the business.
o Select a finish that optimal for the business (and not just one function).
o Know that there are engineering tricks to improve on weak areas of each finish.
o Stay current in this field because new developments continue to be made.
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o PWB Assessment
o How base laminate material and pre-preg are
specified
o Tg of material, CTE and Modulus
o Layer Stack-up
o Plated Through Holes (PTH)
o Pad structures for optimum reliability
o Trace routing
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o Stack-up
o As the speeds and complexity of electronic components has continued to
climb, the importance of PCB stackup analysis in the overall design
process has become more and more important. The common practice of
leaving the vital PCB stackup design in the hands of the PCB fabrication
company’s fabrication engineers carries with it significant hazards. It is
often the case that the only criteria given to a fabricator is the overall
number of layers, desired total thickness and expected impedance of the
transmission lines (if any). A much better approach is for the design team
to provide the fabricator with all of the information necessary for
creating a printed wiring board that is fully compliant to the
specifications. DfR recommends putting both the laminate and prepreg
layers into the stackup to avoid any confusion during fabrication.
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o Plated Through Holeso When exposed to thermal cycle stresses, cracks can initiate then
propagate around the copper barrel wall of plated through holes (PTH) until the via becomes an intermittent or fully open circuit. As the crack propagates, the resistance of the via increases and its current carrying capabilities increase. The increased resistance may cause small signal circuits to drift outside of operating parameters. The reduced current carrying capability may cause large power circuits to overheat and to fuse into an open circuit condition.
o PTH barrel cracks starts at a stress-driven crack initiation site in the copper of the PTH barrel. Continued exposure to stress cycles can then advance the crack through the electrodeposited copper layers around the barrel wall. The higher stresses experienced in a Pb-free soldering profile have a greater chance of causing the via copper to yield.
o A measurement of the smallest vias noted on the fabrication drawing checks for issues with the aspect ratio.
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o Pad Designs
o DfR has found that the bulk of pad design issues are associated with
the footprints and stencil parameters for QFN/DFN type packages.
DfR recommends 65-80% coverage of the thermal pad in a
windowpane construction to permit paths for flux and additives to
escape during reflow. The lower left image is an example. On the
right, the image shows a 100% coverage…Why is this bad?
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o QFN, DFN, SON, CSP Solder Joints
o The images below show the correct and incorrect way that QFN device
types solder joints should appear. The left image shows the proper
appearance of the joints for both the thermal pad and the I/O pads.
The center image shows an acceptable thickness for the bondline while
the right image shows a bulbous joint for an I/O because the thermal
pad print was too thin and pulled the part down closer to the board
and pushed out the solder paste on the I/O joint.
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Trace Routing
o Trace routing needs to be done to avoid unnecessary kinks
and also acid traps in fabrication. DfR assesses the layout
for this situation as shown below
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o Conformal Coating and Potting
o Rules of Thumb
o The use of potting compounds and thick conformal coatings greatly influences the failure behavior under temperature cycling
o Any time a material goes through its glass transition (Tg) temperature problems tend to occur
o Potting materials can cause PCB warpage and tensile stresses on electronic packages that greatly reduce time to failure
o Selection of the correct material for coating or potting is critical
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o Conformal Coatingo Conformal coating is applied to circuit cards to provide a
dielectric layer on an electronic board. This layer functions as a membrane between the board and the environment. With this coating in place, the circuit card can withstand more moisture by increasing the surface resistance or surface insulation resistance (SIR). With a higher SIR board, the risk of problems such as cross talk, electrical leakage, intermittent signal losses, and shorting is reduced.
o This reduction in moisture will also help to reduce metallic growth called dendrites and corrosion or oxidation. Conformal coating will also serve to shield a circuit card from dust, dirt and pollutants that can carry moisture and may be acidic or alkaline.
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o Conventional Materials
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o Selecting the Right Materialo Selecting the appropriate coating based on the
application will reduce the risk of failure. o For instance, an acrylic coating would not be the ideal choice for
an automotive application, because this coating type tends to soften (low glass transition temperature, Tg) with the high temperatures and exposure to moisture or petroleum residues.
o A better choice might be a silicone coating, which has a usable operating range of -55°C to +200°C and offers resistance to high humidity environments.
o An ultraviolet (UV) cured coating may not be the best choice if the assembly in question has high-profile components. Shadowing can leave uncured coating which compromises the reliability of the PWB. Some coating manufacturers address this issue by adding catalysts which act as a secondary cure mechanism.
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o Tg Behavioro Near the glass transition temperature (Tg), CTE changes more rapidly than
modulus
o Changes in the CTE in polymers tend to be driven by changes in the free volume
o Changes in modulus tend to be driven by increases in translational / rotational movement of the polymer chains
o Increases in CTE tend to initiate before decreases in modulus because lower levels of energy (temperature) are required to increase free volume compared to increases in movement along the polymer chains resulting in high stresses generated due to CTE increase before modulus decrease
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o Enclosure
o Material selected
o Exposure environment
o Potential Failure Modes
o Cracking
o Humidity
o Weathering
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o Design Considerations
o Housing materials
o Flatness (e.g sheet metal support)
o Temperature Range of Operation in Field
o Potential for Overconstrained condition
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o Overconstrained Boards
o Things to think about
o The three cases to consider
o Board bonded to plate
o Heat sink attached to board
o Board attached to housing
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o Overconstrained Boards
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o Overconstrained Boards
o Baseline Case
o Simple board
o This is our standard
Sherlock tutorial board
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o Overconstrained Boards
o Board bonded to Plate
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o Overconstrained Boards
o Board bonded to Plate
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o Overconstrained Boards
o Board bonded to Plate Results
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o Overconstrained Boards
o Board With Heat Sink
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o Overconstrained Boards
o Board With Heat Sink Results
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o Overconstrained Boards
o Board Attached to Housing
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o Overconstrained Boards
o Board Attached to Housing – Results
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o Overconstrained Boards
o Added More Mount Points
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o Overconstrained Boards
o Buckling at Low Temperatures
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o Overconstrained Boards
o Summarization
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o Why DfR? Faster Time to Market
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o Summary
o To avoid design mistakes, be aware that functionality
is only the beginning
o Be aware of industry best practices
o When to use heuristic rules; when to use physics of failure
o Maximize knowledge of your design as early in the
product development process as possible
o Do not overly rely on supplier statements
o Their view: Reliability is application dependent
