Implemented chip H. SCANNER R E R N IMAGE SENSING D T E N ...
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8X8 PIXEL BLOCK H. SCANNER V . ( B L O C K ) S C A N N E R (i,j) (M, N) (0, 0) ADC/Q E N T R O P Y C O D E R B U F F E R O U T P U T q IMAGE SENSING ARRAY C o u p l i n g t r a n s i s t o r s R e a d o u t c i r c u i t s ( 8 c h a n n e l s ) 8 8 1 - D D C T A n a l o g M e m o r y 1 - D D C T A n a l o g M e m o r y A A B B A B Analog 2-D DCT processor Implemented chip
Transcript of Implemented chip H. SCANNER R E R N IMAGE SENSING D T E N ...
8X8 PIXEL BLOCK
H. SCANNER
V. (
BL
OC
K)
SC
AN
NE
R
(i,j)(M, N)
(0, 0)
ADC/Q
EN
TR
OP
Y C
OD
ER
BU
FF
ER
OU
TP
UT
q
IMAGE SENSING ARRAY
Co
up
ling
tra
nsi
sto
rs
Rea
d o
ut
circ
uit
s
(8
chan
nel
s)
881-
DD
CT
An
alo
gM
emo
ry
1-D
DC
T
An
alo
gM
emo
ryA
AB
B
A
B
Analog 2-D DCT processor
Implemented chip
H. Scanner
V. (
Blo
ck)
Sca
nn
er
Co
up
ling
tra
nsi
sto
rs
ch.1ch.2ch.3ch.4ch.5ch.6ch.7ch.8
Vbp1
Vbp2
V
bn1V
bn2
VREF
1 2
2
1
1
Ou
tpu
t
(0,0)
(i,j)
Image Sensing Array
pixel
HSCAN
VS
CA
N8 x 8 pixels
HSCAN
VS
CA
N
sig
nal
lin
es
Rea
d o
ut
VSCAN(j)
(j-1)
(j+1)
signal line
Co
up
ling
tr
ansi
sto
rs
Analog
Memory
(8 x 8)
F(u
,0)
F(u
,7)
F (0) F (7)k
Timing
Controller
Mu
ltip
lexe
r
f(0,
k)f(
7,k)
k
F (
u)
F (
u)
07
1-D DCT
clock
F(0), F(4)
f(0)
f(1)
f(2)
f(3)
f(4)
f(5)
f(6)
f(7)
F(2), F(6) F(1), F(7) F(3), F(5)
A1 A2 B0
A0
MUL26MUL04d d
MUL04d -d
b f
f -b
MUL04d -d
MUL04d -d
MUL04d d
MUL04d d
MUL04d d
MUL04d -d
MUL26
-f b
-b -f
MUL26
-b -f
-f b
MUL26
f -b
b f
MUL17
a g
c -e
e c
g -a
MUL17
-g a
-e -c
-c e
-a -g
MUL35
c e
-g -a
-a g
-e c
MUL35
e -c
a -g
g a
-c -e
A1 A2 B0 A1 A2 B0 A1 A2 B0
(a)
MUL26
b f
f -b
f(0)
f(1)
b
f
A1 A2 B0
(b)
