DHD PROJECT REPORT

Implementation of the Game of Snakes on 8X8 LED Matrix

Efforts by Ankush Garg 2003CS10155 Rohan Paul 2003CS50221

Group 3 Overview The project aims at implementing single player game of snake on LED matrix provided on the INCODE board. The up, down, left or right motion of the snake is controlled by the use via keyboard interface. The user can restart or pause the game at any stage. The score and the snake displayed remains frozen during pause state and play is resumed when pause button is pressed again. The score and the snake get reinitialized only when the restart button is pressed. After consuming four food items the speed of operation is incremented. We have implemented 8 speed operations and the maximum score of 256 can be displayed. The rules of the game are as follows:

1. At the start of the game the length of the snake is one unit. At each successive consumption of food item its length increases by one unit to a maximum of four units.

2. If the head of the snake reaches either of the four boundary walls the player loses the game.

3. After the consumption of the food item the points tally increases by one unit. 4. Whenever the score is a multiple of four the speed of the snake increases by one

unit. The implementation has been divided into the following top level modules

• Input • Control • Clock Generation • Constraint Checking • Score • Random Number Generator • Display

In the following section we would analyze the I/O specs and functionality of each module. SECTION 1 1) Input Module

• KEYLATCH module Input: Keyboard Inputs Outputs: UP HASH LEFT STAR DOWN RIGHT Functionality Decodes the user inputs and produces signals used by the state machine. Signal HASH is equivalent of pause and STAR indicates restart. We have used the standard Keyboard interface available in the lab.

2) Control

• STATEDIR Inputs: UP Outputs: RESTART

DOWN PAUSE LEFT ROWSEL (1:0) RIGHT COLSEL (1:0) STAR HASH CLK

• GENLOC module Inputs: ROWSEL (1:0) Outputs: ROWOUT (3:0) COLSEL (1:0) COLOUT (3:0) ROW (3:0) COL (3:0) Functionality This module generates A) Row, Row +1, Row -1 b) Column, Column +1, Column -1 The appropriate combination is selected using ROWSEL and COLSEL (2-bit inputs) from the multiplexers for both row as well as columns. We have taken the coordinate system with origin at top right corner of the matrix Direction Control Requirements:-

Direction to move Row Col ROWSEL COLSELUp R-- C 00 10 Down R++ C 01 10 Right R C-- 10 00 Left R C++ 10 01 Logic Synthesis (Truth Table):- Inputs Outputs U D L R R1 R0 C1 C01 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0 0 1 1 0 0 0 Logic Equations:- R1 = L or R R0 = D C1 = U or D C0 = L

3) Clock Generation

• CLOCKSNAKE Input: CLKSEL Output: CLKSNAKE Functionality The module produces eight different clocks which are multiplexed with CLKSEL acting as the multiplexer select. Whenever the user consumes a fixed number of food items the speed of operation is incremented. This is done by incrementing the CLKSEL. The maximum speed of operation is 15K Hz and lowest being 1K Hz.

4) Constraint Checking

• OVERFLOW & EQUAL modules Inputs: HEADC (3:0) Outputs: EQ /OVERFLOW ROWC (3:0) Functionality The snake has the following constraints on the coordinates of the head(R,C) a) 0<R<8 b) 0<C<8 c) R != HEADX d) C != HEADY We use comparators to see if the snake goes out of bounds or when it consumes the food.

Each scenario is indicated by generating EQ or OVERFLOW signal.

5) Score • SCORER module

Inputs: EQ Outputs: SCOREVAL (7:0) RESTART SNNUM (3:0) CLKADD (3:0) Functionality Signal EQ is generated whenever the coordinates of the head are the same as the food. This signal acts as clock for an 8 bit counter which indicates the score. EQ is also clock for another 2 bit counter whose TC acts as the clock for a 4 bit counter that generates CLOCKADD. Whenever 4 food items are consumed the TC increments the count value CLKADD, which selects a faster clock from the CLOCK module. We decode clock address of eight since only 8 different clock speeds are available. Beyond that the clock enable for the CLKADD counter goes low thereby preventing an increase in its value. Another 4 bit counter is used to generate SNNUM that determines how many snake elements should be displayed. This number is incremented by using EQ as clock till it reaches four (the maximum permitted snake length) beyond which the clock enable for this counter goes down. The restart signal asynchronously reinitializes all counters to zero.

6) Random Number Generation

• GENRAND module Input: Gen Random Outputs: ROM (3:0) (row coordinates) ROM (7:4) (row coordinates) Functionality This module possesses a ROM (256*8) containing random row and column coordinates generated using a C++ program. A new random coordinate is generated when the snake consumes food (head coordinates equal food coordinates).

7) Display • MUXLED module

Inputs: SNNUM (3:0) Output: MUXSEL (3:0) CLOCK (490 Hz) Functionality At any point of time we need to display 1 food LED and a variable number (n) snake segments. We increment SNNUM (the present number of segments to be displayed) to form the signal SUM. This acts as an upper bound for the MUXSEL signal that indicates which LED should be brightened. MUXSEL is actually muxselect for the multiplexer that has the rows and columns for each display element as input. As soon as MUXSEL becomes greater than SUM, the comparator generates LD signal that asynchronously resets the counter to zero. The counter is run at display speed of 490 Hz.

• LED11module Inputs: ROW (3:0) Output: COLi, RAi, RBi (0<= i <=7) COL (3:0) Functionality Module takes the coordinates of single LED to be displayed as input and generates the relevant signals for the LED matrix. It acts as a mapping from (R,C) coordinates in our coordinate system to the LED's on the matrix.

• LEDBIG module Inputs: S0R (3:0) S0C (3:0) Outputs: Outputs of LED11 module S1R (3:0) S1C (3:0) S2R (3:0) S2C (3:0) S3R (3:0) S3C (3:0) MUXSEL (3:0) OVERFLOW RESTART Functionality The MUXSEL selects which coordinate needs to be shown and sends the selected coordinate to a 2:1 mux. eg. If MUXSEL is 0000 then we select the food for display If MUXSEL is 0010 then we select segment1 of the snake for display A ROM containing 256 numbers is used to generate the smiley face which is displayed once the snake goes out of bounds. An 8 bit counter supplies the address for the ROM to sequentially display the points. The coordinates are sent to The overflow signal is latched using a FF. When the snake is within bounds the snake as well as the food is shown. As soon as it goes outside the boundary overflow becomes high and the display coordinates for the smiley face are selected.

SECTION 2

• Implementation Data:- CLB utilization 273 / 400 CLB FF's 123 Four input LUT 467 Three input LUT 191 ROMs (32 X 1) 128 BUFF 128 / 880

• Timing Analysis:- Min Period 30.292 ns Max Combinational Path Delay 47.963 ns Max. Net Delay 14.7222 ns

• Interconnect Data Number of Paths 39885 Number of Nets 439 Number of connections 2577

SECTION 3 Observations and Conclusions

1) The snake can be displayed with accuracy only when the display frequency is within 1K. Beyond that the brightening of multiple LEDs distorts the display.

2) Several pins on CN 21 are non-operational. Some of the interconnects also interfere with other connectors (maybe due to shorting) and cause irregularities in the display of rows. However the column display remains unaffected.

3) The design of each sub-module should be thoroughly tested and simulated before placing it in the final design .At the subsystem level careful timing analysis via timing diagrams is essential to ensure correct functionality.

UCF FILE The following connections have to be made on the FPGA Board. 1) 13 to 20 for Keyboard NET R0 LOC = P14; NET R1 LOC = P15; NET R2 LOC = P16; NET R3 LOC = P17; NET C0 LOC = P18; NET C1 LOC = P19; NET C2 LOC = P20; 2) 9 to 14 for 8X8 led-display 3) 12 to 17 for 8X8 led-display NET COL0 LOC = P38; NET COL1 LOC = P37; NET COL2 LOC = P36; NET COL3 LOC = P35; NET COL4 LOC = P45; NET COL5 LOC = P44; NET COL6 LOC = P40; NET COL7 LOC = P39; NET RA0 LOC = P56; NET RA1 LOC = P65; NET RA2 LOC = P48; NET RA3 LOC = P59; NET RA4 LOC = P60; NET RA5 LOC = P47; NET RA6 LOC = P46; NET RA7 LOC = P49; NET RB0 LOC = P61; NET RB1 LOC = P67; NET RB2 LOC = P68; NET RB3 LOC = P69;

NET RB4 LOC = P58; NET RB5 LOC = P57; NET RB6 LOC = P62; NET RB7 LOC = P66;