IMPLEMENTATION OF OFDM TRANSMITTER AND RECEIVER FOR FPGA BASED APPLICATIONS

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Indian Streams Research Journal

KEYWORDS-

Orthogonal Frequency Division Multiple (OFDM), Fast Fourier Transform (FFT),FieldProgrammable Gate Array (FPGA).

I.INTRODUCTION

The current communication systems tend to use OFDMsystems in order to provide high datarates, minimize inter symbol interference and fading effect. Some examples areDigital Video Broadcasting(DVB), Wireless USB or WirelessFirmware among others. Trying to provide a solution to thenew devicesemerging, slow standard adoption, poor spectrum use, etc. This work presents an FPGA design, validationandimplementation of an Orthogonal Frequency Division Multiplexing (OFDM)transceiver using a highlevel design tool and also reports the resources requirements for the presented system.OFDMallows manyusers to transmit in an allocated band, by subdividing the available bandwidth into many narrow bandwidthcarriers. Each user is allocated several carriers in which to transmit their data. The transmission is generatedin such a way that the carriers used are orthogonal to one another, thus allowing them to be packed togethermuch closer than standard frequency division multiplexing (FDM). This leads to OFDM providing a highspectral efficiency.

II.OFDM FUNDAMENTALS

OFDM is a special case of multi-carrier transmission,

where a single data stream is transmitted over a number of lower rates sub-carriers. On classical

Abstract:

Orthogonal Frequency Division Multiplexing (OFDM) has become verypopular, allowing high speed wireless communications. OFDM could be consideredeither a modulation or multiplexing technique and its hierarchy corresponds to thephysical and medium access layer. In this project the OFDM transmitter and receiverwill be implemented with full digital techniques and also reports the resourcesrequirements for the presented system.VHDL will be used for RTL description and FPGAsynthesis tools will be used for performance analysis of the proposed core. The VHDLimplementation allows the design to be extended for either FPGA or ASICimplementation, which suits more for the Software Defined Radio (SDR) designmethodology.Modelsim XilinxEdition will be used for functional simulation andverification of results. Xilinx ISE will be used for synthesis. The Xilinx's Chipscope toolwill be used for verifying the results on Spartan 3E FPGA.

IMPLEMENTATION OF OFDM TRANSMITTER ANDRECEIVER FOR FPGA BASED

APPLICATIONS

N.KAVITA AND M.MADHU BABU

Dept. of Electronics & CommunicationsG. Pulla Reddy Engineering College, Kurnool (Dist), AP, India

Dept. of Electronics & CommunicationsG. Pulla Reddy Engineering College, Kurnool (Dist), AP, India

ORIGINAL ARTICLE

ISSN:-2230-7850METHODS ENRICHING POWER & ENERGY DEVELOPMENTS (MEPED'13)

thApril 12 , 2013


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frequency division multiplexing the total band is divided into N non-overlapping frequency channels,while on OFDM the band is divided into a number of overlapping frequency channels but with orthogonalfrequencies, the consequence is a better use of the available spectrum. Those orthogonal frequencies couldbe achieved by the IFFT.

Each subcarrier has a different frequency. Frequencies chosen so that an integral number of cycles ina symbol period and Signals are mathematically orthogonal.A technique which allows an arbitrary number of symbol shapes to be distinguishable is orthogonal

signaling. Orthogonality describes the degree to which a pair of di?erent pulse shapes is independent or

unrelated.Functions n(t) and m(t) are orthogonal with respect to each other over the interval a < t < b if,

Note that this is a continuous version of the vector dot product. The idea is that given a certainbandwidth of out pulse shapes there can be entire sequences of functions that are orthogonal. If we have aset of functions {1(t), 2(t), . . , n(t), . .} and each function is orthogonal to each other function.

A.OFDM in A Multipath Environment

Data is transmitted in parallel without interference.

To generate OFDM successfully the relationship between all the carriers must be carefullycontrolled to maintain the orthogonality of the carriers. For this reason, OFDM is generated by firstlychoosing the spectrum required, based on the input data, and modulation scheme used. Each carrier to beproduced is assigned some data to transmit. The required amplitude and phase of the carrier is thencalculated based on the modulation scheme (typically differential BPSK, QPSK, or QAM).

IMPLEMENTATION OF OFDM TRANSMITTER AND RECEIVER FOR.............

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nd rd

Twopossible


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The orthogonal carriers required for the OFDM signal can be easily generated by varying theamplitude and phase of each frequency bin, then performing the IFFT. Since each bin of an IFFTcorresponds to the amplitude and phase of a set of orthogonal sinusoids, the reverse process guarantees thatthe carriers generated are orthogonal.

III. SYSTEM DESIGN

A basic OFDM system consists of a QAM or PSK modulator/demodulator, a serial to parallel /parallel to serial converter, and an IFFT/FFT module. The iterative nature of the FFT and its computationalorder makes OFDM ideal for a dedicated architecture outside or parallel to the main processor. Using FPGAinstead of an ASIC gives also flexibility for reconfiguration, which is a need for the Software Defined Radio(SDR) concept. The focus of this work is to validate the suitability of reconfigurable devices such as FPGAstoperform Intermediate Frequency (IF) processing to support SDR

A. OFDM Transmitter

1)Input Sampler IQ Gen:This block samples the serial input and generates 2 bit IQ output. Thefollowing techniques are used to implement this block 1) Serial input (in data) is assigned to the LSB of one

internal Shift Register (sig IQ). 2) Finally sig IQ is assigned to the 2bit Output (IQ data).2) Symbol Mapper: This block consist of a number of ROMs containingthe constellation mapping

for each of the specifiedmodulation schemes (QPSK, 16-QAM and 64-QAM),two multiplexers whichselect the In Phase andQuadrature data from the desired modulation schemestored on ROMs.

This block maps the input I, Q to the corresponding to the real part and imaginary part of theconstellation symbols.

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Cloc

k

Inp

Sy

Serial to IFFT

OFDMsignal

Inputbits



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3) Serial to Parallel Conversion: This block is used in OFDM Transmitter, to convert serial input to paralleloutput. This block's output is given to the input of IFFT.The input serial data stream is formatted into theword size required for transmission, e.g. 2 bits/word for QPSK, and shifted into a parallel format. The datais then transmitted in parallel by assigning each data word to one carrier in the transmission.

4) Inverse Fast Fourier Transform: The following techniques are followed to implement the IFFTusing FFT. After the required spectrum is worked out, an inverse Fourier transform is used to find thecorresponding time waveform. This act like to Frequency domain to time domain signal translator. Belowfigure shows internal architecture of IFFT

B.OFDM Receiver

1) Fast Fourier transforms: On the receiver side the FFT is implemented and the signal is translated fromtime domain to frequency domain.In VHDL implementation the FFT block is used to compute the IFFT byreversing the real & Imaginary at input and output side and further dividing by 8.Above figure shows FFT-decimation in frequency

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k

distribut

Symb

olDe-

mappe

r

parallel

toseri

alcon

verter

FFT

OFDM

signal

Demodul

atorbit

generato

r



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IV .TOP MODULE FOR OFDM TRANSMITTER AND RECEIVER SYNTHESIS REPORT

A. Advanced HDL Synthesis Report

TABLE : Macro Statistics

TABLE II: Final Results

TABLE III: Device utilization summary

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ROMs 65

4x2-bit ROM 65

Multipliers 64

14x14-bit multiplier 64

Adders/Subtractors 193

14-bit adder 193

Counters 4

4-bit up counter 2

6-bit up counter 1

8-bit up counter 1

Registers 354

Flip-Flops 354

Comparators 1

14-bit comparator greater 1

Multiplexers 1

1-bit 140-to-1 multiplexer 1

XORs 256

1-bit xor2 256

RTL Top Level Output File Name top_OFDM_tx_and_rx.ngr

Top Level Output File Name top_OFDM_tx_and_rx

Output Format NGC

Optimization Goal Speed

Selected Device : 3s500efg320-4

Number of Slices: 3839 out of 4656 82%

Number of Slice Flip Flops: 241 out of 9312 2%

Number of 4 input LUTs: 7026 out of 9312 75%

Number of IOs 3

Number of bonded IOBs: 3 out of 232 1%

Number of MULT18X18SIOs: 16 out of 20 80%



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TABLE IV: Timing Summary

TABLE V:Design Statistics

V.SIMULATION

After architecture of the processor is modeled in VHDL. Modelsim Xilinx Edition will be used forfunctional simulation and verification of results. Xilinx ISE will be used for synthesis.Spartan 3E FPGAboard: synthesis & verifying results on the FPGA hardware. Xilinx Chipscope tool will be used forverifying the results on Spartan 3E FPGA.

Hardware architecture for the proposed design wasdeveloped, realized in VHDL. The realizedarchitectures was tested and validated the outputs are generated by a hardware simulation using

Modelsim.Simulation results are given in below Figure. 1 And Figure. 2

VI. CONCLUSION

In this paper, OFDM has been studied and implemented for transmitter and receiverand Its applications have been extended from high frequency radio communications to telephonenetworks, digital audio broadcasting and terrestrial broadcasting of digital television. The advantages of

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Speed Grade -4

Minimum period: (Maximum Frequen cy: 9.917MHz) 100.835ns

Minimum input arrival time before clock 5.204ns

Maximum output required time after clock 6.420ns

Maximum combinational path delay 2.126ns

IOs 227

Cell Usage

BELS 6535

GND 1

INV 214

LUT1 148

LUT2 860

LUT2_D 1

LUT3 488

LUT4 1027

MUXCY 1977

VCC 1

XORCY 1818

Flip-flops/Latches 74

FDC 6

FDCE 4

FDE 64

Clock Buffers 1

BUFGP 1

IO Buffers 226

IBUF 2

OBUF 224

MULTs 16



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OFDM, especially in the multipath propagation, interference and fading environment, make thetechnology a promising alternative in digital communications including mobile multimedia. Therefore thisdesign can be applied to real-time signal processing system, which completes the main computing modulesin the OFDM for multi services.

REFERENCES

Lenin Gopal*, Daniel Wong Sing Tze, Nur Zawanah Ishak Design of an FPGA-Based OFDM

Transceiver for DVB-T Standard , School of Engineering and Science, Curtin University Sarawak

Malaysia Miri, Sarawak, Malysia

On the design of an FPGA-Based OFDM modulatorfor IEEE 802.16-2004, Joaqun Garca, Ren

Cumplido, Department of Computer Science, INAOE, Puebla, Mexico,[email protected],

[email protected]

E.Lawrey, Multiuser OFDM, in Proc. International Symposium on Signal Processing Applications '99

vol2, 1999, pp.761.764.

Ahmad sghaier,Shawki Areibi and Bob Dony School of Engineering , Guelph ,Guelph ON

Canada N1G2W1 ,A Pipeline Implementation OfOFDM Transmission On Reconfigurable Plateforms

Joaqun Garca, Ren CumplidoDepartment of Computer Science, INAOE, Puebla, Mexico On the

design of an FPGA-Based OFDM modulator for IEEE [email protected],

[email protected]

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IMPLEMENTATION OF OFDM TRANSMITTER AND RECEIVER FOR FPGA BASED APPLICATIONS

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