IFR Praha 2004, 16 th April 2004Václav Vrba, Institute of Physics, AS CR 1 Václav Vrba Institute...
12
IFR Praha 2004, 16 th April 2004 Václav Vrba, Institute of Physics, AS CR 1 Václav Vrba Institute of Physics, AS CR, Prague Silicon sensors status
-
Upload
carol-dawson -
Category
Documents
-
view
213 -
download
1
Transcript of IFR Praha 2004, 16 th April 2004Václav Vrba, Institute of Physics, AS CR 1 Václav Vrba Institute...
IFR Praha 2004, 16th April 2004 Václav Vrba, Institute of Physics, AS CR 1
Václav Vrba
Institute of Physics, AS CR, Prague
Silicon sensors status
IFR Praha 2004, 16th April 2004 Václav Vrba, Institute of Physics, AS CR 2
Pad array design consideration
Along with the diodes, the technique used for fabrication of bias resistors and coupling capacitors represents an important issue:
a) polysilicon resistors – production of the tile needs about 7-8 masks; can be the source of additional yield reduction.
b) punch through resistors – production of the tile needs about 5 masks; easy to produce – needs to check whether required parameters can be achieved.
c) ion implantation resistors – not considered here.
IFR Praha 2004, 16th April 2004 Václav Vrba, Institute of Physics, AS CR 3
Design consideration: Polysilicon resistors
Bias resistor
Top
vie
w
Vertic
al
cro
ss
sectio
n
Coupling capacitor
Direct contact on diode – e.g. for testing
Bias lines
IFR Praha 2004, 16th April 2004 Václav Vrba, Institute of Physics, AS CR 4
Design consideration: Polysilicon resistors
IFR Praha 2004, 16th April 2004 Václav Vrba, Institute of Physics, AS CR 5
Design consideration: Punch through resistors
Coupling capacitor
Direct contact on diode – e.g. for testing
Bias resistor
Top
vie
w
Vertic
al
cro
ss
sectio
n
Bias lines
IFR Praha 2004, 16th April 2004 Václav Vrba, Institute of Physics, AS CR 6
Design consideration: a partial summary
a) polysilicon resistors:
- should not be a problem to have resistors 10 M;
- capacitors 1-10 nF.
b) punch through resistors:
- resistors to be tested; if acceptable then it is a simple solution;
- capacitors as a).
Compatibility of process for variants a) and b) on one wafer? Option a) as a baseline for main sensor tile?
IFR Praha 2004, 16th April 2004 Václav Vrba, Institute of Physics, AS CR 7
Pre-prototyping
IFR Praha 2004, 16th April 2004 Václav Vrba, Institute of Physics, AS CR 8
Tests outlines
A) Diode testsa) I-V curves:
- Vbreak-down Vop
- Ileak @ Vop < cca 30 nA/cm2
b) C-V curves: determination of Vfull-depletion; Vop = Vfull-depletion + 50 V.
c) Long term stability tests:
- Ileak @ Vop .
Tile should be rejected if:
- Vbreak-down < Vop
- Ileak > I crit (to be defined).
IFR Praha 2004, 16th April 2004 Václav Vrba, Institute of Physics, AS CR 9
Electric characterization
IFR Praha 2004, 16th April 2004 Václav Vrba, Institute of Physics, AS CR 10
Tests outlines
B) Bias resistorsa) shorts
b) breaks
c) outside specifications
C) Capacitance couplingsa) shorts
b) breaks
c) outside specifications
IFR Praha 2004, 16th April 2004 Václav Vrba, Institute of Physics, AS CR 11
Tests outlines
Basic equipment:- micromanipulators with contact needles;
- I-V: Keithley 487 A;
- C-V: LCR meter HP
IFR Praha 2004, 16th April 2004 Václav Vrba, Institute of Physics, AS CR 12
Probestation
