IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 56, NO. 6...

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IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 56, NO. 6, DECEMBER 2009 3463 Single-Event Transient Error Characterization of a Radiation-Hardened by Design 90 nm SerDes Transmitter Driver S. E. Armstrong, Student Member, IEEE, B. D. Olson, Student Member, IEEE, J. Popp, J. Braatz, T. D. Loveless, Student Member, IEEE, W. T. Holman, Member, IEEE, D. McMorrow, Member, IEEE, and L. W. Massengill, Fellow, IEEE Abstract—The analysis and measurement of a radiation hard- ened by design 3.125 Gbps SerDes transmitter driver fabricated in commercial 90 nm CMOS is presented. The transmit driver is implemented in thick oxide 2.5 V devices. Testing and simula- tion of laser-induced single-event transients of a fabricated driver section are discussed. A highly-flexible data collection technique that allows post-processing of data for different error types and thresholds within a single data set is presented. This effort repre- sents the first single-event effects measurement and analysis on a highly-scaled analog/RF CMOS circuit element operating at GHz frequencies. Sensitive nodes are identified through experiment and simulation. Index Terms—Serializer-deserializer, single-event effects, single- event transients, space applications, two-photon absorption. I. INTRODUCTION T HE ability to transmit data at high speeds across an interface is critical to all modern communication devices. In order to meet this need, high-speed serial communication protocols have been developed – the common universal serial bus (USB) is a ubiquitous, though somewhat dated, example. The enabling integrated circuit for the continued advancement of high speed and high performance serial communication has been the Serializer/Deserializer (SerDes) class of circuits. SerDes devices provide fast data transfers (in excess of 10 Gbps) across chip-to-chip, board-to-board, and backplane interfaces. These circuits have become essential building blocks for high performance systems, including space and weapons systems. Manuscript received July 18, 2009; revised September 26, 2009. Current ver- sion published December 09, 2009. This work is supported by Defense Threat Reduction Agency and DARPA. Portions of this work were performed under the DTRA HDTRA1-05-D-0001 contract. S. E. Armstrong is with NAVSEA Crane, Crane, IN 47522 USA, and also with the Radiation Effects Group, Department of Electrical Engineering and Com- puter Science, Vanderbilt University, Nashville, TN 37235-1863 USA (e-mail: [email protected]). B. D. Olson, T. D. Loveless, W. T. Holman, and L. W. Massengill are with the Radiation Effects Group, Department of Electrical Engineering and Com- puter Science, Vanderbilt University, Nashville, TN 37235-1863 USA (e-mail: [email protected]). J. Popp and J. Braatz are with the Solid State Electronics Develop- ment Group, The Boeing Company, Seattle WA 98124-2207 USA (e-mail: [email protected]). D. McMorrow is with the Naval Research Laboratory, Washington, DC 20375 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TNS.2009.2033924 Radiation sensitivities in deep-submicron CMOS (DSM- CMOS) SerDes must be considered in the design and im- plementation of SerDes devices intended for use in hostile environments. The SerDes circuitry is made up of high speed analog/RF circuitry operating at I/O voltages (i.e., 1.8 V and higher), analog/mixed signal circuitry operating at core volt- ages (i.e., 1.0 V and lower), and digital circuitry operating at core voltages. This mix of circuit types on a single integrated circuit (IC) presents design challenges that are compounded when radiation tolerance is considered. This paper presents a characterization and analysis of two- photon absorption (TPA)-induced single-event effects (SEE) in a sub-100 nm SerDes transmitter amplifier circuit operating at gigahertz frequencies, highlighting a data acquisition approach that provides flexibility in analysis that is not available using conventional heavy-ion data collection approaches. This effort represents the first such investigation on a highly-scaled circuit element operating at GHz frequencies. The SerDes transmitter circuit was designed by Boeing as part of the DTRA/DARPA Radiation-Hardened-by-Design (RHBD) program using a col- lection of analog and digital single-event hardening techniques, fabricated in the IBM 9SF 90 nm bulk CMOS technology, and tested at the Naval Research Laboratory’s laser SEE facility. II. BACKGROUND As IC technologies have advanced into the deep sub-micron regime, the relative size of contact pads has not scaled accord- ingly; therefore, I/O pin count is becoming a design constraint. Because of this, it is useful to transmit data in the most con- cise form possible. Serial data, when transmitted as a differential signal, provides fast and accurate data transmission on par with parallel, but has advantages over parallel data transmission in terms of power consumption and space required. A SerDes de- vice consists of a parallel-to-serial converter module along with a serial-to-parallel converter module. When paired with an ac- companying SerDes device through a backplane, the serial data is efficiently transmitted over the backplane media. The serializer module converts parallel data into a serial data stream which is equalized to account for distortion in the transmit media and finally transmitted over the backplane. The deserializer module receives the serialized data, performs additional equalization, and then transforms the data back into the original parallel data. Fig. 1 shows a simplified block diagram of a typical SerDes device. 0018-9499/$26.00 © 2009 IEEE

Transcript of IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 56, NO. 6...

Page 1: IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 56, NO. 6 ...web.mit.edu/magic/Public/papers/05341372.pdf · Radiation-Hardened-by-Design (RHBD) program using a col-lection of analog and

IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 56, NO. 6, DECEMBER 2009 3463

Single-Event Transient Error Characterizationof a Radiation-Hardened by Design 90 nm

SerDes Transmitter DriverS. E. Armstrong, Student Member, IEEE, B. D. Olson, Student Member, IEEE, J. Popp, J. Braatz,

T. D. Loveless, Student Member, IEEE, W. T. Holman, Member, IEEE, D. McMorrow, Member, IEEE, andL. W. Massengill, Fellow, IEEE

Abstract—The analysis and measurement of a radiation hard-ened by design 3.125 Gbps SerDes transmitter driver fabricatedin commercial 90 nm CMOS is presented. The transmit driveris implemented in thick oxide 2.5 V devices. Testing and simula-tion of laser-induced single-event transients of a fabricated driversection are discussed. A highly-flexible data collection techniquethat allows post-processing of data for different error types andthresholds within a single data set is presented. This effort repre-sents the first single-event effects measurement and analysis on ahighly-scaled analog/RF CMOS circuit element operating at GHzfrequencies. Sensitive nodes are identified through experiment andsimulation.

Index Terms—Serializer-deserializer, single-event effects, single-event transients, space applications, two-photon absorption.

I. INTRODUCTION

T HE ability to transmit data at high speeds across aninterface is critical to all modern communication devices.

In order to meet this need, high-speed serial communicationprotocols have been developed – the common universal serialbus (USB) is a ubiquitous, though somewhat dated, example.The enabling integrated circuit for the continued advancementof high speed and high performance serial communicationhas been the Serializer/Deserializer (SerDes) class of circuits.SerDes devices provide fast data transfers (in excess of 10 Gbps)across chip-to-chip, board-to-board, and backplane interfaces.These circuits have become essential building blocks for highperformance systems, including space and weapons systems.

Manuscript received July 18, 2009; revised September 26, 2009. Current ver-sion published December 09, 2009. This work is supported by Defense ThreatReduction Agency and DARPA. Portions of this work were performed underthe DTRA HDTRA1-05-D-0001 contract.

S. E. Armstrong is with NAVSEA Crane, Crane, IN 47522 USA, and also withthe Radiation Effects Group, Department of Electrical Engineering and Com-puter Science, Vanderbilt University, Nashville, TN 37235-1863 USA (e-mail:[email protected]).

B. D. Olson, T. D. Loveless, W. T. Holman, and L. W. Massengill are withthe Radiation Effects Group, Department of Electrical Engineering and Com-puter Science, Vanderbilt University, Nashville, TN 37235-1863 USA (e-mail:[email protected]).

J. Popp and J. Braatz are with the Solid State Electronics Develop-ment Group, The Boeing Company, Seattle WA 98124-2207 USA (e-mail:[email protected]).

D. McMorrow is with the Naval Research Laboratory, Washington, DC 20375USA (e-mail: [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TNS.2009.2033924

Radiation sensitivities in deep-submicron CMOS (DSM-CMOS) SerDes must be considered in the design and im-plementation of SerDes devices intended for use in hostileenvironments. The SerDes circuitry is made up of high speedanalog/RF circuitry operating at I/O voltages (i.e., 1.8 V andhigher), analog/mixed signal circuitry operating at core volt-ages (i.e., 1.0 V and lower), and digital circuitry operating atcore voltages. This mix of circuit types on a single integratedcircuit (IC) presents design challenges that are compoundedwhen radiation tolerance is considered.

This paper presents a characterization and analysis of two-photon absorption (TPA)-induced single-event effects (SEE) ina sub-100 nm SerDes transmitter amplifier circuit operating atgigahertz frequencies, highlighting a data acquisition approachthat provides flexibility in analysis that is not available usingconventional heavy-ion data collection approaches. This effortrepresents the first such investigation on a highly-scaled circuitelement operating at GHz frequencies. The SerDes transmittercircuit was designed by Boeing as part of the DTRA/DARPARadiation-Hardened-by-Design (RHBD) program using a col-lection of analog and digital single-event hardening techniques,fabricated in the IBM 9SF 90 nm bulk CMOS technology, andtested at the Naval Research Laboratory’s laser SEE facility.

II. BACKGROUND

As IC technologies have advanced into the deep sub-micronregime, the relative size of contact pads has not scaled accord-ingly; therefore, I/O pin count is becoming a design constraint.Because of this, it is useful to transmit data in the most con-cise form possible. Serial data, when transmitted as a differentialsignal, provides fast and accurate data transmission on par withparallel, but has advantages over parallel data transmission interms of power consumption and space required. A SerDes de-vice consists of a parallel-to-serial converter module along witha serial-to-parallel converter module. When paired with an ac-companying SerDes device through a backplane, the serial datais efficiently transmitted over the backplane media.

The serializer module converts parallel data into a serialdata stream which is equalized to account for distortion inthe transmit media and finally transmitted over the backplane.The deserializer module receives the serialized data, performsadditional equalization, and then transforms the data backinto the original parallel data. Fig. 1 shows a simplified blockdiagram of a typical SerDes device.

0018-9499/$26.00 © 2009 IEEE

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Fig. 1. Simplified block diagram of a typical SerDes device.

Fig. 2. Block diagram of transmitter driver. The level shifter/pre-amp combi-nations provide equalization to the signal and prepare the data to conform to aselected transmission protocol.

III. EXPERIMENTS

A. SerDes Devices

The Boeing SerDes transmitter driver is implemented as adifferential current mode amplifier with resistor loads to pro-vide extended attachment unit interface (XAUI)-compliant lowvoltage differential signals (LVDS) to the backplane [1]. Alsoincluded are pre-driver gain stages in 1, 3, and 6 dB steps nec-essary to implement signal pre-emphasis for improved far-endsignal integrity [2]. A block diagram of the transmitter driver isshown in Fig. 2.

RHBD techniques are implemented in the circuit designand layout to mitigate total ionizing dose (TID) and singleevent upset (SEU) effects throughout the transmitter drivercircuit block. RHBD techniques include bias node filteringand additional bias current to reduce long-transient de-biasingdue to single events, aggressive substrate contacts to reducesingle-event charge sharing, well de-biasing and to mitigatelatchup, device isolation to reduce TID-induced shallow-trenchisolation (STI) and substrate leakage current paths, andmetal-oxide capacitors to reduce single event substrate noisecoupling into circuitry.

Typical design metrics of a SerDes include period jitter anddata throughput. Of particular interest in this paper is the re-sponse of the basic circuit blocks to single-event perturbations,

TABLE IMEASURED SERDES TRANSMITTER DRIVER ELECTRICAL PERFORMANCE

which can manifest as unintended pulse transients, additionaljitter above the pre-rad baseline, and signal distortion. Thetransmitter driver is of particular interest because the high cur-rent drive requires the use of high-voltage thick-oxide devices,which are instantiated as annular devices. There are limitedstudies on sub-100 nm analog/RF SEE characteristics and theSEE response of the annular thick-oxide devices used in thisprocess has not been explored.

The fabricated SerDes transmitter driver exhibits good jitterperformance and wide output frequency range across the oper-ating temperature and supply voltage. The measured electricalperformance is summarized in Table I.

The most sensitive circuit component of the transmitteramplifier is identified in the simulation section to be the 6 dBpre-amp gain stage. A representative schematic is shown inFig. 3 with nomenclature used throughout this paper indicated.This device uses two cascaded differential amplifiers that feedinto an output gain stage, all using a common current sourcewith a bias point set off-chip.

Simulations are performed on the full transmitter amplifierwhile experiments are performed on the stand-alone 6 dB pre-amp. The input scheme for the pre-amp is modified in order tooperate as a stand-alone device for experiments. In the simulateddevice, the inputs of the pre-amp drive current-based inputs tothe differential amplifiers while the inputs of the stand-alonepre-amp are voltage-based and capacitor-coupled to the inputsof the first differential amplifier (T0/T1).

B. Simulation Setup

Single-event transient simulations were performed on the fullSerDes transmitter driver (see Fig. 2) using the Cadence EDAtool suite with the Spectre circuit simulator. The transmit driverwas simulated at 1.5625 Gbps (half of the maximum data rate)with a checkerboard data pattern to allow upsets to be easilyidentified at the output.

To simulate the charge collection from a heavy-ion strike,a piece-wise-linear current source is sequentially inserted andsimulated in the circuitry for every PMOS and NMOS drainnode. The waveform shapes were produced from the calibra-tion of thin oxide devices described in previous studies [3].Table II lists the amount of deposited charge for each simulatedion strike. The listed LET represents the incident LET and re-sulting collected charge as calibrated to thin oxide devices op-erating in an inverter chain. Therefore these LET values willnot necessarily translate directly to thick oxide devices. For thisreason, this paper refers to strike values in terms of charge asopposed to LET.

For each simulated heavy-ion strike, the resulting transientresponse of the driver is analyzed for errors by calculating eachclock period (determined by finding the difference between themidpoints of each consecutive rising edge) and comparing this

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ARMSTRONG et al.: SET ERROR CHARACTERIZATION OF A RADIATION-HARDENED BY DESIGN 90 nm SerDes TRANSMITTER DRIVER 3465

Fig. 3. Simplified 6 dB pre-amp. T0/T1 and T9/T10 are the differential amplifiers, T2/T3 is the output stage, and the current mirror includes each of the transistorsat the bottom of the figure. The current drive increases from left to right on the schematic. Unlike the simulated device, the bias point is set off-chip.

TABLE IICOLLECTED CHARGE AND LET FOR STRIKES

CALIBRATED TO THIN-OXIDE DEVICES

Fig. 4. Simulation error calculation example: if the ratio of the ideal and mea-sured periods exceeds an upset threshold, an error has occurred.

period to the ideal (or expected) period to determine a percentphase error. For each phase error in excess of a predeterminederror threshold, an error is recorded, as shown in Fig. 4.

These simulations are used to identify the sensitive regions ofthe circuit and focus primarily on qualitative rather than quanti-tative results. The values of injected charge should be used onlyas a point of reference. The circuit block identified as the mostsensitive to SET, the 6 dB pre-amp, is tested at the laser facilityas described below.

C. Laser Testing

The through-wafer two photon absorption SEU mappingtechnique, as described in [4]–[6], is used to perform SET upsetmapping of the circuit and characterize the transient response.The TPA SEE experimental setup is described in [7] and [8].The 6 dB pre-amp device (see Fig. 3) is mounted on a motorized

translation platform with 0.1 m resolution. Optical pulsesare focused through the wafer onto the front surface of the DUTwith a 100 microscope objective, resulting in a near-Gaussianbeam profile with a typical diameter of approximately 1.6 mat focus [7]. Because the carrier deposition varies as thesquare of the irradiance [7]–[9], this corresponds to a Gaussiancarrier density distribution with an approximate diameter of1.1 m (full-width-at-half-maximum). All experiments wereperformed at room temperature.

Fig. 5. Differential input signal, a sinusoid with an operating frequency of1.56 GHz, simulating a checkerboard data pattern (�� �� �� �� � � �).

The device was operated at 3.16 Gbps with a 400 mV peak-to-peak sinusoidal differential input voltage, which is interpretedas a checkerboard pattern as shown in Fig. 5. Prior to executinga scan of the topology, areas in the four primary structures of the6 dB pre-amp circuitry were analyzed for a laser pulse energythreshold, defined as the lowest pulse energy for which a pertur-bation of the output is observable. In this case, the threshold isdetermined by visually monitoring the output transients on theoscilloscope as the pulse energy and position are adjusted. Thecircuitry to be scanned is indicated and the threshold energiesare annotated in Fig. 6. It was determined that a laser pulse en-ergy of 6.9 nJ is sufficiently above threshold to induce SETs ineach of the four areas; all data presented are collected at thatpulse energy unless otherwise indicated.

The surface of each block is scanned in 0.5 m steps usingan automated data collection setup that controls the - positionof the device and captures data from the oscilloscope with littleinteraction from the operator. For each step in the scan, ten tran-sients are recorded using a Tektronix 12 GHz TDS6124 oscillo-scope operating with a resolution of 20 Gsamples/s. The oscillo-scope is operated in “fast-frame” mode such that each - loca-

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Fig. 6. Layout view of 6 dB pre-amp indicating the four scanned areas of thecircuit and annotating the threshold energies.

Fig. 7. Five sample transients from a single point in a scan of T9/T10 with alaser pulse energy of 11.5 nJ. The oscilloscope is triggered by an output gen-erated by the laser system, with the laser clock and data stream running in anasynchronous fashion. The time of the event is predictable, but the timing withthe clock-cycle of the DUT is not. The �-axis scale is to determine relative mag-nitude, the traces are all centered around zero.

tion in the scan generates ten individual transients resulting fromten different triggered events. For each of these events 500 datapoints are recorded. Sample transient data from five successivetrigger events at one - position in the scan are shown in Fig. 7demonstrating the reproducibility of data from pulse-to-pulse.

In this test, the oscilloscope was triggered off the laser pulse,as opposed to standard practices (necessary in heavy-ion testing,for example) in which the oscilloscope is triggered off the upsetevent itself, using a set threshold and some distinguishing char-acteristic behavior of the transient events. Triggering off thelaser ensures that an event is recorded for each - positionof the scan, and that the event occurs with a well-defined tem-poral relationship to the trigger source, that is, there is a knowndelay between the laser trigger signal and the laser strike on theDUT. This approach provides insights into unexpected circuitbehavior, such as a novel error response that may not be cap-tured using a preset triggering scheme. Using this approach thevarious error signatures are identified and analyzed in post-pro-cessing, providing considerable flexibility in the data analysisprocedure that can not be obtained if events are identified based

Fig. 8. Typical bit error from simulation for a PMOS-strike on the 6 dB pre-ampinput node. It can be seen that the struck transient (solid red line) deviates fromthe expected transient (dashed black line) and causes a significant difference(���� change) in the bit period. Simulation is run at 1.56 Gbps.

on pre-determined trigger criteria. The data of Fig. 7 also illus-trate the asynchronous nature of the present experiments: thelaser clock and the experimental data streams are independentsuch that the laser pulse can arrive at any point in the data cycleof the device. The five waveforms of Fig. 7 each exhibit a dif-ferent phase relationship between the laser pulse and the datastream.

IV. RESULTS

A. Simulation Results

The most sensitive regions of the simulated transmitter am-plifier device are found to be the PMOS transistors in the com-plementary inputs to the 6 dB pre-amp at the interface of thelevel-shifter to the pre-amp. These nodes are connected to thecurrent driving devices of the pre-amp, and a strike disrupts thecurrent supply for the amplifier. During a PMOS strike, circuitcurrent is reduced through the estimated collection duration in-creasing the delay of the output for a bit period (Fig. 8). At thesimulated 1.56 Gbps throughput, the PMOS-strike decreases theobserved output bit period for only one clock cycle (two bits).During this time the circuit exhibits a slightly underdamped re-sponse with limited overshoot and bit period distortion for theproceeding clock cycle. Fig. 8 shows a representative simulationresult for a 153 fC strike to the PMOS input node of the 6 dBpre-amp illustrating two disrupted bits for this type of error.

B. Laser Results

The collected transients demonstrate a different type of SEEerrors than those observed in simulation. Collected data wereanalyzed for phase errors using the same criteria as describedin Section III-B. Post-analysis does not reveal any phase er-rors. This result is not surprising due to the differences in theinputs to the simulated and experimental circuits discussed inSection III-A. Bit errors were observed during testing and thedata post-analysis was expanded to include testing for this errortype. The bit error occurs when a bit maximum or minimumdoes not reach the threshold necessary for the logic to switch

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ARMSTRONG et al.: SET ERROR CHARACTERIZATION OF A RADIATION-HARDENED BY DESIGN 90 nm SerDes TRANSMITTER DRIVER 3467

Fig. 9. Illustration of bit error. An error occurs if the measured voltage leveldoes not reach a percentage of the expected voltage level. This percentage isconsidered the error threshold.

Fig. 10. Sample transient for a bit upset in T0/T1 resulting from a laser pulseenergy of 6.9 nJ. This is a typical example of the observed bit upsets throughoutthe circuit. The shaded region indicates the areas in which an error is identified.In this case, the error threshold is 50%.

Fig. 11. Bit errors mapped to location in layout for a 50% error threshold. Blackpixels indicate errors were present. There were no upsets observed in T2/T3 orthe current mirror.

from a ‘0’ to a ‘1’, or vice-versa, and will result in misread data(Fig. 9). In extreme cases, more than one successive bit may beupset resulting in multiple-bit upsets (MBU). No MBUs wereobserved in these experiments, however, presumably an indica-tion of success in the RHBD approaches utilized. A representa-tive transient illustrating a bit error is shown in Fig. 10.

A summary of number of upsets observed in each area of thecircuit is given in Table III. To evaluate the spatial dependenceof the sensitive regions in the circuit, the data are mapped by‘ - ’ location. A bit-error map for the tested areas is shown inFig. 11, with the data superimposed on the layout of Fig. 6. Thismap shows the sensitivity of T0/T1 and T9/T10 to bit errors.T2/T3 and the current source show no errors of this type for thethreshold criterion used (cf., Fig. 10).

The results of Table III indicate that the T9/T10 differentialamplifier is the most sensitive circuit element tested. This re-sult is somewhat surprising since the currents driving this de-vice are greater than those in T0/T1, and increasing the currentdrive is a standard way of mitigating SEEs in circuits. The tran-sistor sizes in T9/T10 are smaller than those in T0/T1, and bias

TABLE IIISUMMARY OF NUMBER OF UPSETS OBSERVED BY CIRCUIT AREA.

6.9 nJ LASER PULSE ENERGY

Fig. 12. Error maps of T9/T10 from two incident pulse energies, as indicated.Most sensitive regions begin to resolve in (b) with clear identification of thetransistor structure shown in (a). (a) �� � ��� nJ.(b) �� � ��� nJ.

conditions put T9/T10 operating closer to the ohmic/saturationboundary; thus a smaller change in the current, , is requiredto affect the output of the circuit, in this case due to the chargeinjected by the laser pulse. It is expected that lowering the biascurrent through T5 (cf., Fig. 3) or reducing the collector resistorvalues of T9/T10 would increase such that both transistorswould operate well into the saturation region and would requirea larger injected charge to disrupt operation than in the currentconfiguration.

The results presented here reveal that the input differentialpairs are the most sensitive blocks in the circuit, with the nextmost sensitive, the current source, exhibiting an upset thresholdthat is 2 higher. Correlating the TPA threshold of 2.9 mVmeasured for the T0/T1 and T9/T10 blocks with the heavy-ionLET threshold of 8 MeV cm mg measured for this circuitsuggests that the LET threshold for the current mirror blockis approximately 16 MeV cm mg, and that of T2/T3 is46 MeV cm mg. It should be noted that these thresholds aredetermined using a different error criteria than used for gener-ating the data of Fig. 11; different criteria for defining an upsetwith give rise to different threshold values. The values reportedin Fig. 6 correspond to the minimum detectable perturbationon the signal waveform; other criteria will necessarily give riseto higher threshold values. This is illustrated by the data ofFig. 11, which show no errors in T2/T3 and the current mirror.

The ability to analyze the data in post-processing as is donehere leads to considerable flexibility and is an intrinsic strengthof the present approach. To further illustrate this point additionalexperiments were performed on T9/T10 as a function of thelaser pulse energy and processed using different error thresholdsfor the identification of bit upsets. The test setup is identical tothat described in Section IV.B. except that five transients wererecorded for each - position in the scan and a higher resolu-tion (0.3 m) step size was used.

Fig. 12 shows bit error maps for two laser pulse energies; thetransistor structure is clearly defined in the examples. No errors

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3468 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 56, NO. 6, DECEMBER 2009

Fig. 13. Single pulse energy (3.2 nJ) with varying error threshold as indi-cated in quadrants. Progression shows an indication of most sensitive areasprogressing to the identification of the transistor structure shown in (d).(a) ��� � ���. (b) ��� � ���. (c) ��� � ���. (d) ��� � ��.

were detected at two lower pulse energies even though a visualperturbation of the signal was observed during testing.

Fig. 13 shows the results of variations in the error thresholdfor a single incident laser pulse energy. These data maps showincreasing errors with an increasing error threshold. The moresensitive regions of the circuit will show errors at a low errorthreshold and thus can be identified by changing the error iden-tification parameters to a lower value during post-processing.Such procedures can be used for detailed evaluation of circuitsensitivities and for defining the impact of changes in the im-plementation/function of follow-on circuitry.

The presented results suggest that additional experimentswould be useful. Measurements as a function of data ratewould reveal any dependence on this parameter. In addition,synchronization of the laser clock with the data stream wouldprovide insight into the phase dependence of the upset andwould define the window of vulnerability for this circuit.

V. CONCLUSION

A Boeing SerDes transmitter driver is analyzed for single-event error sensitivity using simulation and through-wafer TPAlaser interrogation. This effort represents the first SET analysisof a DSM-CMOS device operating in the gigahertz regime.SPICE-based SEE simulations of the circuit reveal bit periodjitter upsets that highlight sensitivity to strikes in the 6 dB

pre-amp stage of the device. TPA laser testing further identifiesand characterizes sensitive areas of the circuit. The testingmethodology used allows the detection of both bit upsets andphase errors, permitting a complete analysis of the data andproviding insights that can not be achieved using conventionalSEE test methodologies.

The most sensitive region of the 6 dB pre-amp is the seconddifferential amplifier in the circuit. A change in the bias pointof this device is expected to eliminate many of the produced er-rors. The information from this analysis will be applied throughthe use of additional RHBD techniques to further improve SEEperformance on the pre-amplifier stage.

The results from this study will aid in SEE hardening of trans-mitter drivers for future SerDes designs, allow designers to usethick oxide devices in this process with confidence in predictingtheir response to SEEs, and provide a basis for future work inexploring SerDes devices at a system-level.

ACKNOWLEDGMENT

The authors would like to thank DTRA and DARPA for sup-port of this work.

REFERENCES

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