[IEEE Circuits Technology Conference (IMPACT) - Taipei, Taiwan (2008.10.22-2008.10.24)] 2008 3rd...

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Tafadzwa Magaya, Global Product Manager PTH Atotech Deutschland GmbH Erasmusstr. 20, 10553 Berlin Germany tafadzwa.magayaa@ atotech.com ABSTRACT are being exposed to very high temperatures in such environments as car engines or braking discs. The process of plating through holes (PTH) is inherent to Issues pertaining to the laminate material used, via sizes, modem PCB manufacturing. In an arena of increasing circuit copper layer thickness and electrical requirements, which density and layer counts, the reliability of the PTH process is significantly affect the manufacturing process are often the under constant microscopic examination. The aim of prerogative of PCB designers with extremely limited if at all electroless copper is to plate a conductive layer through a hole any consultation with manufacturers. or into a blind microvia. In this context an interconnect (IC) Most importantly introduction of the Restriction of the use of refers to the copper to copper adhesion within the functional Hazardous Substances (RoHS) directive in Europe from July constraints of a circuit board. As these can include many inner 2006, has obliged PCB fabricators to employ RoHS compliant layers, the inter connection quality is of prime concern. In materials and processes. RoHS affects the metals Lead, addition the PTH process also inherits the issues from the Mercury, Chrome (VI), and the bromine containing resins preceding manufacture. PBB and PBDE, which have to be under 0.10% w/w in the finished product as well as Cadmium that has to be under Some examples are highlighted below: 0.010% w/w. Base material In compliance with RoHS, new lead-free soldering processes Material properties can result in significant Z axis mobility. mainly those based on Sn/Ag/Cu (SAC) alloys have emerged. Hybrid builds (different materials in one build) can be These have melting points that are about 30°C above that of exceptionally vulnerable and the problem is amplified in the conventionally used Tin Lead Alloy (Sn63Pb37). A thicker panels. comparison of the different assembly temperature profiles shows that lead free soldering, not only results in higher Drilling temperature but also results in longer exposure at the higher Drilling practices can affect smear residues and inner layer temperature. This combined effect results in significantly damage dramatically. Later processes can minimize the higher thermal stress of the base material and consequently for impact of these but only if the manufacturer is aware of it. the copper deposit as well. Unless the source of a type 1 inter-connection defect is clear, it is usually attributed to the PTH process employed. The following graphic shows the temperature profiles for lead free soldering versus traditional lead containing solder: Using electroless copper as an example, the impact of PTH on IC quality will be discussed. For this purpose it is useful to divide the PTH process into the following subsets: w Desmear PFr * Cleaning/Conditioning Ti / at T>2170C _ I I O| * Activation * Electroless copper This paper presents the impact of the individual PTH steps! 1| X0at0T>0830 s BACKGROLJND i A -, zI <xi 11l PCB manufacturers must permanently contend withl difficulties associated with production of PCBs with ever more complex designs, technology requirements and * 1 1-r * 1- 1 *1- * 1 1 r ~~~New base materials with alternative fire retardants have also inceaed iftim/rliailty eqireens. god xapleof resulted from the halogen ban imposed by RoHS. These this development iS the increased use of electronics in new aplcain suc as in th auootv inuty whr PCB typically employ hardeners that are used in combination with multifunctional epoxy resins to provide better temperature 978-1 -4244-324-81/O8/25 00 t 200 IEEE 414 >~ne

Transcript of [IEEE Circuits Technology Conference (IMPACT) - Taipei, Taiwan (2008.10.22-2008.10.24)] 2008 3rd...

Page 1: [IEEE Circuits Technology Conference (IMPACT) - Taipei, Taiwan (2008.10.22-2008.10.24)] 2008 3rd International Microsystems, Packaging, Assembly & Circuits Technology Conference -

Tafadzwa Magaya, Global Product Manager PTHAtotech Deutschland GmbHErasmusstr. 20, 10553 Berlin

Germanytafadzwa.magayaa@ atotech.com

ABSTRACT are being exposed to very high temperatures in suchenvironments as car engines or braking discs.

The process of plating through holes (PTH) is inherent to Issues pertaining to the laminate material used, via sizes,modem PCB manufacturing. In an arena of increasing circuit copper layer thickness and electrical requirements, whichdensity and layer counts, the reliability of the PTH process is significantly affect the manufacturing process are often theunder constant microscopic examination. The aim of prerogative of PCB designers with extremely limited if at allelectroless copper is to plate a conductive layer through a hole any consultation with manufacturers.or into a blind microvia. In this context an interconnect (IC) Most importantly introduction of the Restriction of the use ofrefers to the copper to copper adhesion within the functional Hazardous Substances (RoHS) directive in Europe from Julyconstraints of a circuit board. As these can include many inner 2006, has obliged PCB fabricators to employ RoHS compliantlayers, the inter connection quality is of prime concern. In materials and processes. RoHS affects the metals Lead,addition the PTH process also inherits the issues from the Mercury, Chrome (VI), and the bromine containing resinspreceding manufacture. PBB and PBDE, which have to be under 0.10% w/w in the

finished product as well as Cadmium that has to be underSome examples are highlighted below: 0.010% w/w.

Base material In compliance with RoHS, new lead-free soldering processesMaterial properties can result in significant Z axis mobility. mainly those based on Sn/Ag/Cu (SAC) alloys have emerged.Hybrid builds (different materials in one build) can be These have melting points that are about 30°C above that ofexceptionally vulnerable and the problem is amplified in the conventionally used Tin Lead Alloy (Sn63Pb37). Athicker panels. comparison of the different assembly temperature profiles

shows that lead free soldering, not only results in higherDrilling temperature but also results in longer exposure at the higherDrilling practices can affect smear residues and inner layer temperature. This combined effect results in significantlydamage dramatically. Later processes can minimize the higher thermal stress of the base material and consequently forimpact of these but only if the manufacturer is aware of it. the copper deposit as well.Unless the source of a type 1 inter-connection defect is clear,it is usually attributed to the PTH process employed. The following graphic shows the temperature profiles for lead

free soldering versus traditional lead containing solder:Using electroless copper as an example, the impact ofPTH onIC quality will be discussed. For this purpose it is useful todivide the PTH process into the following subsets: w

Desmear PFr

* Cleaning/Conditioning Ti/ at T>2170C _ I IO|* Activation* Electroless copper

This paper presents the impact of the individual PTH steps! 1|X0at0T>0830 s

BACKGROLJND i A-, zI<xi 11l

PCB manufacturers must permanently contend withldifficulties associated with production of PCBs with evermore complex designs, technology requirements and

* 1 1-r *1- 1 *1- * 1 1 r ~~~New base materials with alternative fire retardants have alsoinceaed iftim/rliailty eqireens. god xapleof resulted from the halogen ban imposed by RoHS. Thesethis development iS the increased use of electronics in newaplcain suc as in th auootv inuty whr PCB typically employ hardeners that are used in combination with

multifunctional epoxy resins to provide better temperature

978-1 -4244-324-81/O8/25 00 t 200 IEEE414 >~ne

Page 2: [IEEE Circuits Technology Conference (IMPACT) - Taipei, Taiwan (2008.10.22-2008.10.24)] 2008 3rd International Microsystems, Packaging, Assembly & Circuits Technology Conference -

stability and lower Coefficients of Thermal Expansion TEST VEHICLE(CTEs). Another typical trend for these materials is theinclusion of filler materials mainly to reduce CTEs as well as Daisy chain test coupons with a special design to induce ICDsto enhance other physical characteristics. These new in the power circuit were developed. Preliminary experimentsmaterials have the ability to withstand high temperatures for showed that certain design aspects increase the ICDlonger periods of time before delaminating as well as having sensitivity of the test coupons. The coupons thus included thesignificantly reduced CTEs than their predecessors. following features to maximize ICD sensitivity:In spite of these improvements to the base materials, it still * structured innerlayersremains imperative to adapt the electroless copper deposition * structured surfaceprocess if the elevated challenge of achieving good copper to * bigger hole diameter (1.Opm)base material and electroless to acid copper interconnection is * 25-3O0tm acidic copper thickness ( with lowerto be met. thickness barrel cracks usually appear first)

Using results from an R&D project and experiences from The following picture and diagrams show an IST test coupon:customer process adaption within the company Atotech, theprocess steps and parameters that have the most influence onthe appearance of interconnect defects (ICD) will be brieflydescribed.

ote .......I

It is important to always bear in mind that the base materialand quality of lamination have an overriding influence on lCD I. .p.performance compared to electroless copper. ..

EVALUATION METHODS

TCT (in accordance with IPC -TM-650 Method 2.6.7.2A) andIST (according to IPC -TM-650 Method 2.6.26) are the twomost common methods used to evaluate interconnectreliability. Most Japanese OEMs also require hot oil testing DESMEAR PROCESS(JIS C5012). These methods are intended to mimic thethermal stress the copper layers will be exposed to later, when Improvements to the desmear process can only have a verythey are used in the final products. .Solder shock testing on the other hand Smarginal positive effect on the CD perfoance. It isSolder shocktestingontheotherhandisusdthowever very important to make sure that complete smearinterconnect reliability with respect to thermal stresses removal occurs. This is because rest smear on BMV captureendured during the production process especially the soldering ads and iner layer coper can lead to oor coper - coperprocess. During the R&D project from which most of the X y ppp pp padhesion at the affected points and subsequently to ICDs.experiments in this paper are taken, thermal shocking wasadditionally conducted at 326°C to cater for the elevated The following pictures show the so called K8 failure. Thistemperatures of Pb-free soldering, occurs when drill smear residue at the top of the hole is notAll evaluations of micro sections were carried out after adequately removed leading to what looks like a corner crack.ultrasonic cleaning, prior to etching. This is because after This problem can be eliminated by etching with NaPS prior toetching separation lines between copper layers become visibleand it is then difficult to tell if these are the result of a real desmearseparation at the copper-copper interconnect. SEM image of K8 failure:

The following pictures show cross sections of an inner layercontact with no ICD:

CleanedAmmoniaetched ~SE.M Image othughle with rest smecar at top. This calnUltrasonic Chromic acid etched lead to K8 failure if no etching occurs prior to desmear:

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ELECTROLESS COPPER

Exhaustive experiments were conducted to find out the effectof several chemistries and parameters within the electrolesscopper bath on interconnect reliability. The results showedthat the stabilizer has the most pronounced effect on ICDoccurrence. Changes in the type of stabilizer lead to markeddifferences in interconnect reliability but the best results couldbe achieved by addition of special grain refining components.

The following diagram shows the ICD occurrence underextreme thermal shock conditions (6x 326°C) for different

CONDITIONER/ETCH CLEANER stabilizer systems:

Typical conditioners currently used in the PCB industry seemto have very little effect on ICD performance.

Etch cleaning is a crucial step for interconnect reliability. This 100is because it roughens exposed copper surfaces thus offering 90more "anchorage" points for the electroless copper resulting 80-in better adhesion. 7

% 60-Etching with sodium persulfate seems to have a more positive 5effect than using H202/H2S04. Some experiments and 40-customer experiences seem to suggest that the most positive 30effect results from using special etching agents such as 20 4Securiganth C (Atotech Product). However the results are 10-inconclusive and further investigation is required. 0SStabilizer 1 Stabilizer 2 Stabilizer 1 with

Grain Refiner

ACTIVATOR

The generally held view in the PCB industry seems to be that CONCLUSIONSacidic activation (PTC) is better with respect to ICDperformacethanalkalineactivation ( ionic).Intterwithrestak con To be able to effectively compare the ICD performance it istthsourancethanc parisns betweenaidica.In .activast important to employ the proper test methods and vehicles.showeds no significantdifeen with ard to acDs. TCT and IST testing can lead to seemingly random results ifshowed no significant differences with regards to ICDs.

ipoe ehd r sdHowever, mass production experience indicates that for ionic improper methods are used. .activators the pH values in the reducer as well as in the With solder shock testing it is much easier to get clear resultsreducer rinse are crucial and need to be tightly controlled fwithin specified limits for enhanced copper-copper The following table summarizes the process steps, whichinterconnection.

seem to have the biggest influence on IC performance. It isThe following diagram shows the effect of pH settings in the therefore advisable to tightly control these parameters and

reducer and reducer rinse on ICD occurrence for an ionic processes for best copper to copper interconection.activated tartrate process:

Process Step Desmear Cleaner/Etch Activator Electroless

Cleaner CopperpH in Reducer and Reducer Rinse l_l

Effect on IC minimal high high Very highreliability

| g 20 <|~~~~~~~~~~~Some of the information in this paper is based on information

10 ~~~~~~~~~~Deutschland GmbHP titled "Lamyinate Desmear-PTH forpH too highpH correcte Halogen Free PCBs". Special thanks also go to Richard

Nichols who helped to write the Abstract for this paper.

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