[IEEE 2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated...
-
Upload
noor-faizah -
Category
Documents
-
view
215 -
download
3
Transcript of [IEEE 2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated...
Application of Seebeck Effect Imaging on Failure Analysis of Via Defect
Noor Faizah Nordin (N. F. Nordin)
Infineon Technologies (Kulim) Sdn. Bhd. Lot 10 & 11, Industrial Zone Phase II, Kulim Hi-Tech Park, 09000, Kedah, Malaysia
Phone: +60(4)4278743 Fax: +60(4)4278459 Email: [email protected] Abstract - Often localizations for defective interconnects are done during or after some destructive analysis or sample preparation i.e., TIVA, PVC or active probing. As a result, the defect observed could be secondary effect induced during analysis. Therefore, Seebeck Effect Imaging (SEI) technique has been developed to avoid such uncertainty. This technique applies the theory of Seebeck effect and adapted into a Scanning Optical Microscope (SOM) system.
I. INTRODUCTION
Defective interconnections are a common issue in semiconductor production. With shrinking chip size and increased circuit complexity, this problem gets tougher by the day to be solved. Passive Voltage Contrast (PVC) technique using Scanning Electron Microscope (SEM) and Focused Ion Beam (FIB) systems have been extensively applied on interconnections failure. However, there have been few interconnections failure category that PVC is ineffective [1]. An ideal failure analysis technique would not only be simple, fast, and benign but would also use existing or readily available equipment or software [2]. In this paper, the SEI theory and the application onto SOM are discussed. The SOM used in this paper is PHEMOS1000 from Hamamatsu, which is readily available in our lab.
A. Motivation
With increasing number of yield loss cases due to interconnect issues, a conclusive root cause finding was extensively in pursuit. Open and short interconnects no longer the threats but rather the resistive interconnections. Available methods for localization such as active probing and PVC are rather destructive method, which mean no turning back on the sample and in resistive interconnections failure; the success rate is literally low.
Soft open (increased resistance) at one or more positions in a contact chain and interconnects is one of the challenge in resistive interconnections failure fault localization. SEI imaging technique is developed and this proved to be the most effective method to determine the failing contact/via in the affected chain without destructing the structure as compare with other techniques such as PVC and TIVA. PVC technique alone is only effective against pure open defects [3, 4].
II. METHODOLOGY
A. Thermal laser Stimulation Thermal emission occurs when any surface is heated. Indeed
all surfaces emit radiation even at room temperature and below. Thermal laser stimulation represents a class of defect imaging techniques which employ a laser to produce a thermal variation in a semiconductor device. There are 4 techniques associated with thermal laser stimulation: OBIRCH (optical beam induced resistance change), TIVA (thermal induced voltage alteration), XIVA (externally induced voltage alteration), and SEI.
Table I
THERMAL LASER STIMULATION TECHNIQUES AND ITS MECHANISM
Technique Mechanism
OBIRCH Uses a constant voltage bias, monitors current changes
TIVA Uses a constant current bias, monitors voltage changes
XIVA Uses a constant current and constant voltage biases, monitors impedance changes
SEI No biases at all, monitors potential electrical gradient
. At presence, thermal laser stimulation is essential in fault
isolation step. By applying the correct technique, failure site can be narrowed down to one single point. This helps the analyst in terms of first time right approach, fast feedback, and conclusive findings. Precise localization of defects in thermal laser stimulation technique is obtained by imaging the IC’s current or voltage variations caused by the laser induced temperature variation. The other advantage of thermal laser stimulation, no extensive and/or destructive sample preparation required.
B. Principle of SEI
Seebeck effect is a phenomenon in which a temperature difference between two dissimilar electrical conductors or semiconductors produces a voltage difference between the two substances. When heat is applied to one of the two conductors or semiconductors, heated electrons flow toward the cooler one. If the pair is connected through an electrical circuit, direct current (DC) flows through that circuit.
The voltages produced by Seebeck effect, which resulted from the thermoelectric effect, are small, usually only a few microvolts (µV) per Kelvin of temperature difference at the junction. If the difference is large enough the Seebeck effect can produce up to few milivolts (mV).
Fig. 1 Principle of Seebeck Effect (image source: * Image source:
http://www.kelk.co.jp/english/useful/images/figure.gif) Semiconductor devices consist of multilayer group of
dielectric, passivation, and even metallization. Each of these layers has different thermal coefficient, which will be manipulated in Seebeck effect to be applied onto localization imaging.
C. Adapting onto the SOM
Hamamatsu PHEMOS1000 operates by thermal laser stimulations. The techniques we can use by using PHEMOS1000 are OBIRCH and TIVA. As we already know that SEI is also one of the thermal laser stimulation technique and with this platform on hand, adapting SEI is literally easy.
Fig. 2 (a) Optical microscope inside the dark box, (b) Schematic drawing of the
microscope Sample was placed under the scanning laser camera and
connected to the internal amplifier circuitry (Fig. x). From the PHEMOS1000 system software, OBIRCH mode was selected.
This is to enable the laser scanning through the sample’s surface. Under OBIRCH mode, the laser raster scanning will be carried out onto the area of interest. The thermal offset then will be captured by the camera.
Fig. 3. Laser scanning through sample’s surface has different thermal response
due to different connection.
III. RESULT AND DISCUSSION
In this paper, the analysis was done on a test structure that consists of a chain via. Electrical measurement shows that the affected unit is having an open failure as compared to a reference unit (Fig.4). Further verification (pin-to-pin) shows there is a resistive reading (Fig.5). Several attempts on the localization have been made such as OBIRCH and TIVA, but no localized spot managed to be obtained.
Fig. 4 Open characteristic was observed upon verification.
By preceding the sample to PVC for physical failure
localization, mechanical delayering was carried out but no distinguish contrast was observed. Therefore, we opt for a localization method that is not destructive and preferably electrical isolation rather than physical, SEI method was selected for the next localization attempt.
Fig. 5 Pin-to-pin characteristic observed high resistance compared to
reference. No voltage was bias to the sample leaving the amplifier
circuitry in PHEMOS1000 to be sensitive to device internal generated current alone. The thermoelectric effect of local heating by an infrared laser beam on the junctions is monitored. The effect is due to different temperature coefficient of material. The Seebeck voltage due to temperature gradient produces electric current which can be amplified to produce imaging localization. Two spots were successfully obtained from the sample. Fig. x shows SEI signal obtained and overlaid onto the pattern image.
Fig. 6 SEI signal can be seen on the right; on the left is overlaid signal onto the
pattern image. Subsequent step is to determine the correct defective via prior
to any physical analysis. This is done by overlaying the localization image onto the layout and the respective Spot1 and Spot2 was managed to be identified (Fig. 7).
Fig. 7 Layout image of the structure of interest. Location of localized spots were identified by overlaying the image obtained through localization to the layout.
FIB cross section was selected for the physical analysis to
understand the mechanism of the failure. The cross section reveals an anomaly on the identified defective via (Fig. 8). By preceding the sample to TEM (Transmission Electron Microscopy) analysis and subsequent elemental analysis observed presence of Fluorine, a corrosion element (Fig. 9, 10).
Fig. 8 FIB cross section images on localized defective via. Anomaly was
observed on both spot.
Fig. 9 TEM image of the defective via.
Fig. 10 Elemental analysis on the TEM sample; corrosive element, Fluorine, was
detected.
IV. CONCLUSION
As compared to other thermal laser stimulation technique, SEI has the advantages when the failing structure is hidden under several metal layers. Mechanical delayering to enable voltage contrast; be it active or passive, can be difficult if the test structure is very large because the required lateral uniformity is not always reached. With this case study, SEI technique was successfully implemented with success physical defect finding.
ACKNOWLEDGMENT
The author would like to thank Mr. Kenny Gan for motivation
and support given throughout the paper writing. Gratitude also to be expressed to Mr. Yong Foo Khong and Mr. Lee Nean Sern for the analysis support and guidance.
REFERENCES
[1] I. Österreicher, U. Rossberg, S. Eckl, “Active Voltage Contrast and Seebeck
Effect Imaging as Complementary Techniques for Localization of Resistive Interconnections,” ISTFA, 2006.
[2] E. Cole Jr., J. Soden, J. Rife, D. Barton, C. Henderson, “Novel Failure Analysis Techniques Using Photon Probing With a Scanning Optical Microscope,” IEEE/IRPS, 1994.
[3] J.Y. Dai, S. Ansari, C.L. Tay, S.F. Tee, Eddie Er, S. Redkar, “Failure Mechanism Study for High Resistance Contact in CMOS Devices”, in Proceedings of 8th IPFA, Singapore, 2001.
[4] Beaudoin, F; Desplats, R; Perdu, P; Boit, C, "Principles of Thermal Laser Stimulation Techniques", Microelectronics Failure Analysis (Materials Park, Ohio: ASM International), 2004, pp.417–425.
[5] A. Firiti, G. Haller, D. Lewis, P. Fouillat, P.Perdu, F. Beaudoin, “Thermal Laser Stimulation Effect on NMOS Transistor”, in Proceedings of 11th IPFA, Taiwan, 2004.