Studies on the Millimeter-wave Performance of MITTATs from Avalanche Transit Time Phase Delay

*Aritra Acharyya, **J. P. Banerjee Department of Radiophysics and Electronics,

Institute of Radiophysics and Electronics, University of Calcutta, 92, APC Road, Kolkata 700009, India.

E-mail(s): *ari_besu@yahoo.co.in, **jpbanerjee06@rediffmail.com

Moumita Mukherjee CMSDS, Centre of Advanced Study in Radiophysics and

Electronics, Institute of Radiophysics and Electronics, University of Calcutta, 1, Girish Vidyaratna Lane, Kolkata

700009, India. E-mail: m_mukherjee07@rediffmail.com

Abstract—In this paper the authors have proposed a simple method to study the change in the millimeter-wave performance of IMPATTs operating in MITATT mode from the shift of avalanche transit time (ATT) phase delay. A generalized double iterative computer method based on Gummel-Blue approach incorporating the effect of tunneling is used to obtain admittance characteristics and negative resistivity profiles of silicon based double drift region (DDR) device structures operating at different mm-wave frequencies in the presence of tunneling. It is observed that a shift of ATT phase delay occurs when tunneling is taken into account. This shift is obtained from the spatial variation of the negative resistivity profiles in the depletion layer of the device. The results show that the shift of ATT phase delay increases at higher operating frequencies of the device, which in turn leads to larger degradation of the mm-wave performance of the device at higher frequencies.

Keywords-Admittance characteristics; ATT phase delay; MITATT; Millimeter-wave; Tunneling.

I. INTRODUCTION The tunneling current in IMPATT device operating at

higher millimeter-wave frequencies causes considerable degradation of RF performance of the device. The thinner depletion layer (W < 0.80 μm) of mm-wave IMPATT device and the higher peak electric field (Em > 6×107 V/m) near the junction are the favorable conditions for tunnel generation of electron hole pair (EHP) provided vacant states are available in the conduction band opposite to the filled states of the valance band. Both the tunnel generated and the avalanche generated carriers move in the drift region to produce the necessary transit time delay for IMPATT device is known as mixed tunneling avalanche transit time mode or MITATT mode. W. T. Read was first considered the tunnel current in IMPATT operation in his famous paper [1]. Other researchers [2] followed by him carried out the theoretical analysis of IMPATT device based on the simplifying assumption of equal ionization rates of electrons and holes in the respective semiconductors. Elta and Haddad [3] used an effective ionization rate of charge carriers in their analysis on MITATT device by introducing the concept of dead space. Luy et al [4] considered a time dependent tunnel current and observed that the DC to RF conversion efficiency of the device decreases due to tunneling induced phase distortion. A generalized method of

small-signal analysis based on Gummel-Blue technique [5] was first reported in [6], where the authors carried out simulation on the high frequency negative resistivity profiles in the depletion layer of the IMPATT devices. The effect of tunneling was incorporated in the above reported small-signal analysis by Dash and Pati [7] to study the high frequency admittance characteristics and negative resistivity profiles of IMPATT devices operating in MITATT mode.

In this paper the authors have proposed a simple method of calculating the tunneling induced shift of ATT phase delay from a study of shift of negative resistivity peaks due to tunneling in the depletion layer of the device. This method of obtaining shift of ATT phase delay in DDR IMPATTs due to the effect of tunneling is described in the next section. Using this method the tunneling induced ATT phase delays of silicon DDRs operating at different mm-wave frequencies are calculated and results are presented in section III. Finally the paper is concluded in section IV.

II. METHOD The avalanche transit time (ATT) phase delays of the

mm-wave DDR devices can be calculated from the corresponding R(x) profiles for the following two cases from which the shift of ATT phase delay due to tunneling current can be computed: (i) without considering the tunneling current; which gives ATT phase delay in pure avalanche mode and (ii) considering the tunneling current; which gives ATT phase delay in mixed mode.

The R(x) profiles of the devices for the above two cases exhibit negative specific resistance peaks in the drift layers, but the magnitudes and locations of these maxima change when tunneling effect is taken into account in MITATT mode. The spatial shift of the negative specific resistance maxima for a particular base material determines the shift of ATT phase delay of MITATT due to tunneling current. If the distances of the peaks from the junction on the p-side of ATT device in the avalanche and mixed mode are xpa and xpm and the corresponding optimum frequencies fa and fm respectively, then the phase delays on the p-side of the device at xpa and xpm for cases (i) and (ii), are obtained from the following relations:

978-1-4577-1099-5/11/$26.00 ©2011 IEEE

ps

mpmpm

ps

apapa v

fx,

vfx π

ϕπ

ϕ22

== (1)

Similarly the phase delays on the n-side of the device can be obtained from the following relations:

ns

mnmnm

ns

anana v

fx,v

fx πϕπϕ 22 == (2)

Where, xna and xnm are the distances of the R(x) peaks from the junction on the n-side of the ATT device in the pure avalanche and mixed mode respectively. The condition for obtaining maximum power is that the total phase lag should satisfy the following relations at xpa and xna given by,

πϕϕϕϕ =+=+ ntnaptpa ; where paϕ and naϕ are the avalanche phase delays and ptϕ and ntϕ are the transit time phase delays.

The shifts of ATT phase delays (in MITATT device) due to the effect of tunneling are determined from the following relations:

papmp ϕϕδ −= on p-side (3)

nanmn ϕϕδ −= on n-side (4)

The results presented in the next section show that the effect of tunneling causes an effective shift of the R(x) profile towards the p-side of the device. That is why on the p-side of the device, papm ϕϕ > ; which means pδ is positive. But on the

n-side of the device nanm ϕϕ < ; which means nδ may be negative or positive. Generally p-side of the device is predominantly affected by the tunneling than the n-side of that [7]. Thus the value of pδ is greater than the value of nδ (i.e. 1>np / δδ ). The overall shift of ATT phase delay in

MITATT device is obtained by averaging over pδ and nδ and given by,

2np δδ

δ+

= (5)

III. RESULTS AND DISCUSSION Double Drift Region (DDR) IMPATT devices based on

silicon are designed and optimized for CW operation at different millimeter-wave frequencies. The method of analysis presented in [6-7] is used to simulate the DC and RF properties of DDR IMPATT devices designed for optimum performance. The design parameters of the devices are given in Table I.

Table III shows the simulated DC and small-signal parameters of the devices in both IMPATT and MITATT modes. It can be observed that all the DC parameters like peak electric field, breakdown voltage, DC to RF conversion efficiency as well as all the small signal parameters like

magnitude of peak negative conductance, negative resistance, RF power output are decreased in MITATT mode of operation of the devices. Another interesting fact is that the optimum frequency of the device increases in MITATT mode of operation.

Figure 1 shows the peak avalanche generation rate and peak tunneling generation rate versus frequency (in MITATT mode) graphs. It can be observed from Figure 1 that initially at the lower frequencies avalanche generation dominates over tunneling generation. But at higher frequencies (above 380 GHz) tunneling generation begins to dominate over avalanche generation. Another thing can be observed from Figure 1 and Table II that the ratio of the peak tunneling generation rate to the peak avalanche generation rate (gTpeak/gApeak) increases with operating frequency of the device. It is interesting to note that the degradation of the RF performance of the device is strongly related to the gTpeak/gApeak – ratio of the corresponding device. As the frequency of operation of the device in MITATT mode increases, gTpeak/gApeak – ratio also increases which leads to more degradation of the mm-wave performance of the device.

Figure 1. Peak avalanche generation rate and peak tunneling generation rate versus frequency.

Figure 2 shows the small-signal admittance characteristics or conductance-susceptance plots of the devices in both IMPATT and MITATT modes. It can be observed from Figure 2 that the magnitude of negative conductance decreases in the MITATT mode, which in turn reduces the RF power output of the device. Figure 2 also shows that the optimum frequency of the device shifted upward in MITATT mode of operation. These decrement of magnitude of negative conductance and upward shift of operating frequency in MITATT mode is more prominent at higher frequencies. Table III shows that the percentage of decrement of magnitude of negative conductance and percentage of increment of optimum frequency are 6.4% and 24.5% respectively in the device operating at 122GHz, while the same are 8% and 60% respectively in the device operating at 480 GHz.

TABLE I. STRUCTURAL AND DOPING PARAMETERS

DESIGN FREQUENCY

(GHz)

SYMBOLS USED IN GRAPHS

AND TABLES

n-EPITAXIAL LAYER

THICNESS

(μm)

p-EPITAXIAL LAYER

THICNESS

(μm)

n-EPITAXIAL LAYER DOPING

(×1023 m-3)

p-EPITAXIAL LAYER DOPING

(×1023 m-3)

SUBSTRATE LAYER DOPING

(×1026 m-3)

98 DDR-1 0.3200 0.3000 1.450 1.750 1.0 139 DDR-2 0.2800 0.2450 1.800 2.100 1.0 173 DDR-3 0.2400 0.2200 2.200 2.500 1.0 225 DDR-4 0.1750 0.1500 3.950 4.590 1.0 300 DDR-5 0.1400 0.1100 5.200 6.800 1.0

TABLE II. PERCENTAGE OF TUNNELING GENERATION RATE OVER AVALANCHE GENERATION RATE OF THE DEVICES

DIODE BIAS CURRENT DENSITY,

J0 (×108 Amp/m2)

PERCENTAGE OF TUNNELING GENRATION RATE

gTpeak/gApeak (%)

DDR-1 5.0 33.75 DDR-2 6.5 38.96 DDR-3 12.0 54.43 DDR-4 15.0 81.11 DDR-5 18.0 132.35

TABLE III. ‘SIMULATED DC AND SMALL-SIGNAL PARAMETERS

PARAMETERS DDR-1 DDR-2 DDR-3 DDR-4 DDR-5

IMPATT MITATT IMPATT MITATT IMPATT MITATT IMPATT MITATT IMPATT IMPATT

BIAS CURRENT DENSITY,

J0 (×108 Amp/m2)

5.0 5.0 6.5 6.5 12.0 12.0 15.0 15.0 18.0 18.0

PEAK ELECTRIC FIELD,

Em (×107 Volt/m)

6.3249 6.3098 6.6249 6.6103 6.7499 6.7193 8.1249 8.1094 8.9500 8.9235

BREAKDOWN VOLTAGE,

VB (Volt)

21.14 20.88 19.20 18.89 18.39 17.97 13.82 13.14 11.75 11.32

EFFICIENCY, η (%)

9.83 9.54 9.03 8.67 7.71 7.36 7.21 6.65 6.55 5.89

PEAK OPTIMUM FREQUENCY,

fp (GHz)

98 122 139 186 173 240 225 345 300 480

PEAK CONDUCTANCE,

GP (×107 S/m2)

-6.8425 -6.4045 -8.5459 -7.8376 -12.8323 -11.9872 -19.9445 -18.1243 -25.1231 -23.1020

PEAK SUSCEPTANCE,

BP (×107 S/m2)

10.9183 14.7890 16.6800 20.2678 21.1201 32.7890 44.4338 57.5569 76.7113 91.6713

QUALITY FACTOR, Qp = (-BP/GP)

1.59 2.31 1.95 2.58 1.65 2.73 2.22 3.17 3.05 3.96

NEGATIVE RESISTANCE,

ZR (×10-8 Ohm.m2)

-0.4121 -0.2466 -0.2433 -0.1660 -0.2101 -0.0984 -0.0841 -0.0498 -0.0386 -0.0268

RF OUTPUT POWER DENSITY,

PRF (×1010 Watt/m2) 0.1039 0.0996 0.1126 0.1065 0.1701 0.1587 0.1495 0.1311 0.1385 0.1200

Figure 2. Small-signal admitance charateristics of the devices in both IMPATT and MITATT modes.

Figure 3. Negative resistivity profiles of the devices in both IMPATT and MITATT modes.

Figure 3 shows the negative resistivity profiles of the devices in both IMPATT and MITATT modes. Magnitude of negative resistivity at each space point in the depletion layer of the device decreases in MITATT mode and negative resistivity profiles are slightly shifted towards the p-side of the device. This spatial shift of the negative resistivity profile in MITATT mode is actually the measure of the tunneling induced shift of ATT phase delay. The authors have evolved a simple method for calculating the tunneling induced shift of ATT phase delay from a study of the shift of negative resistivity peaks due to tunneling in the depletion layer of the device. The principle of calculating shift of ATT phase delay due to tunneling is outlined in section II. The magnitudes of

ATT phase delay shifts for silicon based MITATT devices operating at different mm-wave frequencies are calculated and plotted against the optimum frequency of the corressponding devices in Figure 4. It can be observed from Figure 4 that the tunneling induced shift of ATT phase delay increases as the operating frequency of the device increases. Thus higher gTpeak/gApeak – ratio corresponds to higher shift of ATT phase delay; which in turn leads to greater deterioration of device performance due to tunneling.

Figure 4. Tunneling induced shift of ATT phase delay versus frequency.

IV. CONCLUSION A simple method is proposed by the authors in this paper to

calculate the tunneling induced shift of ATT phase delay in MITATT device. Results show that as the frequency of operation of the device increases the shift of ATT phase delay due to tunneling increases which leads to greater degradation of the RF performance of the device.

REFERENCES

[1] W. T. Read, “A proposed high-frequency negative resistance diode”, Bell Syst. Tech. J., vol. 37, pp. 401-466, 1958.

[2] M. Chive, E. Constant, M. Lefebvre and J. Pribetich, “Effect of tunneling on high efficiency IMPATT avalanche diode”, Proc. IEEE (Lett.), vol. 63, pp. 824-826, 1975.

[3] M. E. Elta and G. I. Haddad, “Mixed tunneling and avalanche mechanism in p-n junctions and their effects on microwave transit time devices”, IEEE Trans. Electron Devices, vol. 25, pp. 694-702, 1978.

[4] J. F. Luy and R. Kuehnf, “Tunneling assisted Impatt operation”, IEEE Trans. Electron Devices, vol. 36, pp. 589-595, 1989.

[5] H. K. Gummel and J. L. Blue, “A small-signal theory of avalanche noise in IMPATT diodes”, IEEE Trans. on Electron Devices, vol. 14, no. 9, pp. 569-580, 1967.

[6] S. K. Roy, J. P. Banerjee and S. P. Pati, “A computer analysis of the distribution of high frequency negative resistance in the depletion layers of impatt diodes” Proc. of NASECODE-IV Conf. on Numerical Analysis of Semiconductor Devices (Dublin: Boole Press), pp. 494, 1985.

[7] G. N. Dash and S. P. Pati, “A generalized simulation method for MITATT-mode operation and studies on the influence of tunnel current on IMPATT properties”, Semicond. Sci. Technology, vol. 7, pp. 222-230, 1992.