Fiber-Optic Asynchronous Delta-Sigma Modulator

Erin Reeves1, Yiye Jin1, Pablo Costanzo-Caso1, 2, and Azad Siahmakoun1

1Physics and Optical Engineering Department, Rose-Hulman Institute of Technology, 5500 Wabash Ave, Terre Haute, IN 47803, United States

2Centro de Investigaciones Ópticas (CONICET-CIC) and Facultad de Ingeniería, Universidad Nacional de La Plata. Camino Centenario y 506, La Plata (1900), Argentina

Abstract- A novel photonic analog-to-digital convertor (ADC) based on an asynchronous delta-sigma modulator (ADSM) has been investigated and demonstrated in this paper. Because of the non-negative signal in the optical domain, a pseudo-positive feedback loop requires the design of an inverted bistable quantizer, promising non-interferometric optical implementation. The principles of the proposed optical 1st-order and 2nd-order ADSM are modeled and analyzed. Two main components of the new optical ADSM; the leaky integrator and the inverted bistable quantizer have been analyzed, simulated mathematically, constructed, and characterized. Finally, a prototype fiber-optic ADSM is constructed. The prototype operates at 25 MS/s and corresponding binary output have ENOB of 4. The operation characteristics, such as signal-to-noise ratio, dynamic range of this fiber- optic ADSM will be reported.

I. INTRODUCTION

Achieving high-speed, high-resolution analog-to-digital (A/D) conversion is a difficult technological problem [1]. This has largely prohibited the realization of high-speed, high-throughput systems [2]. With fundamental limitations in electronics, greater attention has been turned to using photonic techniques to significantly improve the performance of A/D converters. Benefits of performing A/D conversion in the optical domain include: high speed, high information capacity, and immunity to electromagnetic interference. In this paper we present a novel photonic ADC based on over-sampling delta-sigma modulation (DSM) technique.

The proposed ADC architecture utilizes positive corrective feedback suitable for non-interferometric optical implementation. To obtain a reasonable over-sampling rate, i.e. 10 samples per cycle, our ADC is limited to approximately 2MHz input signal; however, digital output is clearly observed at higher frequencies where the sampling rate approaches the required Nyquist criterion. The speed of the photonic ADC is limited by the fiber length of the components and the speed of the quantizing circuit. A fully integrated system and the use of an ultra-high speed comparator would have the potential of operating in the GHz range.

II. THEORY

The purposed ADC is based upon the work of Siahmakoun and Sayeh [3] where implementing delta-sigma modulation optically is proposed. A delta-sigma based converter is an oversampled converter, meaning that the sample rate is much greater than the Nyquist sample rate (fs=2fB, where fB is the input signal bandwidth), typically by factors of 8 to 512 [1]. A block diagram of a 1st-order delta-sigma modulator based ADC is presented in Fig. 1(a). The analog input is launched into the system via a summing junction. The input is integrated, fed to a bi-stable quantizer, and sampled. The sampled bit-stream output provides corrective negative feedback to the system.

To realize a photonic DSM, the block diagram presented in Fig. 1(a) is modified in Fig. 1(b). Several differences can be observed: the negative feedback is now positive, the integrator is now a leaky integrator and the bi-stable quantizer is now an inverted bi-stable quantizer. To implement the optical ADC, the photonic integrator discussed in [4] is used. This integrator provides what is called a “leaky” output. The difference between an integrator and a leaky integrator is that the leaky integrator simultaneously integrates the input and gradually leaks a small part of the input signal.

Fig. 1. (a) Block diagram of generic DSM ADC.

(b) Photonic DSM ADC block diagram.

Because the subtraction operation in optics is very

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difficult to perform thus it is replaced by an addition which results in a positive feedback. This addition is simply performed by using a coupler. In order for the photonic DSM to function, the output of the bi-stable hysteresis quantizer is required to be inverted, i.e. a high output for low input and a low output for high input. This configuration behaves as an effective negative feedback because a low feedback signal is added to a high input signal and a high feedback signal is applied to a low input signal. The hysteresis curve of the inverted bi-stable quantizer is shown in Fig. 2(a). The switching points a and b are the respective switching ON and OFF points. The output of the quantizer is determined by the upper and lower levels, yU and yL, respectively. In Fig. 2(b), the sinusoid input is defined by the upper level xU and lower level xL.

Fig. 2. (a) Inverted bi-stable quantizer hysteresis curve defined by on and off switching points a and b and output minimum yL and maximum yH. (b)

Input sinusoid defined by minimum xL and maximum xH.

The power-balance equations [5] and Simulink are used to simulate the output of the 1st-order DSM analog-to-digital system. The first-order ADC Simulink diagram is constructed in Fig. 3. The inverted bi-stable quantizer ON and OFF switching points were set to 0.45 and 0.55, respectively. The output signal upper and lower levels were set to yU=0.8 and yL=0.2. The input sinusoid signal upper and lower levels were set to xU=0.6 and xL=0.4.

Fig. 3. Simulink simulation diagram of 1st-order DSM ADC.

The sinusoidal input signal is launched into the DSM comprised of the leaky integrator, inverted bi-stable quantizer, and positive feedback. The system output is sent through a low pass 8th-order Butterworth filter to demodulate the binary information and recover the input sinusoid. As previously discussed, the positive feedback requires the inverted quantizer in order to produce an effective negative feedback loop. A result of using the inverted bi-stable quantizer is that the output binary is also inverted. This effect can easily be seen in Fig. 4 which illustrates the analog input, binary output, and demodulated output signals. Here the recovered signal is shown to be shifted from the

input sinusoid by π. The demodulated signal in Fig. 4(c) indicates that the binary output contains all of the input signal information, confirming this as analog-to-digital conversion.

Fig. 4. First-order DSM ADC simulation results: (a) analog input, (b) binary

output, and (c) recovered input.

Before the experiment and results are presented, the photonic leaky integrator will be briefly discussed. The reader is referred to [4] for a complete discussion and mathematical theory of optical leaky integrator. Figure 5 details the basic setup of the photonic leaky integrator. The integrator loop consists of a semiconductor optical amplifier (SOA) gain element, a hybrid band pass filter and isolator component to select loop wavelength and ensure unidirectional propagation, and two couplers, OC1 and OC2: OC1 is used to combine the input and circulating loop signals and launch them into the integrator loop and OC2 extracts part of the circulating signal as the output signal.

Fig. 5. Photonic leaky integrator setup.

In order to avoid interference effects between the input

and circulating signals, wavelength conversion is performed from input wavelength λ1 to a different wavelength λ2 that is defined by the band pass filter. The wavelength conversion is accomplished by the cross-gain modulation (XGM) phenomenon in the SOA. Basically, the input wavelength λ1 is used to modify the SOA’s gain: a higher gain is achieved for low input powers otherwise a lower gain is realized. The circulating signal at λ2 decreases with high input signals at λ1 and increases with low input signals at λ1; that is, the λ2 signal experiences the SOA gain. It can be understood that

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when the λ1 signal is low, the SOA gain is high and the λ2 signal is high. The SOA gain and λ2 signal are low when the signal at λ1 is high. An effect of using wavelength conversion to avoid feedback interference is an inverted output: the output is low for high inputs and otherwise.

In order to achieve the ADC system presented in Fig. 3, a method to correct the inverted output of the leaky integrator is required. One method of signal inversion can be achieved by cascading two inverted output leaky integrators. Since the inverted output of the first integrator will be inverted by the second integrator, the output of the second integrator will correspond to the initial input signal launched into the system. The 2nd-order DSM block diagram is constructed in Fig. 6. An input sinusoid is launched into the system comprised of the two cascaded inverted leaky integrators, the inverted bi-stable quantizer, and positive feedback.

Fig. 6. Simulink simulation diagram of 2nd-order DSM ADC.

The s-transfer function described by is set as H(s)=-7.5/(s+10)+0.77 where the gain is g=-7.5, the delay is τ=0.1, and a constant is 0.77 for the first integrator. The second integrator s-transfer function parameters were set as g=-7.5, τ=0.1, and a constant was 0.75. The inverted bi-stable quantizer on and off switching points were set to 0.599 and 0.601, respectively. The output signal upper and lower levels were set to yU=0.6 and yL=0.2. The input sinusoid signal upper and lower levels were set to xU=0.45 and xL=0.35. An 8th-order low pass Butterworth filter was used to demodulate the output binary signal. Again, the output binary and recovered/demodulated signals are inverted due to the bi-stable quantizer as shown in Fig. 7.

Fig. 7. Second-order DSM ADC simulation results: (a) analog input, (b)

binary output, and (c) recovered input.

The 2nd-order DSM simulation confirms that this system also

performs analog-to-digital conversion. The 2nd-order optical DSM-based ADC was constructed in our laboratory and the experiment and results are discussed in the next section.

III. EXPERIMENT

The photonic ADC setup is illustrated in Fig. 8. An electric RF signal of amplitude 2Vpp and offset -1Vpp is used to modulate a Fujitsu FLD5F10NP CW laser operating at λ1= 1553.16nm by electro-absorption modulation (EAM). The CW laser output is coupled into the system with a 3-dB coupler and coupled into a leaky integrator via OC1. The integrator uses the XGM effect of a Kamelian OPA-20-N-C-FP SOA and a Lightel hybrid bandpass filter and isolator of center wavelength λ2 =1551.48nm to convert the signal wavelength to λ2. The output of the first leaky integrator is split by OC2 where a portion of the signal is used as feedback to complete the 1m long integrator loop. The wavelength conversion causes the integrator output to be inverted, thus a second leaky integrator is introduced to correct this signal inversion by inverting the signal again. The second integrator operates in a similar fashion as the first integrator and converts the optical signal from λ2 back to λ1. It is comprised of a second Kamelian OPA-20-N-C-FP SOA and a Lightel hybrid bandpass filter of center wavelength λ1.

Fig. 8. Experimental setup for photonic analog-to-digital converter.

(CW: Continuous Wave laser, EAM: Electro-Absorption Modulator, OC: Optical Coupler, BPF: Band Pass Filter, PD: Photodetector).

The output is detected by a photodetector and the corresponding electrical signal is sent through a quantizing circuit based upon the Texas Instruments TLV 3502 comparator chip. The comparator output is used to modulate a second Fujitsu FLD5F10NP CW laser by EAM to provide feedback to the system. A 90/10 coupler is used to split the feedback signal where 90% is sent back through the system as feedback and 10% is detected and observed on an oscilloscope as the analog-to-digital converted signal.

In order to fulfill the power balance requirements, the

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input and feedback laser powers and SOA gains are adjusted by controlling their respective driving currents. The currents are set to 30mA and 26.5mA for the input and feedback lasers, respectively. The SOA of integrator one is set to 70mA and SOA current of the second integrator is 100mA.

Figure 9 shows the ADC analog input (top trace) and binary output (bottom) at frequencies 1-4 MHz. As previously discussed, the signal inversion can be observed in the binary output as well. When the input signal is at a maximum a majority of the bits are at the low-level and when the input signal is at its minimum output bits are high. In order to verify that the output binary actually describes the inverse of the analog signal, the binary output was demodulated using a lowpass filter. The 2MHz binary information was imported into MATLAB for analysis and is filtered using a 3rd-order Butterworth filter with cutoff frequency at 2.1MHz. The ADC analog input, binary output, and demodulated binary signals at 2MHz frequency are illustrated in Fig. 10. It can be seen that the recovered input signal, although inverted, appropriately describes the analog input frequency.

It can also be observed in Fig. 9 that the number of output binary pulses decreases as the input signal frequency increases. For a DSM-based ADC, a sampling rate much greater than the required Nyquist rate is desired. The photonic ADC maximum input frequency can be limited by two factors: The first is the time delay introduced by the

Fig. 9. Second-order photonic analog-to-digital converter sinusoid input signal (top) and corresponding binary output (bottom) at (a) 1MHz (b)

2MHz, (c) 3MHz, and (d) 4MHz.

optical fiber length, specifically the integrator loop length, and the second is the speed of the quantizing circuit. The time delay introduced by the fiber is given as t = (neffL)/c, where neff is the index of refraction of the fiber, L is the fiber length, and c is the speed of light in vacuum. In our photonic ADC, the loop lengths of the integrators are 1m which leads to a free-spectral range of 200MHz. If 10-20 samples are desired, then the input frequency must not exceed the 10-20MHz range. The current speed limitation we have encountered is due to the quantizing circuitry rather than the length of fiber pigtails. In order to have a high sampling rate, the quantizer must operate at speeds much

greater than the input signal. Currently, the quantizing circuit operates well for frequencies up to about 25MHz. Although binary output is achieved for low sample rates, i.e. about six samples for input of 4MHz, it can be understood that achieving 10-20 samples per cycle is only possible for frequencies up to about 2MHz.

Fig. 10. Photonic analog-to-digital converter input sinusoid, output binary,

and recovered signal at 2MHz.

IV. CONCLUSION

We have proposed and demonstrated a photonic asynchronous DSM-based ADC that operates in the MHz range. While the demonstrated system is limited to approximately 2MHz to achieve a minimum over-sampling rate of 10 samples per cycle, the system has been shown to provide visible binary output at higher frequencies with decreased sampling rates that approach the minimum Nyquist sampling frequency. The operation speed of the photonic ADC can be increased by replacing the quantizing circuitry with a high speed comparator and further reducing the integrator loop length. The simulations and experimental implementation suggest that the optical DSM has the potential to work in the GHz range by photonic integration of the system on a chip to reduce the integrator loop length and by using high speed optical quantizer with switching time better than 100 ps [6].

ACKNOWLEDGMENT

This works was partially supported by Indiana RF Alliance and Lowell Hoover of Polyphase Microwave Inc.

REFERENCES

[1] Schreier, Richard, G. C. Temes. Understanding Delta-Sigma Data Converters. New York: John Wiley & Sons IEEE Press, 2004 [2] Shoop, Barry. L. Photonic Analog-to-Digital Conversion. New York: Springer, 2000. [3] M. R. Sayeh and Azad Siahmakoun, “All optical binary delta- sigma modulator,” Photonic Application in Devices and Communication Systems 5970 (2005): 59700P-1-59700P-7. [4] Yiye Jin, Pablo Costanzo Caso, Sergio Granieri, and Azad Siahmakoun, “Photonic integrator for A/D Conversion,” SPIE Optics + Photonics 2010, San Diego, California, USA, 2010. [5] Yiye Jin, M.S. thesis, Rose-Hulman Institute of Technology, 2010. [6] Pablo Costanzo-Caso, Michael Gehl, Sergio Granieri, and Azad Siahmakoun, “Optical bistable switching with symmetrically- configured SOAs in reverse bias,” Microwave and Opt. Tech. Lett, vol. 52, pp. 2753-2759, December 2010.

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