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Practical Design Considerations on Adaptive Controllers for PWM DC/DC Converters Davide Della Giustina and Valentino Liberali Department of Physics Università degli Studi di Milano Milano, Italy 20133 Email: [email protected], [email protected] Telephone: (+39) 02.503.17457 Abstract—The paper analyzes the sensitivity to discrete and continuous parameters of an adaptive filter employed to control pulse width modulation DC/DC converters. The optimal transfer function to compensate the power cell is chosen measuring and digitalizing the inputs variables of the systems. Its synthesis is done by a digitally programmable switched capacitor circuit. The effects which can lead to a wrong estimation of the operating point and to miss the target dynamic behavior of the external feedback are discussed. I. I NTRODUCTION Power cells are non-linear systems, since their dynamic be- havior depends on the operating point, defined by input voltage and output current. Transitions from Continuous Conduction Mode (CCM) to Discontinuous Conduction Mode (DCM) or vice versa are examples of this dependence [1]. Usually a unique external filter, whose transfer function depends on constant parameters, can ensure the overall stability of the closed loop converter, but the resulting dynamics is far from optimal in every condition. In fact, closed loop dynamics with maximum phase margin of 90 is guaranteed using pole-zero cancellation, i.e., by placing poles and zeros at frequencies matching the zeros and the poles of the system to control. The target Gain Band-Width Product (GBWP) is achieved by placing a dominant pole. The possibility to adapt the external feedback network to the operation condition opens the way to stability and bandwidth optimization within the whole working region of the converter. A general block diagram is depicted in Fig. 1. Digital logic uses input voltage and output current (after an analog- to-digital conversion) to set the best suited transfer function for each operating point. A wrong estimation of the input variables leads to a wrong compensation of the power cell. This fact could bring the system to instability or to bifurcations [2]. To avoid these conditions three transfer functions are required at least: the optimal transfer function to control CCM, K CCM , the optimal one to control DCM, K DCM , and a third one (sub-optimal), K bound , which guarantees stability in both conditions (Fig. 2). The current range near the boundary condition can be reduced by increasing the resolution of ADC converters. The tolerance of voltage references V ref1 and V ref2 has to be lower than the inaccuracy due to quantization step. Therefore, the conversion process is a critical aspect and requires an accurate analysis. Once the operating point is recognized, the corresponding transfer function has to be synthesized. A programmable Fig. 1. Block scheme of an adaptive controller for PWM DC/DC converter. Fig. 2. Conduction modes of asynchronous PWM DC/DC converter, for different values of the output current. I bound is the current intensity at the boundary condition between CCM and DCM. digital system can implement the programmable filter shown in Fig. 1, as discussed by several authors [3]–[8]. This paper considers an alternative implementation based upon a switched capacitor (SC) network [9]. Filter coefficients are set by Multiplying DACs (MDACs) [10], [11]. Section II provides a brief description of the topology. Section III describes quantization and mismatch effects to the synthesis of a specific transfer function, while Section IV 22nd International Conference on Microelectronics (ICM 2010) 978-1-4244-5816-5/09/$26.00 ©2009 IEEE

Transcript of [IEEE 2010 International Conference on Microelectronics (ICM) - Cairo, Egypt...

Page 1: [IEEE 2010 International Conference on Microelectronics (ICM) - Cairo, Egypt (2010.12.19-2010.12.22)] 2010 International Conference on Microelectronics - Practical design considerations

Practical Design Considerations on AdaptiveControllers for PWM DC/DC Converters

Davide Della Giustina and Valentino LiberaliDepartment of Physics

Università degli Studi di MilanoMilano, Italy 20133

Email: [email protected], [email protected]: (+39) 02.503.17457

Abstract—The paper analyzes the sensitivity to discrete andcontinuous parameters of an adaptive filter employed to controlpulse width modulation DC/DC converters. The optimal transferfunction to compensate the power cell is chosen measuring anddigitalizing the inputs variables of the systems. Its synthesis isdone by a digitally programmable switched capacitor circuit. Theeffects which can lead to a wrong estimation of the operatingpoint and to miss the target dynamic behavior of the externalfeedback are discussed.

I. INTRODUCTION

Power cells are non-linear systems, since their dynamic be-havior depends on the operating point, defined by input voltageand output current. Transitions from Continuous ConductionMode (CCM) to Discontinuous Conduction Mode (DCM) orvice versa are examples of this dependence [1]. Usually aunique external filter, whose transfer function depends onconstant parameters, can ensure the overall stability of theclosed loop converter, but the resulting dynamics is far fromoptimal in every condition. In fact, closed loop dynamics withmaximum phase margin of 90 is guaranteed using pole-zerocancellation, i.e., by placing poles and zeros at frequenciesmatching the zeros and the poles of the system to control.The target Gain Band-Width Product (GBWP) is achieved byplacing a dominant pole.

The possibility to adapt the external feedback network to theoperation condition opens the way to stability and bandwidthoptimization within the whole working region of the converter.

A general block diagram is depicted in Fig. 1. Digitallogic uses input voltage and output current (after an analog-to-digital conversion) to set the best suited transfer functionfor each operating point. A wrong estimation of the inputvariables leads to a wrong compensation of the power cell.This fact could bring the system to instability or to bifurcations[2]. To avoid these conditions three transfer functions arerequired at least: the optimal transfer function to control CCM,KCCM, the optimal one to control DCM, KDCM, and a thirdone (sub-optimal), Kbound, which guarantees stability in bothconditions (Fig. 2). The current range near the boundarycondition can be reduced by increasing the resolution of ADCconverters. The tolerance of voltage references Vref1 and Vref2has to be lower than the inaccuracy due to quantization step.Therefore, the conversion process is a critical aspect andrequires an accurate analysis.

Once the operating point is recognized, the correspondingtransfer function has to be synthesized. A programmable

Fig. 1. Block scheme of an adaptive controller for PWM DC/DC converter.

Fig. 2. Conduction modes of asynchronous PWM DC/DC converter, fordifferent values of the output current. Ibound is the current intensity at theboundary condition between CCM and DCM.

digital system can implement the programmable filter shownin Fig. 1, as discussed by several authors [3]–[8]. This paperconsiders an alternative implementation based upon a switchedcapacitor (SC) network [9]. Filter coefficients are set byMultiplying DACs (MDACs) [10], [11].

Section II provides a brief description of the topology.Section III describes quantization and mismatch effects tothe synthesis of a specific transfer function, while Section IV

22nd International Conference on Microelectronics (ICM 2010)

978-1-4244-5816-5/09/$26.00 ©2009 IEEE

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Fig. 3. Schematic representation of the switched capacitor filter.

provides some general considerations on the system.

II. CIRCUIT TOPOLOGY DESCRIPTION

Fig. 3 shows the scheme of a biquadratic filter corre-sponding to the direct form II [12] and realized with analogcomponents. The filter coefficients are obtained with digi-tally programmable tranconductances, and current signals aresummed together at the virtual grounds of the operationalamplifiers. The first amplifier, Aa, is used to implement theautoregressive part of the filter, while the second amplifier,Ab, implements the moving average part. Voltage buffers andinverting stages allow selecting positive or negative values.Delays are realized by switched capacitor cells. The transferfunction of the filter can be expressed in z-domain as:

K(z) =Ga0Gaf

Gb0Gbf

1 + Gb1Gb0

z−1 + Gb2Gb0

z−2

1 + Ga1Gaf

z−1 + Ga2Gaf

z−2(1)

As K(z) has two poles and two zeros, it allows to cancelzeros and poles of basic power cells. A further dominantpole can be introduced via a capacitive feedback loop onAb (not shown in Fig. 3). This structure can be employedas programmable filter as an alternative to digital circuits.

The Multiplying DACs (MDACs) used as programmabletransconductances are based on R-2R ladder network [13].The ratio between input voltage and output current of anMDAC with N bit of resolution is:

Gαk =1

Rαk

cαk2N

(2)

where cαk ∈ [0, 2N − 1] is the digital programming codeand Rαk is the resistance of the analog input port. Withineach MDAC, resistors can be assumed perfectly matched,because their accuracy is guaranteed to be comparable withthe quantization step.

Critical frequencies and DC gain in (1) are set by transcon-ductace ratios:

GαkGβh

=cαkcβh

RβhRαk

(3)

hence their accuracy is affected by both the ratio of twonumbers, cαk and cβh, and the ratio of two random variables,Rαk and Rβh.

III. APPLICATION EXAMPLE

This section focuses on quantization and mismatch effectson the synthesis of a specific transfer function. Let us con-sider the buck converter in the CCM [1] with the followingparameters: fs = 200 kHz, C = 440 µF, RC = 0.118 mΩ,L = 10.2 µF and RL = 0.1 mΩ. Its control-to-output transferfunction in the z-domain is:

H(z) = 0.572z−1(1− 0.9081z−1)

1− 1.883z−1 + 0.8885z−2(4)

It can be obtained discretizing the state-space averaged model[1] of the converter. Equation (4) has a DC gain H(1) = 10,a couple of complex-conjugate zeros at |fz1,2 | = 2.38 kHz,with damping factor ξ = −0.792 and a pole at |fp| = 3.07kHz.

To compensate the zero and the poles of this power cell,the switched capacitor network has to be programmed tosynthesize the following transfer function:

K(z) = 17.481− 1.883z−1 + 0.8885z−2

1− 0.9081z−1(5)

The term z−1 cannot be canceled; it represents a delay andgives a phase proportional to the frequency. In fixed-frequencyDC/DC converter applications, where GBWP is a fraction ofswitching frequency (typically about fs/10 or fs/20), thiseffect is negligible. As an alternative, a second pole can beadded to K(z) at frequencies higher than fs. This solutionallows to preserve the phase margin, but it is more prone tosensitivity problems than the previous one.

Poles and zeros of K(z) in (5) are:

z1,2 = −1

2

Gb1Gb0±

√1

4

G2b1

G2b0

− Gb2Gb0

(6a)

p = −Ga1Gaf

; Ga2 = 0 (6b)

Two methods were used to estimate pole and zerodeviations from nominal values. In both cases, the maximumvariation ∆Gαk is considered for the parameter Gαk.

Method I. The first order partial derivatives of z1,2 and pwith respect to ∆Gαk are calculated. The error is the squaring-sum of the contributes due to the relative variation of everyparameter:(

∆z1,2z1,2

)2

=

∣∣∣∣Sz1,2,Gb0 ∆Gb0Gb0

∣∣∣∣2 +

∣∣∣∣Sz1,2,Gb1 ∆Gb1Gb1

∣∣∣∣2 +

+

∣∣∣∣Sz1,2,Gb2 ∆Gb2Gb2

∣∣∣∣2 (7a)(∆p

p

)2

=

∣∣∣∣Sp,Gaf ∆GafGaf

∣∣∣∣2 +

∣∣∣∣Sp,Ga1 ∆Ga1Ga1

∣∣∣∣2 (7b)

where Sz1,2/p,Gαk is the sensitivity of z1,2 or p with respectto the parameter Gαk:

Sz1,2/p,Gαk :=Gαkz1,2/p

∂z1,2/p

∂Gαk(8)

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Fig. 4. Comparison among Bode diagrams of the nominal transfer function(crosses) and the possible actual transfer functions (continuous line) obtainedby method II, when the quantization effect is considered.

Method II. Each parameter can assume either the typicalvalue or the minimum or the maximum value independently.All possible combination of variations are explored. The setof zeros and the set of poles are:

z′

1,2 = −1

2

Gb1 + ν∆Gb1Gb0 + µ∆Gb0

+

±

√1

4

(Gb1 − ν∆Gb1)2

(Gb0 + µ∆Gb0)2− Gb2 + η∆Gb2Gb0 + µ∆Gb0

(9a)

p′ = −Ga1 + ν∆Ga1Gaf + µ∆Gaf

; ∀µ, ν, η ∈ −1, 0,+1 (9b)

Relative errors in pole and zero positions are:

∆z1,2z1,2

:=

∣∣∣∣z − z′z

∣∣∣∣ ; ∆p

p:=

∣∣∣∣p− p′p

∣∣∣∣ (10)

A. Quantization effects

If a perfect match among internal MDACs resistors isassumed, i.e. Rα,k = R ∀α, k, the variation of parametersis proportional to the LSB:

∆GiGi

=LSBGGi

; LSBG =1

R

1

2N(11)

Fig. 4 shows the results obtained with method II, when theMDAC resolution is limited to 8 bit. The rough quantizationstep causes a strong variation of the transfer function, observ-able on Bode diagram bundle. Table I compares the relativeerrors given by the two methods. As expected, the methodI underestimates the error [14], because it does not considersimultaneous variations.

TABLE IPOLE AND ZERO RELATIVE VARIATIONS DUE TO QUANTIZATION

Method I Method II∆zz

14.84% 16.48%∆pp

0.58% 0.82%

Fig. 5. Comparison among poles-zeros map of the nominal transfer function(black marks) and the possible actual critical frequencies (gray marks)obtained by method II, when the mismatch effect is considered.

TABLE IIPOLE AND ZERO RELATIVE VARIATIONS DUE TO MISMATCH

Method I Method II∆zz

13.44% 15.15%∆pp

0.71% 1.00%

B. Mismatch effectIf no quantization effects are considered, i.e., N →∞, the

variation of parameters is equivalent to the tolerance of theinternal MDACs resistors:

∆GiGi

=∆RiRi

(12)

Fig. 5 shows the misplacement of poles and zeros assuminga tolerance of 5. Table II compares the relative errors givenby the two methods.

Both quantization and mismatch effects can cause zeros tomove outside the unit circle, thus leading to a non-minimumphase system.

IV. DESIGN CONSIDERATIONS

This Section extends the consideration of the previousSection, providing a global analysis of the system.

A. Quantization effectsDirect form II is a well known implementation of discrete

time filters [12]. Its advantage is the minimization of thenumber of employed components. A drawback of this structure

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Fig. 6. Map of the available pole and zero positions in the z-plane with adirect form II structure, employing 4 bit of resolution.

Fig. 7. Relative error in the position of the real pole in (13) versus z, with1 of tolerance. z = 0.9691 corresponds to f = −1 kHz.

is the non-uniform distribution of poles and zeros over the z-plane. Fig. 6 represents the fractal-like pattern of zeros or polesobtained with a resolution of 4 bit. From Fig. 6 one can see thatthere are less available poles and zeros at low frequencies (nearz = 1) than at high frequencies. This limitation is due to thetopology and is independent of the practical implementation,i.e., a pure digital filter is affected as well.

B. Mismatch effectA quantitative evaluation of this effect can be approached

considering the simple case of a single real pole. Transferfunction (5) becomes:

K(z) =Ga0Gaf

1

1 + Ga1Gaf

z−1(13)

Assuming a resistor tolerance of 1, the relative error inthe position of the pole is shown in Fig. 7, when method II isapplied. Error increases as frequency decreases. The accuracyof 1 can be reached using digital correction techniques andMDACs with resolution of 10 bit.

Analog feedback networks are widely used to control powerprocessors in industrial applications. The most common circuitis the operational amplifier integrator, which adds a dominant

pole. This basic topology ensures the stability of the closedloop system, but has a poor dynamic performance. A better so-lution is to configure the amplifier to synthesize a biquadratictransfer function [15]. Assuming a standard tolerance of 20%for capacitors and 5% for resistors, the relative error in poleand zero positions is about 31%.

V. CONCLUSION

An adaptive switched capacitor filter employing MDACshas been analyzed to investigate limits in the synthesis ofthe transfer function. Both quantization and mismatch effectscause poles and zeros to move from their nominal position. AsMDACs are available with resolution up to 16 bit, quantizationeffects can be reduced. On the other hand, tolerance better than1 of the nominal value is not realistic, even employingdigital correction techniques, and therefore it must be takeninto account.

ACKNOWLEDGMENT

The authors would like to thank Dr. Federico Belloni,Prof. Piero G. Maranesi and Dr. Marco Riva for the usefuldiscussions.

REFERENCES

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[7] D. Maksimovi’c and R. Zane, “Small-signal discrete-time modeling ofdigitally controlled DC-DC converters,” in Proc. IEEE Computation inPower Electronics (COMPEL), Troy, NY, USA, Jul. 2006, pp. 231–235.

[8] D. Maksimovic, R. Zane, and R. Erickson, “Impact of digital control inpower electronics,” in Proc. Int. Symp. Power Semiconductor Devices(ISPSD), Kitakyushu, Japan, May 2004, pp. 13–22.

[9] P. G. Maranesi, L. Pinola, and V. Varoli, “Switched filter for thecompensation of power processors,” IEEE Trans. Power Electronics,vol. 5, pp. 253–259, Jul. 1990.

[10] P. Maranesi, M. Riva, and F. Belloni, “Adaptive control of power con-verters by switched capacitors filters,” in Proc. IEEE Power ElectronicsSpecialists Conf. (PESC), Rhodes, Greece, Jun. 2008, pp. 821–824.

[11] F. Belloni, D. Della Giustina, P. Maranesi, and M. Riva, “Switched-capacitor programmable filter for power converters,” in Proc. Eur. Conf.Power Electronics (EPE), Barcelona, Spain, Sep. 2009, pp. 1–9.

[12] J. G. Proakis and D. G. Manolakis, Digital Signal Processing. Principles,Algorithms, and Applications. Upper Saddle River, NJ, USA: PearsonPrentice Hall, 2005.

[13] A. D. Sedra and K. C. Smith, Microelectronic Circuits - 4th ed. NewYork, NY, USA: Oxford University Press, 1998.

[14] J. B. Cruz, System Sensitivity Analysis. Stroudsburg, PA, USA: Dowden,Hutchinson and Ross, 1973.

[15] Texas Instruments, “TPS40054-EP, TPS40055-EP, TPS40057-EP:Wide-input synchronous buck controller,” 2005. [Online]. Available:http://focus.ti.com/docs/prod/folders/print/tps40054.html