ESD TESTING OF ALUMINUM AND COPPER VERTICAL PARALLEL PLATE (VPP)CAPACITOR STRUCTURES

Steven H. Voldman, Ephrem G. Gebreselasie, and Zhong-Xiang HeIBM Microelectronics

1000 River Street, Essex Junction VT 05452802-769-8368; fax: 802-769-9659; e-mail: al08501gus.ibm.com

PURPOSE VERTICAL PARALLEL PLATE CAPACITORS

Vertical parallel plate (VPP) capacitor elements are being used inRF components for RF CMOS and RF BiCMOS technologies. ESDrobustness evaluation of the VPP capacitor is very important for RFapplications when these elements are used on the input pads of RFreceiver networks. In this paper, the first ESD measurements ofVPPstructures are shown for the first time. The purpose of the work is toevaluate the electrical response of the VPP structure for HBM, andtransmission line pulse (TLP) waveforms. In addition, newdiscoveries will be disclosed with aluminum and copper verticalparallel plate capacitor elements [Keywords. Electrostatic discharge(ESD), Transmission Line Pulse (TLP), Very Fast Transmission LinePulse (VF-TLP), Vertical Parallel Plate (VPP) capacitors].

INTRODUCTION

Today, in RF CMOS and RF BiCMOS applications, passiveelements are used in receiver and transmitter networks. RF circuitsare failing due to the lack of ESD robustness of the passive elementsusing in the circuits.

Capacitor elements are commonly used in the current pathbetween the signal pad and the RF bipolar receiver. A capacitorelement is in series with input and output pads (e.g. RF(in) andRF(out)) to block the d.c. current paths. As a result, the capacitorelement is in the direct current path of the ESD event for HBM andMM events.

Capacitor elements are also commonly used in RF bipolarreceiver feedback networks [1]. In GaAs applications and RFBiCMOS technology, series capacitor-resistor feedback networksexist in circuits between the RF (out) and the RF (in) pads. DuringHBM testing, the failure mechanism between RF (out) and RF(in) isthe capacitor element.

Vertical parallel plate (VPP) capacitors are formed using theBEOL metal films and via structures. The capacitance is achieved byplacing metal shapes in a parallel fashion, and stacking the via andmetal levels. These VPP capacitor structure dielectric utilizes theinter-level dielectric (ILD) film itself. The capacitance is formed bythe line-to-line capacitance of the two adjacent plates.

In an advanced semiconductor technology, wiring levels consistof aluminum (Al) and copper (Cu) interconnects. This is a functionof the technology generation. Depending on the technology type,and generation, this may alter on the physical design levels. In RFapplications, the usage of copper design levels at the lower levels,and thick aluminum levels in the upper levels is commonplace.Thick aluminum levels are used for inductor passive elements andintegration with the bonding pads.

ELECTRICAL MEASUREMENTS

The electrical characterization of the vertical parallel platedemonstrate the ability to provide a high voltage across the capacitorstructure until the electrical breakdown. Figure 1 shows the leakagecurrent as a function of the applied voltage across the vertical parallelplate structure. Transitions in the leakage characteristics are notevident until over 150 V levels. Hence, the d.c. electricalcharacteristics show that 150 V d.c. breakdown levels are achievablein these structures. Based on the theory of D. Lin of the response ofdielectrics during pulsed events, it is anticipated that a 2-3X highervoltage is achievable during pulsed HBM ESD events. Hence, it isanticipated that these structures should survive 300 to 450 V HBMprotection levels.

Capacitor elements are also used in input and output filternetworks on the RF (in) and RF (out) circuitry. T-, L- and Hl-matchnetworks require capacitor elements that can survive ESD events.

Typically, the capacitor elements used have been thin-oxideMOSFET capacitors (MOSCaps), and metal insulator metalcapacitors (MIMCaps). MOS capacitors consist of the thin oxide ordual-oxide gate structure. The MOS capacitors are formed using n-channel MOSFETs placed over n-well regions. MIM capacitors arepassive structure formed using custom electrodes and dielectrics,inclusive of HiK MIMs structures. MOSCaps, MIMCaps, and HiKMIM structure oxide thickness is such that electrical failure fromESD events occur [1]. These MIM capacitor and MOS capacitorelements are scaled with technology generation and are notacceptable for ESD protection.

As a result, new capacitor elements that can achieve low leakageand high breakdown voltages are needed for RF ESD solutions.

1-4244-0919-5/07/$25 00 ©2007 IEEE581

0 50 100 150 200

Voltage (V)

FIGURE 1. LEAKAGE MEASUREMENT CURRENT AS A FUNTIONOF D.C. VOLTAGE FOR VERTICAL PARALLEL PLATE CAPACITOR.

Table 1 contains the table of the metal level of the vertical platecapactor. The first level metal consists of Cu damascene process.The second level M2 and third level M3 is a Ti/Al/Ti metallizationprocess.

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TABLE 1. METAL LEVEL FOR THE VERTICAL PLATE CAPACITOR

METAL LEVEL FILM MATERIAL

VERTICAL PLATE

CAPACITOR

Ml Cu

M2 Aluminum

M3 Aluminum

MT Aluminum

Experimental results of the test VPP capacitors were completed on

multiple wafers. The ESD testing was completed by evaluating theESD robustness of the individual design metal levels, and as thecomposite structure. In the testing, the VPP structures were testedfor HBM and TLP pulse events. In this abstract, the analysis willfocus on the HBM results for clarity.

In Figure 2, the HBM failure levels of the individual design levelswere evaluated. The MI-Mi structure demonstrated HBM levelsbetween 550 to 650 V HBM. The M2-M2 structure and the M3-M3structure HBM results were typically 350 to 400 V. In thesemeasurements, it is clear that the copper design level MI-Miexperimental HBM results exceeded the M2 and M3 aluminum HBMresults. From this work, the first clear key conclusion is that Cu VPPstructures are superior to Al-based VPP structures. Note thatdamascene Ta-bordered Cu interconnect structures do not cracklaterally, whereas Ti/Al/Ti structure always lead to lateral crackingand Al lateral flow. This is advantageous for Cu films and lateralVPP structures.

70-A

650

550

450

400

350

r40

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FIGuRE 2. VPP CAPACITOR STRUCTURE HBM

FAILURE LEVELS FOR MI, M2 AND M3 ONLY

STRUCTURES

700-

6XJ600

>i 550_I

450

3,50

300-

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FIGURE 3. VPP CAPACITOR STRUCTURE HBMFAILURE LEVELS FOR COMPOSITE STRUCTURES

In Figure 3, the composite structure of metal levels from MI, M2,M3, and MT metal levels HBM levels were evaluated. In this case,

the interesting observation is that structures that integrated both theCu and Al levels in a common structure failed at the lower levelHBM value. From this work, a key conclusion can be made - thatthe metal level more prone to ESD failure (e.g. Al level) lowers theHBM results of the composite structure (e.g. Al and Cu level).Table 1 includes the MIM Cap, and VPP HBM ESD results.

TABLE 1. HBM FAILURE LEVEL FOR RF PASSIVE ELEMENTS

SUMMARY

This paper includes the first VPP ESD measurements, and some

discoveries are apparent. First, Cu-based VPP structures havesuperior ESD robustness compared to Al-based VPP structures.Second, hybrid VPP structures, that include both Al- and Cu-designlevel ESD results are at the ESD levels of a Al-based results. Third,it is clear that Cu-structures have advantages in terms of failuremechanisms compared to Ti/Al/Ti in VPP structures. Fourth, ESDprotection levels of over 500 V can be achieved in unprotected RFapplications using Cu-based VPP devices. This may critical in GHzRF and low-leakage RF applications. In the final paper, failureanalysis and TLP measurements will also be shown.

REFERENCES

[1] S. Voldman, ESD: RF Technology and Circuits, Chichester:John Wiley and Sons, 2006.

[2] R. Bolam et al., Vertical Parallel Plates Reliability. In theProceedings of the International Reliability PhysicsSymposium (IRPS, Poster Session, 2006.

587

Capacitor element HBM Failure Level

MIM Capacitor 100 V HBM

VPP Capacitor 350 V HBM(Aluminum)

VPP Capacitor 650 V HBM

(Copper)

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