IDDQ Signatures1 New Graphical I DDQ Signatures Reduce Defect Level and Yield Loss (U. S. Patent...
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Transcript of IDDQ Signatures1 New Graphical I DDQ Signatures Reduce Defect Level and Yield Loss (U. S. Patent...
IDDQ Signatures 1
New Graphical INew Graphical IDDQDDQ Signatures Signatures
Reduce Defect LevelReduce Defect Leveland Yield Lossand Yield Loss
((U. S. Patent Pending)U. S. Patent Pending)
Lan RaoMichael L. Bushnell Vishwani Agrawal
ECE Dept., Rutgers U., Piscataway, NJ
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IDDQ TestingIDDQ TestingVDD = 5VVDD = 5V
IDDIDD
GroundGround
IDDQIDDQfaultfault
Ref. Chakravarty and Thadikaran, 1997
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IDDQ (microA) vs. Vector #IDDQ (microA) vs. Vector #
A good chipA good chip A bad chipA bad chip
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Two Proposed Approaches:Two Proposed Approaches:New way #1 Use 135 IDDQ test vectors, instead of 10-20 vectors in
real production line, collect all current measurements and plot current as function of test vector index.
Use classifier software running on Automatic Test Equipment to classify chip as good or bad.
Without using ‘stuck-at fault’ voltage test, but keeping the other voltage tests.
New way #2 Only use graphical IDDQ testing method defined above.
Potentially large cost saving for VLSI chip manufacturing test.Potentially large cost saving for VLSI chip manufacturing test.
IDDQ Signatures 5
Economics Analysis*Economics Analysis*MethodMethod Existing Current &Existing Current &
Voltage TestingVoltage TestingWith New GraphicalWith New Graphical
Current TestingCurrent TestingUse Only Use Only
Graphical TestGraphical Test
# Measurements# Measurements 8023(stuck-at)+53k 8023(stuck-at)+53k (functional)+15232(delay) (functional)+15232(delay)
+ 20(IDDQ)+ 20(IDDQ)
135(IDDQ)+15232(delay)135(IDDQ)+15232(delay)+53k(functional)+53k(functional)
135(IDDQ)135(IDDQ)
Test timeTest time 14.55s14.55s 10.23 s10.23 s 2.90s2.90s
Production test Production test costcost
5 cents/s X 14.55s = 5 cents/s X 14.55s = 72.8cents72.8cents
5 cents/s X 10.23s = 5 cents/s X 10.23s = 51.2cents51.2cents
5 cents/sX2.9s=5 cents/sX2.9s=14.5cents14.5cents
Cost savingsCost savings 0%0% 30.0%30.0% 80.1%80.1%
% Defective chips % Defective chips foundfound
98.30%98.30% 99.85 %99.85 % 96.1%96.1%
Pattern gen.Pattern gen. DifficultDifficult SimplerSimpler Much simplerMuch simpler
DiagnosisDiagnosis ComplexComplex ComplexComplex ComplexComplex
*With help from Dr. Phil Nigh, IBM.
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New Classification FeaturesNew Classification Features
The shape of the entire curve of current measurements –# of bands that measurements cluster # of bands that measurements cluster into.into.Width and separation of bands.Width and separation of bands.Current glitch or smearing detection Current glitch or smearing detection among all IDDQ measurements.among all IDDQ measurements.
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IIDDQ Distribution Over Vectors IIDDQ Distribution Over Vectors is not Gaussianis not Gaussian
# of IDDQ
values
Good Devices
Bad Devices
IDDQ Only
1 5684 1592 351
2 5674 2429 546
3 487 1144 104
4 12 367 31
>4 1 44 0
IDDQ Signatures 8
Classification of DUTClassification of DUTGood devicesGood devices Devices passing all tests and all test steps.Devices passing all tests and all test steps. Devices that fail wafer probe test, but pass packaged Devices that fail wafer probe test, but pass packaged
test and burn-in, (poor wafer probe registration).test and burn-in, (poor wafer probe registration).
Bad devicesBad devices Devices that failed the tests other than the IDDQ test.Devices that failed the tests other than the IDDQ test. Devices with extremely high IDDQ current.Devices with extremely high IDDQ current.
IDDQ onlyIDDQ only• Devices that failed on the IDDQ test with less than the Devices that failed on the IDDQ test with less than the
absolute IDDQ thresholdabsolute IDDQ threshold..
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Good vs. Faulty ChipGood vs. Faulty Chip(Single Band)(Single Band)
Single band of a good chipSingle band of a good chip Smeared (noisy) single band of a Smeared (noisy) single band of a bad chipbad chip
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Good vs. Faulty ChipGood vs. Faulty Chip(Single Band with Spike)(Single Band with Spike)
Good Chip PlotGood Chip Plot Faulty Chip with Noise SpikesFaulty Chip with Noise Spikes
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Good vs. Faulty Chip Good vs. Faulty Chip (Multiple Bands)(Multiple Bands)
Good 2 Band ChipGood 2 Band Chip Faulty 2 Band Chip with SmearingFaulty 2 Band Chip with Smearing
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Comparing IDDQComparing IDDQ Test MethodsTest Methods Statistics (A)
Method
TestEscape
(8)
Overkill(8)
Test escape
(25)
Overkill(25)
Test escape(450)
Overkill(450)
Single-threshold
6.4%
1.6% 6.8% 2.2% 7.5% 2.3%
Current difference
35.3%
3% 34% 3% 35% 3.1%
IDDQ(4 A)
8.9%
1.1% 8.6 0.8% 8.6% 1.0%
IDDQ(ó =0.35)
7.3%
6.6% 7% 6.7% 7.6% 6.8%
Graphical IDDQ
5.0%
-2.8% 5.4% -2.7% 5.97% -2.5%
Observation: The absolute threshold value is not critical for this Observation: The absolute threshold value is not critical for this technique.technique.
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Test Method EfficienciesTest Method Efficiencies
Test Method% Bad Chips Detected% Bad Chips Detected
8 8 AA 450 450 AA
52.6 % 61.5%52.6 % 61.5%71.3 % 83.4%71.3 % 83.4%70.3 % 82.2%70.3 % 82.2%93.6 % 93.5%93.6 % 93.5%96.1 % 96.1%96.1 % 96.1%
75.8% 88.6%75.8% 88.6%IBM (functional+stuck-at+delay)
Statistics
IBM Functional TestIBM Stuck-at TestIBM Delay TestIBM IDDQ TestGraphical IDDQ Test
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Test Vector Set Truncation ResultsTest Vector Set Truncation Results
# of IDDQ vectors# of IDDQ vectors Good devices out Good devices out of 11,858 of 11,858
Bad devices out Bad devices out of 5,576of 5,576
IDDQ only devices IDDQ only devices pass out of 1,032pass out of 1,032
# 1 (125)# 1 (125) 11,71111,711 5,2295,229 167167
# 1 + # 2 (135)# 1 + # 2 (135) 11,71511,715 5,2405,240 165165
# 1 + # 3 (185)# 1 + # 3 (185) 11,71511,715 5,2355,235 154154
# 1 + # 2 + # 3 (195)# 1 + # 2 + # 3 (195) 11,71911,719 5,2435,243 153153
50 random50 random 11,65711,657 5,1525,152 222222
100 random100 random 11,72611,726 5,1685,168 176176
140 random140 random 11,73511,735 5,2095,209 172172
Proper selection of test vector set can further improve the test quality.
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ConclusionGaussian distribution of IDDQ measurements may not be true.We present a new way of IDDQ testing with lower test escape and lower yield loss (overkill rate).The new method does not rely on a single threshold or a single delta
threshold, but on the shape of the measurement set, hence it is promising for deep submicron technology;
can replace at least some voltage tests; the accuracy can be further improved by careful choice
of the test vector set.
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Thank you!