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A St rat egic Review on Grow t h of

InP on Si l icon Subst rat e f orApp l i cat ions in High Frequency

RF Devi ces

Umesh.P.Gomes1,Kuldeep1,Kumud Ranjan1,Servin Rathi1,Dhr ubes Biswas2

1

Advanced Technology DevelopmentCenterIndian Institute of Technology

KharagpurKharagpur-721302, West Bengal, India

2

Electrical and Electronics Comm.EngineeringIndian Institute of Technology

KharagpurKharagpur-721302, West Bengal, India

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ITRS REPORT 2010

I I I -V on Si substrate

More-than-Moore

technologies to expand its

roadmap and implement non-

CMOS devices on Si-CMOS

platform

Hybrid integration of III-V

devices and CMOS

InAlAs/InGaAs HEMTs have been widelyaccepted for high frequency and lownoise applications.

Frequently used substrates

InP

GaAs

Alternative substrate-

BENEFITS

Lower cost

Technological maturity

Integration of III-V and silicon

technology

High cost

Immature technology

Yield loss

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Silicon

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Economic feasibility-low cost substrates

Technologyfeasibility-

Silicon as a maturedtechnology

Integration feasibility-hybrid integration of III-

V technology andSilicon CMOS

technology

Lattice mismatch-8% with InP

Thermal coefficientmismatch-

50%

Anti-phase domains-polar on non-polarsemiconductor

Oxide removal fromSubstrate

SOHCOW

Heterogeneousintegration of

InAlAs/InGaAs

HEMT on SIplatform

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Direct Epitaxy Intermediate Buffer

Epitaxial Lateral Overgrowth

I nP on Si

InP/buffer/Si

InP/GaAs/Si

Wafer bonding

Other techniques

InP/GaP/Si

InAsP/InPSuperlattice

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InP/Si

Thermal CycleGrowth

Two Step GrowthMethod

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Lattice Mismatched Absorbant Buffer Layers

InAlAs-Spacer Layer

Lg

InAlAs-Barrier Layer

Si- doping InGaAs -Channel Layer

InGaAs InGaAs Cap

Layer

Silicon Substrate

First heteroepitaxial growth ofInAlAs/InGaAs QWFET on Sisubstrate was reported by S.Datta etal. using Molecular Beam Epitaxy

(MBE)Comparable performance to InP and

GaAs substrate

Optimization of buffer layer

Demonstration of gate length scaling*

Demonstrated the first transferred

SubstrateChannel

InxGa1-xAs

Lg

m

ftGHz

fmaxGHz

gmmS/m

m

Growth

Si

In0.53Ga0.47As 1.0 32.3 44.0 587.0 MOCVD*

In0.53Ga0.47As 0.3 72.4 77.3 739.0 MOCVD*

In0.7Ga0.3As 0.08 260.0 - 930.0 MBE

GaAs

In0.53Ga0.47As 1.0 39.1 71.0 626.0 MOCVD

In0.53Ga0.47As 0.15 279.0 231.0 1074.0 MOCVD

In0.6Ga0.4As 0.08 235.0 290.0 1150.0 MBE

InP

In0.7Ga0.3As 1.0 30.0 35.0 280.0 MBE

In0.7Ga0.3As 0.12 141.0 120.0 520.0 MBE#

In0.7Ga0.3As 0.08 250.0 - 1000.0 MBE

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Schematic View of InGaAs HEMT on Si Substrate

Comparative Performance of InGaAs HEMTs onVarious Substrates

*K.M Lau et al. IEEE-IEDM-2008

# S.Bollaert et al. IEEE-EDL-2004

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Buffer layer engineering forheterogeneous integration ofIII-V on Si substrate throughvarious exotic approaches.

Use of various binary andternary compoundsemiconductors as bufferslike graded/metamorphicGaAs/InP or dilute Nitride etc

Performance improvement

of InAlAs/GaInAs HEMTs onSi substrate using innovativestructures

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MBE Machine of HPDG lab at IIT Kharagpur

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Applicat ions of InP RF/ Microwave

Devices

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InP based HEMTs-

The high speed, high frequency and significantly low noise

Technology of choice for various applications like low noise amplifiers, automotive

radars, radio astronomy, and optoelectronic receivers.

InAlAs/InGaAs HEMTs on silicon substrate-

Established a comparative RF performance levels as of InP and GaAs based

HEMTs

Using MBE and MOCVD technology, the virtual substrates can be made thinner

without introducing dislocationsGate length scaling has resulted in better device performance in terms of

transconductance and cut-off frequency

Replacement of InP substrate by Si substrate

wider usage of this device in future due to its economic and technological

feasibility.

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ICEEE Conference, October, 2011 IIT-Kharagpur

1.ITRS update,2010

2.Personal Communication with Chris Baker ,University Wafer, 2011.

3.Haiou Li; Chak Wah Tang; Kei May Lau; , "Metamorphic InAlAs/InGaAs HEMTs on GaAs

Substrates by MOCVD," Electron Device Letters, IEEE, vol.29, no.6, pp.561-564, June 2008

Wang, G.; Leys, M. R.; Loo, R.;

4.Richard, O.; Bender, H.; Waldron, N.; Brammertz, G.; Dekoster, J.; Wang, W.; Seefeldt, M.;

Caymax, M.; Heyns, M. M.; , "Selective area growth of high quality InP on Si (001) substrates,"

Applied Physics Letters, vol.97, no.12, pp.121913-121913-3, Sep 2010

5.Zhechao Wang; Junesand, C.; Metaferia, W.; Chen Hu; Lourdudoss, S.; Wosinski, L.; , "InP

lateral overgrowth technology for silicon photonics," Communications and Photonics

Conference and Exhibition (ACP), 2010 Asia, vol., no., pp.377-378, 8-12 Dec. 2010

6. Saint-Girons, G.; Regreny, P.; Largeau, L.; Patriarche, G.; Hollinger, G.; , "Monolithic

integration of InP based heterostructures on silicon using crystalline Gd2O3 buffers," Applied

Physics Letters, vol.91, no.24, pp.241912-241912-3, Dec 2007

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7. Lau, K.M.; Chak Wah Tang; Haiou Li; Zhenyu Zhong; , "InAlAs/InGaAs mHEMTs on Silicon substrates

grown By MOCVD," Electron Devices Meeting, 2008. IEDM 2008. IEEE International, vol., no., pp.1-4,

15-17 Dec. 2008

8. Huang Jie;Guo Tianyi; Zhang Haiying; Xu Jingbo; Fu Xiaojun; Yang Hao and Niu Jiebin; , "120-nm

gate-length In0.7Ga0.3As/In0.52Al0.48As InP-based HEMT, J. Semicond 31,2010

9. Hai-Ou Li; Ming Li; Chak Wah Tang; Zhen Yu Zhong; Kei May Lau; , "0.3-m gate-length metamorphic

InAlAs/InGaAs HEMTs on Silicon substrates by MOCVD," Solid-State and Integrated Circuit Technology

(ICSICT), 2010 10th IEEE International Conference on, vol., no., pp.1374-1376, 1-4 Nov. 2010

10. Datta, S.; Dewey, G.; Fastenau, J.M.; Hudait, M.K.; Loubychev, D.; Liu, W.K.; Radosavljevic, M.;

Rachmady, W.; Chau, R.; , "Ultrahigh-Speed 0.5 V Supply Voltage In0.7 Ga0.3As Quantum-Well Transistors

on Silicon Substrate," Electron Device Letters, IEEE, vol.28, no.8, pp.685-687, Aug. 2007

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This work has been supported by ENS project,Department of Information Technology, Governmentof India

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