ICARUS General Trigger Design Contributions from: M.Della Pietra, A.Di Cicco, P.Di Meo, G.Fiorillo,...
-
Upload
kathlyn-shelton -
Category
Documents
-
view
215 -
download
1
Transcript of ICARUS General Trigger Design Contributions from: M.Della Pietra, A.Di Cicco, P.Di Meo, G.Fiorillo,...
ICARUS General Trigger Design
Contributions from:
M.Della Pietra, A.Di Cicco, P.Di Meo, G.Fiorillo, P.Parascandolo, R.Santorelli, P.Trattino
B.Baboussinov, S.Centro, F.Pietropaolo, S.Ventura
Work jointly conducted by Napoli and Padova groups
T600 pixel definition
Rack 1Rack 20
Rack 11Rack 13
T600 Half Module – 1 chamber viewed from cathode
1 pixel area: ~ 0.6 m2
Total Number of Pixels ~ 80
32 x 9 Induction II
wires
32 x 9 Collection
wires
864 mm
Trigger Input
• PMTs
• DAEDALUS
• AWS (Analog wire sum)
• External (beam profile chambers, cern-spill, …)
Trigger system architecture 1. LTCU:
discriminates the 18 inputs, has one independent
threshold for each input, gives two trigger proposal as output;
2. TCU: performs coincidences
between LTCUs proposals, processes the fired pixels to
study and label the event topology, requests global or local trigger;
3. Trigger Supervisor: monitoring of the trigger and
the DAQ system, statistical functions.
discriminate the inputs, coming from the v791 boards;
give as output two separate trigger proposals to the next level, one for Induction II and one for Collection;
remote control of all the board’s functionalities;
discriminators check-control;trigger rate measurements for each input.
The Local Trigger Control Unit prototype targets
FPGAInput stage
RS232 interface
10 MHz oscillatorPower supply
18 inputsTrigger outputs
DAC
The LTCU prototype v1.0
IN
VDAC
Discriminator
Voltage follower
RC filterOUT
IN
The LTCU functionalities v1.8i
Mask the input channels; Read the mask status; Set the thresholds; Monitor the trigger rate for
each input; Discriminator test mode; Select one discriminator
output put on front panel.
All the board functionalities are remotely controlled via RS232 interface.
Trigger rate test chain
LTCU inputs = 4 signals from collection plane;
Trigger generated from only one input (no FastOR);
LTCU trigger output distributed to V816 module.
LTCU Trigger OUT
V789
LTCU
V791Ind Coll
IN IN IN IN IN IN IN IN
OUT OUT OUTOUT OUTOUT OUT OUT
IN
OUT
IN
Analog OUT
V816
trigger
PC (RS232)
Trigger Rate Plateau (I)Trigger rate for v791 n°1 in LTCU ch0
0
5
10
15
20
25
0 20 40 60 80 100 120 140
Threshold (mV)
Trigger rate (Hz)
Trigger rate for v791 n°2 in LTCU ch1
0
5
10
15
20
25
0 20 40 60 80 100 120 140
Threshold (mV)
Trigger rate (Hz)
Plateau zones
Trigger rate for v791 n°4 in ch5
0
5
10
15
20
25
30
0 20 40 60 80 100 120 140
Threshold (mV)
Trigger rate (Hz)
Trigger rate v791 n°3 in LTCU ch4
0
5
10
15
20
0 20 40 60 80 100 120 140
Threshold (mV)
Trigger rate (Hz)
Trigger Rate Plateau (II)
Plateau zones
Trigger efficiency test chain
LTCU inputs = 4 signals from collection plane;
One LTCU IN and Trigger OUT digitalized by a modified V791;
PMT trigger distributed to V816 module.
PMT
V789
LTCU
V791Ind Coll
IN IN IN IN IN IN IN IN
OUT OUT OUTOUT OUTOUT OUTOUT
IN
OUT
IN
Analog OUT
V816
trigger
PC (RS232)
OUT
IN
IN
Modified V791
Test Results (II)
Problems Solutions
High frequency noise on input signal
Band-pass filter
(f-3dBH = 2 MHz , f-3dB
L = 1 kHz);
Offset for negative input isn’t a stable solution
Inverter amplifier (G=1) in the input stage;
More than 20mV white noise
New pcb (with 8 layers) and EM/RF screening
Not stable DAC threshold
Stable VREF circuit
LTCU prototype v2.0
Power supply an filter
Input stage (for one channel)
or
IN
Band-pass filter Selectable inverter (G=1)
VTest
VTH
OUT
IN
VTH
DAC (for one channel)
VREF
VREF for DAC
Filter for low noise performance
Stable 259mV tension circuit
VREF
EM/RF Screening for input stage
PWR and GND distribution for LTCU v2.0
±5A, AGND (V791 preamp. stage)
+5A1, AGND1 (V791 mux stage)
VCC, DGND (V791 digital stage)
Four GND and two PWR planes