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IC Technology Enables New IC Technology Enables New Programmable DSP SolutionsProgrammable DSP Solutions

Wim RoelandtsCEO

Xilinx Inc., San Jose, CA

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Critical Factors for DSP SolutionsCritical Factors for DSP Solutions

+ Off the shelf devices+ Faster time-to-market+ Rapid adoption of standards+ Real time prototyping

Flexibility - DSP Processors

Performance - Custom ICs

— Less performance— Sequential processing— Complex real-time software— Extra power dissipation

+ Parallel processing+ Support high data rates+ Optimal bit widths+ No real-time software coding

— NRE (Custom IC)— Long development cycle— Can’t test in real time— No mistakes permitted

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Critical Factors: Market ValidationCritical Factors: Market Validation

Demand for flexibility - 38% of market and growing Forced into custom IC to achieve performance Performance requirements are increasing

$3.8B$6.2B

FLEXIBILITYDSP Processors

PERFORMANCECustom ICs

$10 Billion1998 Total DSP

IC Sales

Data rates are above 1 MHz in 26% of new design starts - Source: Forward Concepts 1997 survey

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Fle

xib

ility

Performance

• 1981

Traditional DSP Solution RoadmapTraditional DSP Solution Roadmap

• •

First use of multipleMAC units

DSP ProcessorsDSP Processors

First Software DSP

1997

2 micron 0.25 micron

Custom ICsCustom ICs

• • •

Designer must choosebetween flexibilityand performance

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DSP ProcessorsDSP Processors

FPGAsFPGAs

•

• •

Fle

xib

ility

Performance

• 1981

FPGAs Offer Flexibility and FPGAs Offer Flexibility and PerformancePerformance

• •

Custom ICsCustom ICs

•

40851996

30901989

10001998

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FPGAs Offer the Best of Both WorldsFPGAs Offer the Best of Both Worlds

+ Off the shelf devices+ Faster time-to-market+ Rapid adoption of new standards+ Real time prototyping

Flexibility of DSP Processors

Performance of custom ICs+ Parallel processing+ Support high data rates+ Optimal bit widths+ No real-time software coding

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Increasing FPGA DSP Design StartsIncreasing FPGA DSP Design Starts

1996 1997 1998 1999

Estim

ate

Annual FPGA DSP

Designs StartsSource: Xilinx

1997 survey concluded that FPGAs are used for new DSP applications as often as custom ICs and 33% as often as DSPs. Source: Forward Concepts

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New FPGAs DSP FeaturesNew FPGAs DSP Features

Logic Cell: Look-up table or Distributed RAM

Programmable Interconnect

Block RAM Block RAM Block RAM Distributed RAM - FIR Filter

Block RAM - FFT buffers

Shift registers - D.A. & serial

Multiply “AND” - 200 MHz

DLL - Multi-rate clocks

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D S PD S P Flexibility: Design in a Flexibility: Design in a System-Level DSP EnvironmentSystem-Level DSP Environment

DSP ToolsOptimal Bit Widths

FPGA

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FPGA AdvancementsFPGA Advancements

FPGA technology has seen dramatic changes in the last 2 years - with more to come!

1996 1998 1999 2002

Density (System Gates) 50K 1M 2M 10M

MACs / device (Billions) 1 27 68 500

Cost (Gates/$) 300 4K 10K 40K

Cost (Million MACs/$) 6 100 340 2,000

2 Billion Programmable MACs for $1.00 in 2002

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0

200

400

600

800

1,000

1,200

1985 1990 1995 2000 2005 2010

Mill

ion

s o

f T

ran

sis

tors

Moore’s Law: Device Capacity Doubles For Moore’s Law: Device Capacity Doubles For The Same Price (Every 18 Months)The Same Price (Every 18 Months)

Historically Correct

Today

“Unlimited”supply

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Trading “Area” for “Performance”Trading “Area” for “Performance”

Are

a (F

ree

Tra

nsi

sto

rs)

Time

DSP Processors: Sequential Processing

• • •

5 nsec 500 nsec

Processor requires a

>10 GHz Clockfor equivalent performance

200MHz

ClockX +• • •

FPG

A: P

aral

lel P

roce

ssin

g

X +

X + Multiply Accumulates

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Performance ComparisonPerformance Comparison

50 400 2000120

3200

27,000

0

5,000

10,000

15,000

20,000

25,000

30,000M

illi

on

s o

f M

AC

s p

er S

eco

nd

8 MACs V1000 uP FPGA

1999

2 MACs 4085 uP FPGA

1996

1 MAC 3090 uP FPGA

1989

DSPProcessors

FPGA

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Internet Reconfigurable LogicInternet Reconfigurable Logic A new application space for FPGAsA new application space for FPGAs

VirtexFPGAs

JBITsJava API

WWW

IRL

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Use of Reconfigurable LogicUse of Reconfigurable Logic

Spectrum of ReconfigurationOnce in a while Turn-on ContinuousApplication Tasks

Field Upgrades

AdaptiveProducts

Multi-personalityProducts

Reconfigurable

Computing

EvolvingLogic

Cost effective field upgrades New business model New types of products Mind-boggling opportunities

in the long term

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Any Network DeviceAny Network Deviceor Cellular Infrastructureor Cellular Infrastructure

Remote Station Access— Satellite— Cell Stations— Radio Towers— Network Computers

Benefits— Add new features— Support new standards— Bug fixes— System maintenance

AnalogProcessing

Antenna

Cable Copper

A/D, D/A

Distance to

antenna

Channel

NCO

ChannelizerMulti-rate

Filters

NarrowBandFilters,RateReduction

FIRHalf bandDecimateInterpolate

MultiplierSine,

CosineCordic

DataRecovery

Virebi16 QAM

256 QAMTurboMAP

BlockCodes

Error ControlReed

Solomon,Interliever

DigitalGainLoop

120 MHzSampleRate

DistributedMemory &Arithmetic

DataFormatting

MAC:MediaAccess

Controller

Application

I Q

Data Communications

Network Re-Configurable

IFProcessing

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D S PD S P FPGA For Communications FPGA For Communications ApplicationsApplications

Develop advanced DSP algorithms and test in real time Migration of digital processing toward antenna

— More digital, less analog

Multiple & smart antenna processing Better spectrum utilization

— Higher performance filters, high density signal constellations

Advanced error control - Turbo codes and MAP decoders Software / configurable radio

— Multiple modulation, error correction and data encryption schemes with one platform

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D S PD S P4 Million Programmable Gates4 Million Programmable Gates100 Billion MACs100 Billion MACs

Configurable - Software RadioConfigurable - Software RadioReconfigurable Satellite ModemReconfigurable Satellite Modem

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Communications BenchmarksCommunications Benchmarks

1024-point, 16-bit complex FFT— 10 microsecond transform time— Single device solution in the largest Virtex device

– Datapath and all data storage on-chip

Heterodyne + 20:1 polyphase decimating FIR— 20 polyphase arms, 24 taps per arm— 8-bits I-Q data, 8-bit coefficients— 28,800 Million MACs in actual design— Single device solution in the largest Virtex device

– Includes Heterodyne, Direct Digital Synthesizer and Complex Polyphase Decimator

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Video and Image ProcessingVideo and Image ProcessingApplicationsApplications

Exponential increase in performance needs— 2-Dimensional algorithm (2D FIR, 2D DCT, Wavelet)— Larger computational mask— Real time image processing

Emerging standards— JPEG2000, MPEG4— HDTV

FPGA BasedImage

Processing

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Video and Image Processing Video and Image Processing Benchmark Benchmark

Image Processing— 2D Filter / Correlator (12 x 12 Mask)— 1024 x 1024 x 12 bits at 60 frames/second— 8,640 Million MACs— 2 Channels possible in the largest Virtex device

Video Conferencing— 5-stage, 2D Wavelet Transform for Compression— NTSC/PAL 768 x 288 x 30 bits at 50 frames/second— 1,688 Million MACs— 8 Channels possible in the largest Virtex device

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ConclusionConclusion

FPGAs offer flexible high performance solutions today Moore’s law, New generation FPGAs, tools, and cores

make “FPGA DSP” a viable solution Results:

— High performance programmable solutions— Low cost, low power high performance solutions

IRL enables field upgradability