HRPWM High Resolution PWM - Infineon Technologies

HRPWMHigh Resolution PWMXMC™ microcontrollersSeptember 2016

Agenda

Overview

Key feature: comparator & HW slope generator

Key feature: complementary high resolution PWM outputs

Key feature: configurable PWM control scheme

System integration

Application examples

1

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3

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5

6

Copyright © Infineon Technologies AG 2016. All rights reserved. 2

Agenda

Overview




System integration


1

2

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5

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HRPWMHigh Resolution PWM

Highlights

The features of the HRPWM make it a musthave module, for cutting edge and optimizedSMPS (Switched Mode Power Supply)applications development.With three high speed comparators andhardware slope generators plus 4 highresolution PWM generators (150 ps), it ispossible to address several power conversiontopologies with reduced SW interaction.

Customer benefitsKey feature

› Monitor current/voltage for several SMPStopologies with reduced SW interaction

› Higher resolution enables SMPS control upto 5 MHz with 10-bit PWM or highlyaccurate low load scenario control

› Control of several SMPS topologies: halfbridge, full bridge, resonant, phaseshift,...

› Comparator + HW slope generator

› Complementary high resolutionPWM outputs

› Configurable PWM control scheme

Copyright © Infineon Technologies AG 2016. All rights reserved.

HRPWM

Inputfunctions

IN

IN

IN

IN

Stop

Start

Clamp

Comparator+

Slope generator(DAC)

INTs

Filtering

Deadtime

+TRAP

Blanking

Clamping

out

PWM highresolution

channel

x3

x4

PWM 0

PWM 1Ch. Sel

Convert

COUT 0

COUT 1

COUT 2

PWM 2

PWM 3

PWM 4

PWM 5

PWM 6

PWM 7

PWM control

...

PWM control

PWM control

...

CHA

CHB

Interrupt control

4

Agenda

Overview




System integration


1

2

3

4

5

6


HRPWMComparator + HW slope generator (1/2)

› High speed comparator (~20 ns) can be used to:

– Monitor coil current

– Monitor voltage over the switch

– Monitor voltage output

› The slope generator with a high speed DAC ( > 30 MS/s) can be used to:

– Reference control for the comparator

– Insert a decrementing or incrementing ramp to the comparator


HRPWM

Inputfunctions

Slope generator(DAC)

INTs

Filtering

Blanking

Clamping

out

PWM highresolution

channel

COUT 0

PW

Mcle

ar

Interrupt control

PWM set

Comparator

Reference orslope

Timer

Dead

time+

TRAP

Q1

Q1

iL/Vo

Q1

iL

D1

Vo

HW controlledslope

SW transfers

External ramp

› Comparator + slope generator(DAC) can be used to monitordifferent variable of the SMPS

› Different SMPS topologies can bemonitored via the CMP + slopegenerator

› Link with the PWM channels enablesa self controlled PWM loop withminimal SW interaction

6

HRPWMComparator + HW slope generator (2/2)

› Due to the flexible arrangement of resources it ispossible to cover several control techniques:

– Peak current control

– Valley current control

– Hysteretic control

– Average current control

– Voltage control


› Each slope + comparatorcan be used to control adifferent controltechnique

› Decrease BOM:

– Internal slope generator

– Internal high speed DAC

– Internal high speed comparator

Vc

PWM

Timer

Timer

PWMPWM Vc

Timer

PWM

PWMHysteretic

Peak

Average

Valley

Voltage

...

...

Different SMPScontrol techniques

Vc+

Vc-

7

Agenda

Overview




System integration


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2

3

4

5

6


HRPWM: complementary high resolutionPWM outputs (1/2)

› 4 high resolution channels with:

– 150 ps resolution (up to 5 MHz fS with >10-bits) with complementary outputs

– Resolution adjustment for rising, falling orboth

– Dead time insertion with different valuesfor ON and OFF time

› Can be used with:

– CCU8 timers

– CMP + slopegen

– Both of theabove


HRPWM

Inputfunctions slope generator

(DAC)

Filtering

Blanking

Clamping

out

PWM highresolution

channel

COUT0

Interrupt control

PWM control

Comparator+

Timer

Dead

time+

TRAP

Q1

Q1

iL/Vo

INTs

PWM control

To

SM

PS

PWM control

Timer

Compare1

PWM control

Timer

Compare1

Timer Slice

Highresolution

adjustment

Timercompare 2

Timercompare 1

Shift by n picophasesHigh

resolutionadjustment

Pico phase 150 ps

Reference clockmin. 8.3 ns

9

HRPWM: complementary high resolutionPWM outputs (2/2)

› Each of the high resolution channels can be controlled depending on the wantedcontrol technique (e.g. fixed frequency, variable frequency, etc.)

› Addressing up to 4 complementary MOSFET pairs

› Linking with the powerful CCU8 timers enable a very large superset of controlfunctions: start, stop, gate, TRAP, etc.


HRPWM

Inputfunctions slope generator

(DAC)

Filtering

Blanking

Clamping

out

PWM highresolution

channel

COUT0

Interrupt control

PWM control

Comparator+

Timer

Dead

time+

TRAP PWM

iL/Vo

INTs

PWM control

PWM

VC

iL*Ri

Current/voltagemonitor

Switching frequencycontrol

fs› Start

› Stop› Gate

› TRAP

› Load

› etc

Co

Q1

D1

CoNsNp

Flyback

Q1

L1

D1

Buck

Fixed frequency

Variable frequency

...

...

10

Agenda

Overview




System integration


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HRPWMConfigurable PWM control scheme

› The complete HRPWM subsystem is comprised of:

› Covers all the SMPStopologies andcontrol techniques

› Optimized resourceorganization/usagefor any SMPStopology

› Possibility ofcontrolling differentSMPS in the samemodule


– 16-bit timers

– CMP + slopegen

– 150 psgenerators

12

Agenda

Overview




System integration


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HRPWMSystem integration

› Target applications

– Power conversion

– Motor control

– General purpose

The HRPWM system integration offersseveral advantages:

› Integration within a CCU8 module,offers the broad set of features availableon each CCU8 timer

› Distribution bus from CCU4/CCU8 overthe ERU for complex signal conditioningapplication cases

› Tight coupling between CSGs and HRCsto avoid SW overhead

*Several components may be present or notdepending on the device


Agenda

Overview




System integration


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Application examplePWM resolution vs. fs (1/2)

For a standard SMPS closed loopcontrol application, the ADCsensing resolution needs to betwo times as precise as theallowed error of the voltageoperating point.

The PWM generation needs toaccommodate the measurementerror by offering 2x the ADCprecision.

For an SMPS running at high fSvalues, the normal PWMresolution is not enough.

The HRPWM enables this errorcompensation for fS values up to5 MHz.

Overview

In brief

SMPS resolution demand for high fS


VOUTVIN

0,5%

Setpoint

Error

1%

0,25%

HRPWM

Controlloop

ADC

Monitoring Vout

Driving the switch

NewPWMcalc

2xNvalues

Nvalues

0 V

12 V H. resolution

L. resolution 12 V

0 V

16

Application examplePWM resolution vs. fs (2/2)

Application example low load conditions: detailed block diagram

› Assuming the samecontrol performanceat 10% load, thenumber of PWMsteps has to beincreased by afactor of 10

› For a SMPSoperating at 1.5MHz 4000 steps areneeded

› Each HighResolution Channelcan generate ~4470 at 1.5 MHz fS

› Normal CCU8 timergenerates the MSBswhile a HighResolution Channelgenerated the LSBs


VOUTVIN

0,5%

1%

0,25%

Error

HRPWM

Inputfunctions

Comparator+

slope generator(DAC)

Filtering

Blanking

Clamping

Interrupt control

Deadtime

+TRAP

Q1

Q1

PWM high resolutionchannel(LSBs)

Timer

ADC

MSBs

Referenceclock (MSBs)

Picophase150 ps (LSBs)

Timer slice

Highresolution

adjustment

Timercompare

PWM

Timer

fS

ON PWM

Timer

Compare

fS

ONON

100% duty cycle = maximumvoltage for maximum load

Nr. of stepsis x10 largerfor the sameperformance

Also for step down convertersthe higher the stepping down thehigher the resolution demand

10% duty cycle = maximumvoltage for minimum load

Lo

ad

Load

17

Application exampleBuck converter – peak current control (1/2)

Control a buck converter with peak currentcontrol with the HRPWM

The peak current control is acommon technique for a buckconverter.

This control technique is comprisedof two loops: current andvoltage.

The cycle-by-cycle current loopoffers a very good response forfast load transients. But thisinner loop becomes unstable withhigh duty cycle values. To avoidthis a ramp is added to maintainthe wanted average current andavoid the instability.

A comparator with some filteringcapabilities is needed to avoid thecurrent commutation spikes.

Overview

In brief


VOUTVIN

Q1 L1

D1 Co

Vref

Voltagecontrol

Peakcontrol

Reference

Comparator

Compensation

Amp

spike spike

clock

fS

Blankneeded

+

Rampgen

t

iL (t)

ic

iL0

i0

Ts 2Ts 3Ts

Avoidinginstability

Vc

PWM

Timer

IL

18

Application exampleBuck converter – peak current control (2/2)

Application example buck converter – peak current control: detailed block diagram

› The HRPWM slope generator is programmed with the wanted slope value (via 3parameters)

› The blanking stage is programmed with the wanted value to avoid prematureturn OFF of the switch

› Via the ADC the

voltage loop is

monitored

› A timer is

connected to the

HRPWM to control

the wanted

switching

frequency fS

› Decreased BOM

and low CPU load


HRPWM

Filtering

Clamping

LatchQ1High resolution

channelfS

iL

Slope generator

clear

set

Comparator

Blanking

ADC

Software

Reference › Slow loopspike spike

Turn OFF

avoided

IL

HW gen

Ramp

On-the-fly adjustments ispossible.No DMA transfer is needed.No SW interaction in steadystate.

Programmableblanking time

Avoidinginstability

t

iL (t)

ic

iL0

i0

Ts 2Ts 3Ts

VOUTVIN

Q1 L1

D1 Co

Amp

19

Application example: single stage PFC –critical conduction mode (1/3)

› Single stage PFC controller

Overview

In brief

The Power Factor Correction (PFC)technique, shapes the input currentof the off line power supply tomaximize the real poweravailability from the mains.Additional reason to use PFC, may bethe need to comply with someregulation requirements.

Several conditions are taken intoconsideration to choose the PFCtopology: cost, complexity,efficiency, etc.

For small output power applications,the boost converter operating inCritical Conduction Mode (CrM) isone of the most implementedtechniques.


WHY CrM?

› Current loop isintrinsically stable

› Reduced switchinglosses becauseMosfet can be turnedON at lower voltage

› Diode turn OFFwithout reverserecovery losses

› TON is fixed for agiven line voltageand load currentcondition

k.VlN

Iavg

V

t...

Fixed

TON

Variable

TOFF

PWMComparator+ filtering

VOUTVIN

CoL1

Q1

IL1

Tst

[VOUT-VIN (t)/L1

Q1 ON ON

Zero currentcrossing

Erroramplifier

Fs controltimer

Comparator +saw tooth

Voltage modecontrol for turn OFF

Avoiding highswitching frequency/frequency clamp

RS flip-flop

VIN (t)/L1

20


Application example boostPFC: block diagram

› A complete implementationwith 1:1 map with usualanalog control can be donewith the HRPWM

› A comparator is used tomonitor the set condition of thePWM signal (ZCD)

› A second comparator with theslope generation is used tomonitor the turn OFF condition(saw tooth generation is doneautomatically in HW)

› A CCU8 timer is used toperform the frequencyclamping. Avoiding highswitching frequencies

› Decreased BOM


HRPWM

Q1High resolutionchannel

iL1Comparator 0

clamping

ADC

Softwarefiltering

Saw tooth config

Clamp

CCU8 timer 0

Latch

Frequencyclamp control

set

Start

Comparator 1filtering

saw tooth

clear

Ve

VOUTVIN

Co

L1Q1

Amp Err.amp

Vref

iL1 Ve

VO

Startsaw

tooth

start

clear

Ve

PWM

iL1

PWM

Tclamp

start

One-to-one mapwith external/analog control

Acomodation

Vpeak

The scheme of the sawtooth can also be

replaced by sensingVpeak

21


Application example boost PFC: block diagram with TON calculation by SW

› A more resource optimized solutioncan be achieved, by calculating thePWM ON time in software

› The ADC is used to sample thevoltage error and also the voltageinput

› With the valuessampled by theADC, the softwarecalculates the newPWM TON valuesaccordingly


› Calculation of the TON can be donemultiple times per line cycle if needed

› Very low BOM: only currentamplifier

HRPWM

Q1High resolutionchannel

iL1Comparator 0

clamping

Software

ADCfiltering

Clamp

CCU8 timer 0

Latch

set

VOUTVIN

Co

L1 Q1

Amp

iL1

VO

Vref

iL1

PWM

Tclamp

Resource usageoptmization

Clear

New TON

value

Frequencyclampcontrol

TON

VIN

VIN

TON is calculated viasoftware to accommodateload or voltage inputchanges

TON

clear

VO

22

Application examplePhase shift full bridge (1/3)

› Phase shift full bridge with high resolution

Overview

In brief

The Phase Shift Full Bridge Converter(PSFB) offers high efficiency for highpower applications. Efficiency valuescan easily be within 90% to 95%.

The efficiency advantage comes fromthe fact that the converter canachieve Zero Voltage Switching(ZVS) with reduced conductionlosses.

The phase shift PWM signals, drivetwo pairs of complementaryswitches, with normally 50% dutycycle with a fixed frequency.

The amount of power transfer tothe output is then dictated by thephase shift introduced between thetwo legs.


L1Q2

Q4

VIN

+

-

Np

D1

CoVOUT

+

-

D2

Q1

Q3

Ns

Ns

The resolution loopback issue of the ADC vsthe PWM signal is more severe than for the

normal PWM modulation

Q1

Q3

S

Q2

Q4

Maximum phaseshift only varies

from 0 to /2 forthe full control

ranges

The resolution of a phaseshift is a factor of 4

lower than the normalduty cycle PWM

modulation

Reference clock(MSBs)

Picophase150 ps (LSBs)

Timer compareleg 1

Q2

Q1

Timer compareleg 2

Highresolution

adjustment

For a 100 kHz phase shift modulation, theHRPWM can achieve 14-bits resolution.

This complies with the necessity ofNPWM > 2xNADC

f

23


Application example phase shift full bridge: block diagram

› Each PSFB leg is controlled viaone CCU8 timer and one highresolution channel

› Each CCU8 timer areprogrammed with a fixedfrequency and a fixed duty cycle(50 %)

› The high resolution channel 1 isused to introduce the additionalresolution into the phase shiftvalue

› The timer control scheme forthe phase shift can be center oredge aligned



Application example phase shift full bridge: timing diagram

› The phase shift value can be updated in every switching cycle MSBs+LSBs

› Each dead time value is completely configurable and can be adjusted in every switching cycle


Compare level

Q1time

Period

Q3

Deadtime

Start CCU8 timer 1

time

Period

MSB Phase shift

value

Compare level

Q2

Q4high

resolution

Dead Time

Timer 0

Timer1

High resolution

Channel 0

High resolution

Channel 1

Deadtime

if

Q1

Q3

Q2Q4

time

fS

25

Application exampleMaximizing resource utilization for SMPS (1/2)

› Improving resource utilization forpeak + ZCD

Overview

In brief

When a converter operates with avariable ON and OFF time for thePWM signal and a cycle-by-cyclemonitor is needed, it is necessary tomonitor two thresholds:

› the peak current

› the zero current crossing

Monitoring these two variables can beresource consuming, especially when anadditional ramp needs to be injectedto avoid instability of the current loop.

The HRPWM combines all of thesethree functions: ramp + peak +zero current detection in just onecomparator and slope generationUnit.


VIN

+

-

VOUTiL

Zero current detection

Peak current detection

Ramp compensation

Latch

Dead time

IL1

PWM

Current control forpeak and zero crossing

Variable ON time

Variable OFF time

Variable frequency

+

=

SMPS

VOUT

+

-

VeQA QA

t

iL (t)

iC

iL0

i0

Ts 2Ts 3Ts

Avoiding instability

Need for monitoring the switch ON cycle-by-cycle

Need for monitoring the switch OFF cycle-by-cycle

26

Application exampleMaximizing resource utilization for SMPS (2/2)

Application example resource optimization: block diagram

› Each CMP + slope generator isable to monitor both ZCD andpeak current

› The switch between the twocomparator input channels is doneautomatically via HW

› The slope generator isstarted every time thatipeak needs to besensed

› The ZCD referencevalue is monitoredwhenever the PWM signalis ON

› Control up to 3 SMPSwith very low CPUinteraction


HRPWM

QA High resolutionchannel

clamping Software ADC

filtering

Latch

set Vref

VO

blanking

RAMP

ZCD

ipeak

A

BComparator

+ZCD ref

clear

Comparator and SlopeGenerator(CSG)

DeadtimeQA

Ramp config

iPeak reference value

Muxcontrol

VIN

+

-

SMPS

VOUT

+

-Need for monitoring the switch ON cycle-by-cycle

Need for monitoring the switch OFF cycle-by-cycle

VrefVrefZCDiPEAKQAQA

IL

ipeak ZCD

With just onecomparator and

slope generator itis possible to

monitor both ZCDand peak current

One timeconfigcycle-by-cycle

adjustment ispossible

PWM

A

BB

27

Application exampleMulti-mode SMPS control

Application example multi-mode SMPS control: block diagram

› Switching between operation modes due to loador VIN/VOUT modifications can improve converterefficiency

› Each HRC can operate with two sets of resources

› Each set of resources can be used to implement adifferent operation mode

› Switch between the modes can be done on-the-fly via SW


High resolution channel 3


Q1Latch

DeadtimeQ1

VOUTVINQ1L1 D1 Co

Voltagecontrol

ADC

Software

CCU4

HRC

CCU 8

set res

Burst mode

Highresolutioninsertion


A

B


Resources foroperation mode B:› Timers› Comparators› Slope generators› Etc.

Resource foroperation mode A:› Timers› Comparators› Slope generators› Etc.

Mode switchcontrolled by

SWPeak

controlBurstcontrol

CRM DCM

Peak

control

Valley

control

CRM Hysteretic

...

sw

itch

28

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The information given in this training materials is given as a hint forthe implementation of the Infineon Technologies component only andshall not be regarded as any description or warranty of a certainfunctionality, condition or quality of the Infineon Technologiescomponent.

Infineon Technologies hereby disclaims any and all warranties andliabilities of any kind (including without limitation warranties of non-infringement of intellectual property rights of any third party) withrespect to any and all information given in this training material.

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HRPWM High Resolution PWM - Infineon Technologies

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