How to solve ACLR issue
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Transcript of How to solve ACLR issue
1. Reduce your PA input power, or
select a PA with high linearity.
In terms of PA, if your output power is too large, the PA will saturate.
Intermodulation (IMD) is one of nonlinearities due to saturation.
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At saturation, there will be IMD3 and IMD5, which degrade ACLR.
It’s the reason why poor ACLR usually occurs in maximum power.
Consequently, ACLR is the linearity indication of your Tx chain.
If you reduce your PA input power, or select a PA with high linearity, then ACLR
improves.
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2. Optimize your load-pull
Generally speaking, for convenience, we usually tune the load-pull to around 50
Ohm on Smith Chart. But if you really wanna optimize your ACLR, you can tune
the load-pull to the location with best ACLR on Smith Chart. Of course, good
linearity is at the expense of efficiency, it means that your current consumption
will increase. After all, it’s a trade-off between linearity and efficiency.
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3. Decrease your PA post-loss
Take WCDMA for example, the block diagram is as below :
Of course, both antenna switch module(ASM) and duplexer have insertion loss.
We call the total insertion loss at PA output “PA post-loss”, and the relationship
between PA output power and post-loss is illustrated as below :
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For example, if you hope the measured Tx power at antenna(Target power) is 24
dBm, and your PA post-loss is 3dB, it means that your PA output power is 27 dBm.
Likewise, with the same target power, if your PA post-loss is 5dB, your PA output
power is 29 dBm. Thus, according to the above formula, we know that more the
PA post-loss, more PA output power.
As mentioned above, more PA output power leads to worse linearity, which
degrades ACLR.
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4. Fine tune your PA input matching :
As illustrated above, PA input matching is the driver amplifier (DA) load-pull.
That is to say, if your DA load-pull is not good enough for linearity, then the ACLR
at PA input will become poor.
And PA is the biggest contributor to nonlinearity, poor ACLR at PA input leads to
worse ACLR at PA output.
As a thumb of rule, the ACLR at PA input should be lower than which at PA output
about 10 dB. For example, if you hope you have -40 dBc ACLR at PA output, then
the ACLR at PA input should be -50 dBc.
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Because DA output power is lower than PA output power, it proves that ACLR is
related to output power again.
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5. Put SAW filter at PA input
As mentioned above, IMD degrades ACLR.
And the IMD near RF signal may be composed of RF signal itself and harmonics.
2F – F = F
3F-2F = F
Thus, if we put SAW filter at the PA input to reject these harmonics, and then IMD
decreases, ACLR improves.
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Based on the analysis, BAW is better than SAW :
And FBAR is better than BAW :
Nevertheless, the insertion loss of SAW filter at PA input is also the DA post-loss.
And DA output power has to be strong enough to boost PA.
That is to say, higher the insertion loss of SAW filter at PA input, higher DA output
power, and higher ACLR at PA input. As mentioned above, higher ACLR at PA
input leads to much higher ACLR at PA output.
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In terms cascade IIP3, if we put SAW filter at PA input, according to following
formula :
So, the selectivity of SAW filter can diminish the effect PA makes on cascade IIP3.
Because PA is the biggest contributor to nonlinearity, less effect on cascade IIP3,
less nonlinearity and better ACLR of Tx chain.
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6. Avoid IR drop in Vcc of PA
As illustrated as below, lower Vcc, worse ACLR :
Generally speaking, in Vcc, there are series bead or inductor acting as RF choke.
Thus, if the internal resistance within them is too large, which causes IR drop ,
and degrades ACLR.
Besides, if the layout trace of Vcc is too thin or long, there will be IR drop as well.
Of course, if the above situations occur in Vcc of transceiver, then ACLR at PA
input degrades. And poor ACLR at PA input leads to worse ACLR at PA output.
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7. Digital pre-distortion (DPD)
As illustrated below :
After DPD, the ACLR improves much due to PA linearity improvement.
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8. Reject DC-DC converter Switching
Noise
As illustrated below :
DC-DC converter Switching Noise and RF signal may compose IMD2, which is
near RF signal :
That is to say, less the switching noise, less the IMD2 and ACLR.
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Thus, we can reject switching noise by means of bead or inductor. As illustrated
below :
There are 6 cases :
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Let’s assume switching noise is 6 MHz. As shown above, comparing with
case1(original condition), we can see that the insertion loss at 6 MHz becomes
more in other cases, it means that inserting a inductor or bead between DC-DC
converter and Vcc of PA really rejects switching noise. Because the insertion loss
of case 3 is largest, the ACLR of case 3 improves most.
Of course, as mentioned above, the internal resistance within the inductor and
bead should not be too large, or there will be IR drop and ACLR degradation.
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9. Delay of Envelope Tracking (ET)
ET requires an additional generator to provide the envelope signal for the DC
modulator. Envelope signals demand highly precise adjustable time alignment
with the RF signal, shaping capabilities and a signal performance with best
spectral purity.
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Therefore, highly precise synchronization is the key, which impacts ACLR very
much.
As illustrated above, there is an optimum time delay for ACLR. Thus, you can
adjust time alignment to achieve best ACLR.
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Conclusion
1. PA output power and linearity
2. PA load-pull
3. PA post loss
4. PA input matching
5. SAW filter at PA input
6. Vcc IR drop
7. DPD
8. DC-DC converter switching noise
9. Time delay between envelope signal path and RF signal path
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