Hot or Not? Power dissipation in analog front end ...SLAC Advanced Instrumentation Seminar Paul...

Hot or Not? Power dissipation in analogHot or Not? Power dissipation in analogfront end electronics for 2D detectorsfront end electronics for 2D detectors

Paul OPaul O’’ConnorConnorBNLBNL

SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3, 2008 2

Multi-element Multi-element SiSi 2D detectors 2D detectors

HELIOS (1983) ATLAS (2008)

PanStarrs (2008)

EARLY CCD (1985)


Non-silicon pixelsNon-silicon pixels

Gas micropattern MAPMT

CdZnTeSolstice Gamma camera

• 96 CZT crystals

• 3072 pixels

• 192 front -end ASICs

• 1.3M events/second

• average FWHM 3.8% at 122keV

Hamamatsu

SWIFT

INTEGRAL

Philips

MicroMEGAS

GEM


Commercial productsCommercial productsCrystallographydetector

Cardiac SPECT(gamma camera)

Digital still camera

Hybrid p-i-n/CMOS

6Mpix

CsI scintillator/p-i-nCMOS

12 Mpix

CCD

10Mpix


Power and cooling have become limiting factorsPower and cooling have become limiting factors

60kW1m3 600W

-100C

“Cable pollution”

Radiation length(mostly services)

Limited volume(ATLAS)

Heat removalfrom cryostat(LSST)

3kW.01m3

(XFEL)


On-detector power density limited by cooling capacityOn-detector power density limited by cooling capacity

STAR TPC

PHX MVD

PHX PAD

M'pix2

EXAFS

PET

XAMPS1

barcode

LHC pixels

MAPS

LSST

DEPFET2DEPFET1

gamma cam

1E-2

1E-1

1E+0

1E+1

1E+2

1E+3

1E+4

1E+5

1E+6

1E+7

STA

R T

PC

PHX M

VD

PHX P

AD

DEPFE

T1

M'pix2

gam

ma

cam

EXAFS

PET

XAM

PS1

barc

ode

LHC p

ixels

DEPFE

T2

MAPS

LSST

1E-1

1E+0

1E+1

1E+2

1E+3

1E+4

1E+5

1E+6

1998 2000 2002 2004 2006 2008 2010

Year

pix

els

/cm

2

STAR TPC

PHX MVD

PHX PAD

M'pix2

EXAFS

PET

XAMPS1

barcode

LHC pixels

MAPS

LSST

DEPFET2DEPFET1

gamma cam

1E-2

1E-1

1E+0

1E+1

1E+2

1E+3

1E+4

1E+5

1E+6

1E+7

STA

R T

PC

PHX M

VD

PHX P

AD

DEPFE

T1

M'pix2

gam

ma

cam

EXAFS

PET

XAM

PS1

barc

ode

LHC p

ixels

DEPFE

T2

MAPS

LSST

1E-1

1E+0

1E+1

1E+2

1E+3

1E+4

1E+5

1E+6

1998 2000 2002 2004 2006 2008 2010

STAR TPC

PHX MVD

PHX PAD

M'pix2

EXAFS

PET

XAMPS1

barcode

LHC pixels

MAPS

LSST

DEPFET2DEPFET1

gamma cam

1E-2

1E-1

1E+0

1E+1

1E+2

1E+3

1E+4

1E+5

1E+6

1E+7

STA

R T

PC

PHX M

VD

PHX P

AD

DEPFE

T1

M'pix2

gam

ma

cam

EXAFS

PET

XAM

PS1

barc

ode

LHC p

ixels

DEPFE

T2

MAPS

LSST

1E-1

1E+0

1E+1

1E+2

1E+3

1E+4

1E+5

1E+6

1998 2000 2002 2004 2006 2008 2010

Year

pix

els

/cm

2

Pixel density trend

Thermal impedances

Limit ofnaturalconvectionwith 10° Ctemp. rise

Forced liquidcooling required

Power density limitTemp (K)

LeakageSpeedNoise

Temperature dependences


Power and cooling issues in data processingPower and cooling issues in data processing

NCSA Petascale computing center (24MW)US total: 7GW (2006)

future power source?

PC

PTO

TAL/P

IT

data: Google

Data center power efficiency

1.0

1.2

1.4

Data center

50 – 100 W/ft2

H2O-cooled CPU180W/cm2

IBM


Multi-element 2D Area DetectorsMulti-element 2D Area DetectorsDetector

• more-or-less planar sensitive surface• covered with NPIX sensitive elements (“pixels”)• on-detector electronics measures

– quantity of charge– time of occurrence– fluence/grey level– etc.

• transmit to DAQ

TRACKER IMAGER SPECTROMETER

Pulsed - X X

Random X X X

Triggered X - -

Data-driven X X X

Integrating - X -

Event-by-event X - X

Occupancy <10% 100% <50%

Time-tag? X - X

Dyn. Rng. (bits) 5 - 8 10 - 16 8 - 14

information content = no. of resolution elements (“bits”)

Signal characteristics


Power Efficiency Figure of MeritPower Efficiency Figure of Merit

Information generation rate

s

Nbits

pix fNIGR !!= 2 2Nbits: effective number ofresolution elements.

fs: event or frame rate

[IGR] = resolution elements persecond (“bits per second”)

Power efficiency

IGR

PEB= A measure of the energy required

per resolution element.

[EB] = Joulesimilar measures used in computingand communications


Signal chainSignal chain

preamp filter analog featureextraction/analog memory

ADC DSP off-detectordriver

detector can transfercharge/voltage/current

Nchan=1

matrix switchper pixel

Nchan=Ncol

wirebond

bump bond (hybrid) monolithic

Nchan=Npix

tileable

optional multiplexing

electronics organization

power to sustain IGR independent ofparallel or serial organization


Preamplifier power efficiencyPreamplifier power efficiencyPower vs. detector capacitance

• Dynamic range is determined by detectorpredicted EB has wide range (fJ…pJ),depending on the experiment.

Noise (rms e-)10 100 1000

Pow

er (W

)

10-6

10-4

10-2

10µs

τs=10ns

100ns

1µs

Power vs. ENC

Cdet=1pF Usually optimized for minimum ENC, whichdepends on detector capacitance and shapingtime.

100

Pow

er (W

)

10-6

Det. capacitance (pF)0.1 1 10

ENC=10e-

τs=1µs

10-5

10-4

10-3

10-2

10-1

20e- 50e- 100e- 200e200e--

500e500e--

Pow

er (W

)

10nPulse shaping time (s)

100n 1u 10u

Cdet=1pF

10-6

10-5

10-4

10-3

10-2

10-1

ENC=50e-

100e-

200e200e--

500e500e--

Power vs. shaping time


Charge sensitive preamp power efficiency (empirical)Charge sensitive preamp power efficiency (empirical)

0.1 0.2 0.5 1.0 2.0 5.0 10.0 20.0 50.0

1

e-0

31

e

-02

1

e-0

11

e

+0

01

e

+0

1

C, pF

FO

MC

SA

, p

J

0.18

0.25

0.35

0.5

0.8

1.2hybrid

EB,

pJ

CD, pF

1.0

.001

.01

0.1

10

• values cluster around 1pJ• no trend with technologyfeature size

charge preamplifier:

Q

sdBQ

PE

!

"

/max

#=


ADC power efficiencyADC power efficiency

1pJ (12b)1pJ (10b)

A. Matsuzawa, “Trends in High Speed ADC Design”, ASICON 10/07

• EB in same range (1pJ) ascharge preamplifier


Signal chain components Signal chain components EEBB compared compared• Expresses the power cost of achieving SNR and speed• Useful rules of thumb during design partitioning

Typical Best

1.5pJ 0.005pJ

1pJ 0.05pJ

20pJ 7.5pJ

charge amplifier:

Q

pd

BQ

PE

!

"

/max

#=

ADC:

s

ENOB

dB

f

PE

!=2

off-chip serial link:

bit

dB

f

PE =

note: pJ = mW/Mbps


Net power dissipationNet power dissipation

other

sp

drvrB

sp

ADCB

SAMPpreampB Pn

E

n

ENEIGRP ++!+!= )(

21

det

whereIGR = information generation rateEB,preamp, EB,ADC, EB,drvr are energy per bit of preamp, ADC, and driver resp.NSAMP = no. of ADC samples per pulsensp1, nsp2 = sparsification ratio into ADC, driver resp.Pother = power in analog/digital memory, DSP, regulators, control &monitoring functions, etc.

Common sources of wasted power:• digitize more than minimum no. of samples• digitize faster than minimum rate• digitize with more than needed no. of bits of resolution• inefficient voltage regulators


SCEPTER Peak Detector/SCEPTER Peak Detector/DerandomizerDerandomizer

New architecture for efficient readout ofmultichannel detectors

• Self-triggered and self-sparsifying• Simultaneous amplitude, time, and addressmeasurement for 32 input channels• Set of 8 peak detectors act as derandomizing analogmemory• Rate capability ~ 10MHz• 2mW/channel

32

0

1

2

0 20 40 60 80 100

Reconstructedpoints

Actualwaveforrm

0

1

2

0 20 40 60 80 100

-15

PULSE

RREQ

ASIC inputs

0

2

4

0 20 40 60 80 100

-2

PDOUT

TDOUT

ASIC outputs


TPC Chamber

Double-GEM (gain ~ 500)

Anode Plane

Pads~8000

Front-EndElectronics

~8000 channels

Example: readout of a TPC using analog bufferingExample: readout of a TPC using analog buffering

Mini-TPC with GEM readout for LEGS experiment at BNL

drift time: 7µstrigger rate: 2kHzoccupancy: <3% (pads)


TPC Digitization PowerTPC Digitization Power

• Npads 8000• Ntimeslices 500• Nvoxels 4x106

• Digitization Energy (12 bit resolution):– 10-12J/bit * 212 * Nvoxels = 16 mJ

• Power (FADC):– 16mJ / 7µs = 2000W (250 mW/chan)

• Power (buffer and readout at 2 kHz trigger rate):– 16mJ / 500µs = 30W ( 4 mW/chan)

• Compare with 0.75mW/chan for amplifier + 0.6mW/chanfor PD + TAC.• With sparsified readout of only occupied channelsbuffered in PD: PADC ~ 0.6W (75 µW/chan).


Construct stack of several diewith connections between layers:

• stack-and-wirebond• embedded in HDI polymer• metallic face-to-face bond• oxide-bond, through-siliconvias

Can mix technologies, potentiallyincluding high-resistivity detectorlayerHigh fill-factor mosaicsReduce long wire lengths

Inter-layer EMIPower density increase by ~ NlayersInterlayer vias not to scale withintralayer lithographically-defined vias

PackagingPackaging


Examples: TrackersExamples: Trackers

RatCAP tomograph

32-channelRatCAP ASIC0.18um CMOS

image of conscious ratbrain

24-channelASICpreamp/shaper

sampling/digitizingboard

ALICE pixel(CERN)

RatCAP (BNL)

LEGS TPC (BNL)

ATLAS CSC (BNL)

Area

Pixels

Rate

DR

IGR

P

1.7

8000

2M

150

3.0e12

0.8

15

380

2M

3200

6.4e9

1.5

1000

8000

700K

1.3e5

8.7e10

16

1e4

1000

2.4e7

960

2.3e10

250

cm2

-

cps/fps

-

s-1

W


Examples: ImagersExamples: ImagersMWASIC (BNL)

Preamp

Disc1

Disc2

Double

Disc logic

Vth Low

Vth High

13 bits

Shift

Register

Input

Ctest

Testbit

Test Input

Maskbit

Maskbit

3 bits threshold

3 bits threshold

Shutter

Mux

Mux

ClockOut

Previous Pixel

Next Pixel

Conf

8 bits

configuration

Polarity

Analog Digital

Preamp

Disc1

Disc2

Double

Disc logic

Vth Low

Vth High

13 bits

Shift

Register

Input

Ctest

Testbit

Test Input

Maskbit

Maskbit

3 bits threshold

3 bits threshold

Shutter

Mux

Mux

ClockOut

Previous Pixel

Next Pixel

Conf

8 bits

configuration

Polarity

Analog Digital

"diff DSI" outp

+

-

5K

+

-

5K

Vref Vref

Vref

5K

100pF

Vref

5K

inp

inm

outp

"diff DSI" outm

100pF

Vref

outm

2p8p

10K

10K

+

-

CDS

(switches)2k

8k

Medipix-2 (CERN) LSST(IN2P3,Harvard, Penn,UTenn, Purdue, BNL)

Area

Pixels

Rate

DR

IGR

P

0.16

64

190K

330K

6.1e10

0.32

2.0

66K

300

8K

1.6e11

0.52

3200

3.2G

0.06

240K

4.5e12

600

cm2

-

cps/fps

-

s-1

W


Examples: SpectrometersExamples: SpectrometersMAIA

(BNL, CSIRO)NSASIC

(BNL)FEXAMPS

(BNL, SLAC)

Area

Pixels

Rate

DR

IGR

P

1.0

96

8M

200

1.6e9

2.9

2.2

14

2.1M

440

9.2e8

0.05

81

1M

1K

20K

2.0e13

24

cm2

-

cps/fps

-

s-1

W


0.01

0.10

1.00

10.00

100.00

1000.00

1.E+08 1.E+09 1.E+10 1.E+11 1.E+12 1.E+13 1.E+14 1.E+15

Tracker

Imager

Spectrometer

Power efficiency comparedPower efficiency compared

108 1010 1012 1014.01

1

100

.1

10

1000CSC

LEGS TPC

RatCAPALICE

MAIA

NSASIC

FEXAMPS

LSST

MWASIC

Medipix2

DSC

E B=1pJ

E B=1nJ

IGR (s-1)

P (W

)

1.E-13

1.E-12

1.E-11

1.E-10

1.E-09

1.E-08

1.E+07 1.E+08 1.E+09 1.E+10 1.E+11 1.E+12 1.E+13 1.E+14 1.E+15

IGR/A, bits/s/cm2

EB,

J

Efficiency – density correlation?


ConclusionsConclusions

• Powering and cooling on-detector electronics posesengineering challenges in large 2D detectors.

• Power/performance ratio EB measures electronicsefficiency.

• Preamp, ADC, and driver are the largest powerconsumers in typical signal chain.

• CMOS technology evolution provides limitedopportunity to reduce analog power consumption.

• Sparsification and derandomization, as early aspossible and preferably in analog domain, areimportant for efficient architecture.

• Planning for power efficiency should be part of thedetector development process from the earliestphases.


THE END


REFERENCESREFERENCES• P. O'Connor; Low Noise CMOS Signal Processing IC for Interpolating Cathode Strip Chambers; BNL 61085;

IEEE Trans. Nucl. Sci. NS-42 (1995) 824-829.• P. O'Connor and G.De Geronimo; Prospects for charge sensitive amplifiers in scaled CMOS; Nucl. Instrum. &

Meth. A484 (2002) 713-725.• G. De Geronimo, P. O'Connor, A. Kandasamy; Analog peak detector and derandomizer for high rate

spectroscopy; IEEE Trans. Nucl. Sci. 49 (2002) 1769-1773.• P. O’Connor , G. De Geronimo and A. Kandasamy, Amplitude and Time Measurement ASIC with analog

derandomization, Nucl. Instrum. & Meth. A505 (2003), 352 – 357.• G. De Geronimo, P. O’Connor, MOSFET Optimization in deep submicron CMOS technology for charge

amplifiers, IEEE Trans. Nucl. Sci. 52 (2005), 3223 – 3232.• B. Yu et al., A GEM based TPC for the LEGS experiment, 2005 IEEE Nucl. Sciences Symposium Conference

Record, 924 – 928.• P. O’Connor, Future Trends in Microelectronics - Impact on Detector Readout, International Symposium on

Detector Development, April 3 – 6 2006, SLAChttp://www.slac.stanford.edu/econf/C0604032/proceedings.htm#twelve

• J-F. Pratte et al., Front-end electronics for the RatCAP mobile animal PET scanner, IEEE Trans. Nucl. Sci. 51(2004), 1318-1323.

• G. De Geronimo, A. Dragone, J. Grosholz, P. O’Connor, E. Vernon, ASIC With multiple energy discriminationfor high-rate photon counting applications, IEEE Trans. Nucl. Sci. 54 (2007), 303 – 312.

• M. Campbell, PS Applications, Joint Workshop on Detector Development for Future Photon Science andParticle Physics Experiments, DESY, Oct. 14, 2008,https://indico.desy.de/materialDisplay.py?contribId=7&sessionId=2&materialId=slides&confId=1036

• D.P. Siddons, Detector R&D for NSLS-II, X-ray Photon Correlation Spectroscopy & Microbeam SAXS at NSLS-II Workshop, Jan. 11, 2008, http://www.bnl.gov/nsls2/workshops/docs/XPCS/XPCS_Siddons.pdf

• G. De Geronimo et al., Front-end ASIC for high resolution X-ray spectrometers, IEEE Trans. Nucl. Sci. 55(2008), 1604 – 1609.

• G. Haller, N. Van Bakel, Two dimensional detectors for LUSI science, LCLS FAC Oct 2007,http://silicondetector.org/download/attachments/9175610/Haller-FAC-LUSI--Detectors-10-07-v1.ppt?version=1

• A. Dragone, J-F. Pratte, P. Rehak, G. Carini, R. Herbst, P. O’Connor, D.P. Siddons, XAMPS detector readoutASIC for LCLS, 2008 IEEE Nucl. Sci. Symposium Conference Record, N44-8 (2008).

• http://www.google.com/corporate/datacenters/measuring.html


BACKUPSBACKUPS


OutlineOutline

• 2D area detectors• Optimizing power/performance

– Device and Circuit Level– System level

• Examples


Input transistor (MInput transistor (M11) optimization) optimization

• Optimize for total (white + 1/f) series noise:– adjust W,L while holding Id and tp constant

• Correct modeling of weak, moderate, and stronginversion (EKV model):– dependence of gm, Cg, γ on operating point

• Low-frequency noise:– dependence on Lg

– spectral dependence• Predict result of scaling to new technologies

P. O’Connor, Proc. FEE2003 SnowmassG. De Geronimo, P. O’Connor, TNS52(6),3223 (2005)


Preamplifier power efficiencyPreamplifier power efficiencyN

oise

(rm

s e-

)

10

100

1000

Det. capacitance (pF)0.1 1 10

P=1µW

P=10mWP=10mW

τs=1µs

Equivalent Noise Chargevs. detector capacitance and shaping time

Noi

se (r

ms

e-)

10

100

1000

10nPulse shaping time (s)

100n 1u 10u

Cdet=1pFP=1µW

P=10mWP=10mW • Dynamic range is determined by detectorpredicted EB has wide range (fJ…pJ),depending on the experiment.

Noise (rms e-)

10 100 1000Po

wer

(W)

10-6

10-4

10-2

10µs

τs=10ns

100ns

1µs

Power vs. ENC

Cdet=1pF

Usually optimized for minimum ENC, whichdepends on detector capacitance and shapingtime.


Parameters for detector comparisonParameters for detector comparison

Project Type unit pixels power (W) area (cm 2) 2^ENOB rate (Hz) IGR (s -1) EB(J) IGR/A (cm -2s-1) P/A (W/cm 2)

LEGS T plane 8000 16.00 1010.0 1.31E+05 6.6E+05 8.7E+10 1.8E-10 8.6E+07 0.02

RatCAP T ring 384 1.50 15.4 3.20E+03 2.0E+06 6.4E+09 2.3E-10 4.2E+08 0.10

ALICE T chip 8192 0.82 1.7 1.50E+02 2.0E+10 2.9E+12 2.8E-13 2.1E+08 0.47

CSC T chamber 1000 250.00 10000.0 9.60E+02 2.4E+07 2.3E+10 1.1E-08 2.3E+06 0.03

Medipix-2-img I chip 65536 0.52 2.0 8.19E+03 2.0E+07 1.6E+11 3.3E-12 8.1E+10 0.26

MWASIC-img I chip 64 0.32 0.2 3.28E+05 1.9E+05 6.1E+10 5.2E-12 3.8E+11 2.00

LSST I FPA 3.20E+09 600.00 3220.0 2.40E+04 5.9E-02 4.5E+12 1.3E-10 1.4E+09 0.19

DSC I FPA 1.00E+07 33.93 1.1 1.68E+07 1.0E+00 1.7E+14 2.0E-13 1.6E+14 31.42

NSASIC S chip 14 0.05 2.2 4.38E+02 2.1E+06 9.2E+08 4.9E-11 4.1E+08 0.02

FEXAMPS S 1K^2 det 1.00E+06 24.19 81.0 2.00E+04 1.0E+03 2.0E+13 1.2E-12 2.5E+11 0.30

MAIA S 96-pad detector 96 2.91 1.0 1.28E+04 8.0E+06 1.0E+11 2.8E-11 1.7E+09 3.03


MOSFET ScalingMOSFET Scaling

• Voltages, dimensions reduced by α• Results:

!

!

/ Speed

1 eCapacitanc

const. / eConductanc

const.

CVI

VI

E =r

const. density Power

Density

1 Power/gate

1 energy Switching

2

2

2

3

2

!

!

!

fCV

CV

20V 4V


Industry Scaling RoadmapIndustry Scaling Roadmap

• New generation every ~2 years with α = √2• Lg (1970) 8 µm (2007) 18 nm

180


Can Scaling Continue?Can Scaling Continue?• Until 180nm node:

– follow classical scaling with α = √2– 2.8X performance per generation

• Now:– thermal voltage prevents further voltage

scaling– continue (super) scaling Lg– VDD, VTH have stopped scaling

• Gate density and speed continue to scale• Increase of E, conductance• Switching energy decreases only by 1/α

not 1/α3

• Power density increase ~ α• Static power from leakage, gate tunneling

make power problem worse


CMOS Scaling CMOS Scaling –– impact on analog impact on analog

• more, faster transistors• better radiation resistance• reduced gain• poorer matching• lower noise margins• dynamic range limited by low supply voltage

0.1 1Min. Feature Size, um

103

104

Dyn

am

ic R

an

ge

10 uW

100 uW

1000 uW


Mixed-signal chipsMixed-signal chips

Hot or Not? Power dissipation in analog front end ...SLAC Advanced Instrumentation Seminar Paul...

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