Hierachical structural modeling
-
Upload
dennis-gookyi -
Category
Education
-
view
51 -
download
2
Transcript of Hierachical structural modeling
![Page 1: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/1.jpg)
HanbatHanbat
NationalNational
UniversityUniversityHanbatHanbat
NationalNational
UniversityUniversity
Hierarchical Structural Hierarchical Structural ModelingModeling
Hierarchical Structural Hierarchical Structural ModelingModeling
Gookyi Dennis A. N.Gookyi Dennis A. N.
SoC Design Lab.SoC Design Lab.
June.20.2014
![Page 2: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/2.jpg)
ContentsContents Module Generate Statements
2
![Page 3: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/3.jpg)
Module Module The basic units of Verilog HDL are modules A module has two major parts:
The interfaceThe body
3
![Page 4: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/4.jpg)
Module Module A module is defined by using the keyword module
and has various forms as below:
4
![Page 5: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/5.jpg)
Parameters Parameters Parameters are constants which can be used
throughout the module defining them They are used to specify delays and width of
variables There are two types of parameters:
Module parameter Specify parameter
The module parameters can be defined by using the following keywords within the module:
Parameter localparam
5
![Page 6: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/6.jpg)
Parameter DeclarationParameter Declaration The parameter is used to define module parameters
that can be overridden by defparam or module instance parameter value assignment
It has the forms as below:parameter [signed] [range] param_assignmentparameter var_types param_assignment
Some examples of the usage of parameter is as below:parameter SIZE =7;parameter WIDTH_BUSA = 24, WIDTH_BUSB = 8;parameter signed [3:0] mux_selector = 4’b0;
6
![Page 7: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/7.jpg)
Localparam DeclarationLocalparam Declaration It is used to define parameters local to a module It cannot be overridden by the defparam statement
or by module instance parameter value assignment The following are some examples of the usage of
localparam:localparam SIZE =7;localparam WIDTH_BUSA = 24, WIDTH_BUSB = 8;localparam signed [3:0] mux_selector = 4’b0;
7
![Page 8: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/8.jpg)
Parameter PortsParameter Ports A parameter can be placed between module name
and port list or port list declarations A parameter can have both the type and range
specifications as shown below:module module_name#(parameter SIZE =7,parameter WIDTH_BUSA = 24, WIDTH_BUSB = 8,parameter signed [3:0] mux_selector = 4’b0)(port list or port list declaration) …endmodule
8
![Page 9: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/9.jpg)
Module InstantiationModule Instantiation Modules cannot be nested, however, a module can
incorporate a copy (called an instance) of another module into itself through instantiations
The syntax is as below:module_name[#(parameters)]instance_name[range]([ports]);
9
![Page 10: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/10.jpg)
Port Connection RulesPort Connection Rules Connecting ports to external signals can be done by:
Named association: ports are connected by listing their names. The form is as follows:.port_id1(port_expr1),…, .port_idn(port_exprn)
Positional association: ports are connected by ordered list of ports, each corresponding to a port. It has the following form:port_expr1, …, port_exprn
10
![Page 11: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/11.jpg)
Module Parameter ValueModule Parameter Value When a module instantiates other modules, the
higher-level module can change the values of parameters defined by the keyword parameter in the lower-level modules
An example is shown below:
11
![Page 12: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/12.jpg)
Module Parameter ValueModule Parameter Value Waveform and RTL schematic:
12
![Page 13: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/13.jpg)
Module Parameter ValueModule Parameter Value There are two ways to override parameter values:
Defparam statementModule instance parameter value assignment
13
![Page 14: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/14.jpg)
Using The Using The defparamdefparam StatementStatement It is used to redefine the parameter values defined by
the keyword parameter Its syntax is as below:
defparam hierarchical_path_name1 = value1, hierarchical_path_name2 = value2, … hierarchical_path_namen = valuen;
14
![Page 15: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/15.jpg)
Using The defparam Using The defparam StatementStatement An example is a parameter adder. Here there is the
instantiation of two adder modules using the defparam statement
15
![Page 16: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/16.jpg)
Using The defparam Using The defparam StatementStatement Waveform
16
![Page 17: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/17.jpg)
Using The defparam Using The defparam StatementStatement RTL schematic
17
![Page 18: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/18.jpg)
Module Instance ParameterModule Instance Parameter The parameters defined by using the keyword
parameter within a module are overridden by parameters passed through parameters ports whenever the module is instantiated
There are two approaches:Positional associationNamed association
18
![Page 19: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/19.jpg)
Module Instance Parameter: Module Instance Parameter: Positional AssociationPositional Association In this form the order of the assignment must follow
the order of declaration of the parameters within the module
19
![Page 20: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/20.jpg)
Module Instance Parameter: Module Instance Parameter: Positional AssociationPositional Association Waveform
20
![Page 21: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/21.jpg)
Module Instance Parameter: Module Instance Parameter: Positional AssociationPositional Association RTL schematic
21
![Page 22: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/22.jpg)
Module Instance Parameter: Module Instance Parameter: Named AssociationNamed Association It explicitly links the names specified in the
instantiated module and the associated value
22
![Page 23: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/23.jpg)
Module Instance Parameter: Module Instance Parameter: Named AssociationNamed Association Waveform
23
![Page 24: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/24.jpg)
Module Instance Parameter: Module Instance Parameter: Named AssociationNamed Association RTL schematic
24
![Page 25: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/25.jpg)
Generate StatementGenerate Statement Generate statement allows selection and replication
of some statements during elaboration time Elaboration time is the time after a design has been
parsed but before simulation begins The generate statement has the syntax as below:
generateGenerate-declarationGenerate-loop statementsGenerate-conditional statementsGenerate-case statement …
endgenerate
25
![Page 26: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/26.jpg)
Generate StatementGenerate Statement The power of generate statements is that they can
conditionally generate declarations and instantiations into a design
There are three kinds of statements that can be used within a generate statement:
Generate-loopGenerate-conditionalGenerate-case
26
![Page 27: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/27.jpg)
Generate-loop StatementGenerate-loop Statement It is formed by using a for statement within a
generate statement The generate loop is of the form:
for (init_expr; condition_expr; update_expr) Begin: block_name Generate_statements
end An index variable is always declared when using the
for statement within a generate statement The index variable is declared as follows
genvar genvar_id1, … genvar_idn;
27
![Page 28: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/28.jpg)
Generate-loop StatementGenerate-loop Statement An example is the use of continuous assignment
within a generate-loop for converting gray code into binary code
To convert gray code into binary code, we may count the number of 1’s from MSB to the current position
If it is odd, the binary bit is 1 Otherwise, the binary bit is 0
28
![Page 29: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/29.jpg)
Generate-loop StatementGenerate-loop Statement Code for converting gray code to binary code
29
![Page 30: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/30.jpg)
Generate-loop StatementGenerate-loop Statement During elaboration time, the generate-loop is
expanded The body of the for statement is replicated once for
each value of the iteration as follows:assign bin[0] = ^gray[SIZE-1:0];assign bin[1] = ^gray[SIZE-1:1];assign bin[2] = ^gray[SIZE-1:2];assign bin[3] = ^gray[SIZE-1:3];assign bin[4] = ^gray[SIZE-1:4];assign bin[5] = ^gray[SIZE-1:5];assign bin[6] = ^gray[SIZE-1:6];assign bin[7] = ^gray[SIZE-1:7];
30
![Page 31: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/31.jpg)
Generate-loop StatementGenerate-loop Statement Waveform
31
![Page 32: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/32.jpg)
Generate-loop StatementGenerate-loop Statement RTL schematic
32
![Page 33: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/33.jpg)
Generate-conditional Generate-conditional StatementStatement Allows modules, gate primitives, continuous
assignments etc. to be instantiated into another module based on an if-else conditional expression
It has the form as below:if (condition) generate_statements [else generate_statements]
if (condition) generate_statements [else if (condition2) generate_statements] [else generate_statements]
33
![Page 34: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/34.jpg)
Generate-conditional Generate-conditional StatementStatement An example of generate-conditional statement is
given Here, if-else is employed to set up the boundary cells,
the LSB and the MSB of an n-bit adder
34
![Page 35: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/35.jpg)
Generate-conditional Generate-conditional StatementStatement Code
35
![Page 36: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/36.jpg)
Generate-conditional Generate-conditional StatementStatement Testbench
36
![Page 37: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/37.jpg)
Generate-conditional Generate-conditional StatementStatement Technology schematic
37
![Page 38: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/38.jpg)
Generate-Case StatementGenerate-Case Statement Allows modules, gate primitives, continuous
assignments etc. to be instantiated into another module based on the case conditional expression
Its general form is as follows:Case (case_expr)
Case_item1: generate_statements …Case_itemn: generate_statements
[default: generate_statement]
38
![Page 39: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/39.jpg)
Generate-Case StatementGenerate-Case Statement An example of is used to model an n-bit adder:
39
![Page 40: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/40.jpg)
Generate-Case StatementGenerate-Case Statement Waveform
40
![Page 41: Hierachical structural modeling](https://reader033.fdocuments.in/reader033/viewer/2022052600/55782296d8b42a9b438b4569/html5/thumbnails/41.jpg)
Generate-Case StatementGenerate-Case Statement Technology schematic
41