Hardware User Guide - Farnell

AT89STK-11 Starter Kit..............................................................................................

Hardware User Guide

Table of Contents

AT89STK-11 Hardware User Guide 1

7676B–8051–08/07

Section 1

Introduction ........................................................................................... 1-1

1.1 Features ....................................................................................................1-1

1.2 Supported Devices....................................................................................1-2

Section 2

Hardware Description ........................................................................... 2-4

2.1 Board Overview.........................................................................................2-4

2.2 Block Diagram...........................................................................................2-5

2.3 Power Supply ............................................................................................2-5

2.4 Reset.........................................................................................................2-6

2.5 Features ....................................................................................................2-7

2.6 Interfaces ..................................................................................................2-7

2.7 Board Settings ..........................................................................................2-9

Section 3

ISP Programming ............................................................................... 3-12

3.1 Manual ISP Mode ...................................................................................3-12

3.2 Auto ISP Mode........................................................................................3-12

3.3 FLIP Software .........................................................................................3-13

3.4 Batchisp Software ...................................................................................3-13

Section 4

Appendix A: Board Layout .................................................................. 4-14

Appendix B: Bill of Materials ............................................................... 4-15

4.1 Bill of Materials Table..............................................................................4-15

Appendix C: Board Schematics .......................................................... 4-17

Appendix D: References/Acronyms.................................................... 4-22

4.2 References..............................................................................................4-22

4.3 Acronyms ................................................................................................4-22

Section 1

Introduction

This document describes the AT89STK-11 board dedicated to the standard C51 micro-

controllers with in-system programming.

All of the microcontroller I/Os are made available in an expansion area with prototyping

facilities.

1.1 Features � Stand-alone Board

� In-System Programmable (ISP) including ‘Auto ISP’ feature

� On-board Voltage Regulator

� Microcontroler on its sockets

– PLCC44-pin package

� On-board 3V or 5V power supply circuitry

– from an external power connector

– from an external battery

� On-board RESET

� Leds : Power, ALE, RS232 Rx and Tx

� External MCU clock connector

� External PCA clock connector

� TWI, SPI and RS232 connectors

� INT0 & INT1 Push-button

� Expansion area with prototyping facilities

� Commercial Temperature Range: 0 to +70°C Operating Temperature

� Dimension: 95 mm x 120 mm

AT89STK-11 Hardware User Guide 1-1

7676B–8051–08/07

Introduction

1.2 Supported Devices

� AT89C51RE2

� AT89C51RB2

� AT89C51RC2/IC2

� AT89C51RD2/ID2/ED2


7676B–8051–08/07

Section 2

Hardware Description

2.1 Board Overview Figure 2-1 shows the AT89STK-11 board.

Figure 2-1. AT89STK-11

This photo is not contractual and may be modified without notification by Atmel.


7676B–8051–08/07


2.2 Block Diagram Figure 2-2 shows the functional block diagram of the AT89STK-11, with the I/O usage.

Figure 2-2. Block Diagram of AT89STK-11

2.3 Power Supply The on-board power supply circuitry allows various power supply configurations. This

gives the user the capability to power the devices in the 3V and in the 5V voltage range.

2.3.1 Power Supply

Sources

The power supply source can come from two different and exclusive sources:

� either from the JACK PWR connector

� either from the 2-point sip EXT connector.

2.3.1.1 JACK PWR

Connector

The Jack power connector implemented on board is a female Jack connector with inter-

nal 2.1mm conductor. It requires a male JACK outlet with 2.1mm capability.

No specific polarization is mandatory as on-board diode rectifier gives a protection

against inadvertent polarization invertion.

When using the JACK power supply, the board is powered with a 5V voltage.

Power Supply

Full UART

External

Power

PC Host

C51P2

P3

EARSTISP

Expansion

TWI

P0

P1

SPI

INT0

Leds:PWRALE

16MHzQuartz

PLCC44

3V or 5V

INT1

Area

User LEDs User Push Buttons

2-5 AT89STK-11 Hardware User Guide

7676B–8051–08/07


Figure 2-3. Male JACK Outlet and Wires

Note: Do not mount more than one power supply source on AT89STK-11 Board.

Note: There is a diode voltage level between the negative output of the power supply and the “GND”. This could introduce some voltage gap during measurement and instrumentation.

2.3.1.2 External EXT

connector

The battery power connector implemented on board is a male two point SIP connector.

It requires an external power cable with a female 2 points connector.

When powered though this interface, polarization is mandatory as no protection is given

on board.

The EXT power supply circuitry support input supply from 2.7V up to 5.5V DC.

Figure 2-4. EXT PWR Female Connector / Cable

Note: Do not mount more than one power supply source on board.

Note: Keep SP1 closed when using the EXT input

2.4 Reset To be compatible with Atmel microcontrollers which have (or not) its on-chip RESET cir-

cuitry (c.f.microcontroller datasheet), the board provides a RESET signal witch can

come from 2 different sources:

2.4.1 Power-on RESET The on-board RC network acts as power-on RESET.

2.4.2 RESET Push Button By pressing the RESET push button on the board, a warm RESET of the microcontroller

is performed.


7676B–8051–08/07


2.5 Features This section presents the various features such as leds, buttons, etc... available on the

board.

2.5.1 Push-Buttons � RESET can be used to apply warm reset to the MCU

� ISP can be used with RESET to apply hardware conditions resulting in bootloader

start

� INT0 push-button can be used to activate INT0 input

� INT1 push-button can be used to activate INT1 input

2.5.2 User Push buttons � PB0, PB1, PB2 and PB3 are four push-buttons available for user application

They are made available on a 6 pins socket and in the expansion area so user can use

them according to the application needs.

2.5.3 Indicator LEDs � PWR led is driven by input of voltage regulator

� Rx led is connected to Rx of UART MCU (SP3 jumper can be soldered or not)

� Tx led is connected to Tx of UART MCU (SP4 jumper can be soldered or not)

� ALE led is connected to ALE of MCU

2.5.4 User LEDs � LED0, LED1, ... LED7 are height leds available for user application

They are made available on a 10 pins socket and in the expansion area so user can use

them according to its application needs.

2.5.5 Ports Port 0 and Port 2 are made available on two 10 pins sockets to ease user interconnec-

tion to the MCU.

The are also available on the expansion area.

2.5.6 Clocks An external clock can be connected to the board to control externally XTAL1 input clock

of MCU by using the XTAL1 from the expansion area.

In the same way, another external clock can be connected to control externally the PCA

clock (P1.2/ECI).

2.6 Interfaces

2.6.1 TWI The TWI connector is controlled by hardware TWI I/O of MCU (for Product including this

feature). The signals sda and scl are controlled by the TWI ports of MCU.

This TWI bus is also connected to the expansion area.

External TWI pull-ups are not provided on the AT89STK-11.

2.6.2 SPI The SPI connector is directly connected to SPI I/O of the MCU.

2.6.3 RS-232 The DB9 connector is connected to on-chip UART peripheral through a standard RS232

driver/receiver. Two leds are provided to indicate activity on Rx and Tx lines (They can

be disconnected removing solder pad SP3 and SP4).

2.6.4 OCD The On-Chip Debug interface (OCD) is provided on a 6-pin connector.


7676B–8051–08/07


This interface enables the debug of the application through ATMEL OCD dongle for

AT89C51RE2/IE2/RD3/IE3 only.

2.6.5 Expansion Area In addition to a 16x29 pad array, two rows of pads are given on the right side of the

board to offer all the MCU signals tu user application. Any application expansion can be

built on board through this interface.

2.7 Board Settings

The C51 Demo Board has the following settings:

� Jumpers

� Solder straps

� Test points

2.7.1 Jumpers The following table provides an overview of the jumpers, the solder straps and their

default configuration.

Figure 2-5. Jumper Setting Definition

2.7.2 Solder Straps Solder straps allow to modify the board configuration for specific usage.

Table 2-1. Jumpers and Switches Overview

Reference PCB Label Function Default

Jumper J11 J11 RTS of RS232 OFF

Jumper J12 J12 DTR of RS232 OFF

Jumper J13 J13 OFF

Table 2-2. Solder Straps Overview

Reference PCB Label Function Default

Solder strap SP1 SP1 External Power Supply Isolation Soldered

Solder strap SP2 ICC Consumption measurement Soldered

Solder strap SP3 SP3 Rx Led Soldered

Solder strap SP4 SP4 Tx Led Soldered


7676B–8051–08/07


Figure 2-6. Solder Strap Definition

2.7.3 Test Points

Test points are used to check the internal power supply of the microcontroller.

Table 2-3. Table of Test Points

Reference PCB Label Function

TP1 VCC Test point for Vcc

TP2,TP3 GND Test point for GND


7676B–8051–08/07

Section 3

ISP Programming

The On-Chip memories and configuration bytes can be programmed using the ISP

mode of the device and Atmel's FLexible In-system Programmer Software (FLIP)

described below.

3.1 Manual ISP Mode See Section “FLIP Software”, page 11.

3.1.1 Board Configuration To use ISP mode, no specific configuration is necessary on the board. Only make sure

that the EA pin of the product is tied to Vcc (internal code execution only).

3.1.2 Operating Mode To enter in ISP mode, press both the RESET and ISP buttons simultaneously.

First release the RESET button and then the ISP button. The device enters in

ISP mode.

3.2 Auto ISP Mode It allows the host PC application (Atmel Flip software for example) to control the hard-

ware conditions from the serial lines RTS and DTR.

Thus with the Auto ISP mode, the user does not need to push the ISP and RESET

buttons.

3.2.1 Board Configuration To use Auto ISP mode, put the board in the same configuration as ISP mode and also:

� Close RTS (J11) jumper

� Close DTR (J12) jumper


7676B–8051–08/07

ISP Programming

3.3 FLIP Software FLIP software runs on Windows® and Linux® Operating Systems. FLIP supports in-sys-

tem programming of Flash C51 devices through RS232. The latest version of FLIP

software can be downloaded from the Atmel web site, www.atmel.com.

3.4 Batchisp Software

Batchisp is an In-System Programming application which can perform the same opera-

tions as FLIP but is designed to be launched from the DOS command window.

The main purpose of batchisp is to automate ISP operations on several parts. It may

also be launched from an IDE like Keil's uVision®2 one : you can compile and link your

embedded program, generate the HEX file and download it to the target hardware with-

out leaving the Keil's IDE. This makes embedded software development and test faster.

Autoisp function is an operation which allows to enter in ISP mode without any hardware

handling.This is done thanks to DTR and RTS RS232 signals which can control on the

Board the RST and PSEN I/O of MCU.


7676B–8051–08/07

Section 4

Appendix A: Board Layout

Figure 4-1. Board Components View Diagram


7676B–8051–08/07

Appendix B: Bill of Materials

4.1 Bill of Materials Table

Item Q.ty Reference Part Tech. Caracteristics Package Manufacturer

1

29

CD1,CD2,C2,CD3,C3,C4,

100n 50V-10% Ceramic CASE 0805 PHYCOMP

CD5,C5,CD6,C6,CD7,C7,C8,

C9,C10,C11,C12,C13,C16,

C17,C18,C19,C20,C21,C22,

C23,C24,C25,C26

2 1 C1 1µF 10Vmin ±10% Case A AVX

3 2 C14,C15 22pF 10Vmin ±10%EIA/IECQ

3216PHYCOMP

4 1 D1 Red Led I=10 mA Agilent®

5 11 D2,D3,D4,D5,D6,D7,D8,D9,Green Led I=10 mA Agilent

D10,D11,D12

6 1 J1 SIP2 SOCKET . Pitch 2.54mm Molex®

7 1 J2 CONNECTOR JACK PWR Int.Diam=2.1mmInt. Diam.

2.1mmCliff

®

8 1 J3 HEADER 31x2/SM

9 2 J4,J8 HEADER 3X2 BARRETTE SECABLE Pitch 2.54mm Tyco Elec. / AMP

10 3 J5,J6,J10 HEADER 5X2 BARRETTE SECABLE Pitch 2.54mm Tyco Elec. / AMP

11 1 J7 CONNECTOR SIP6 RA . . .

12 1 J9 SIP4 . . .

13 3 J11,J12,J13 JUMPER Pitch 2.54mm Tyco™ Elec. / AMP

13bis 3 JUMPER shunt Pitch 2.54mm Arwin

14 1 P1 SUB-D9 FEMALE 90° with harpoons Tyco Elec. / AMP

15 1 R1 270 1/16W-5% SMD Case 0603 Multicomp

16

14

R2,R5,R14,R15,R16,R17,

1K 0.06W, 5% Case 0603 MulticompR18,R19,R20,R21,R22,R23,

R24

17 1 R3 820 1/16W-5% SMD Case 0603 Multicomp

18 8 R4,R6,R8,R9,R10,R11,R12,10k 0.06W, 5% Case 0603 Multicomp

R13

19 4

SP1,SP2,SP3,SP4,SP5, SP6,

SP7, SP8, SP9, SP10, SP11,

SP12

SolderPad

20 8 SW1,SW2,SW3,SW4,SW5,SW6,PUSH-BUTTON SMD, rectangular See DS ITT Canon

®

SW7,SW8


7676B–8051–08/07

Appendix B: Bill of Materials

21 3 TP1,TP2,TP3 TEST POINT Through Hole Pad Hole 1.1mm Vero

22 1 U1 DF005S TO269AA Vishay®

23 1 U2 LM317 SOT-223 National®

25 1 U6 AT8xC51_PLCC44 Socket

25bis 1 U6 AT8xC51_PLCC44

26 2 U7,U8 SIPEX-SP3232ECA Ref=SP3232ECA SSOP16 Maxim®

27 1 U9 74HC125/SO SOIC texas

28 1 Y1 CRYSTAL HC49 . .

28bis 2 Y1 CRYSTAL tulip . .

29 8R100, R101, R102, R103,

4,7K 0.06W, 5% Case 0603 MulticompR104, R105, R106, R107

Item Q.ty Reference Part Tech. Caracteristics Package Manufacturer


7676B–8051–08/07

Appendix C: Board Schematics


7676B–8051–08/07


Figure 4-2. AT89STK-11 Schematics (1 of 4)

P3

.3/I

NT

1P

3.2

/IN

T0

Vcc

Vcc

Vcc

Vcc

Vcc

/EA

P3

_2

/IN

T0

/AL

E

P3

_3

/IN

T1

Default State : Closed

R2

1K

R2

1K

CD

5

10

0n

CD

5

10

0n

R3

82

0R

38

20

R8

10

KR

81

0K

Vin

Vo

ut

ADJ

U2

LM

31

7E

MP

/SO

T2

23

SO

T2

23

U2

LM

31

7E

MP

/SO

T2

23

SO

T2

23

R4

10

K

R4

10

K

1

TP

1V

cc T

PT

P1

Vcc T

P

D2

AL

E

D2

AL

E

1

TP

3T

P3

1 2

J1

SIP

2 S

OC

KE

T

Alte

rna

te P

ow

er

Su

pp

ly

J1

SIP

2 S

OC

KE

T

Alte

rna

te P

ow

er

Su

pp

ly

1

3

2

4-

+

U1

DF

00

5S

-+

U1

DF

00

5S

1

TP

2G

ND

TP

TP

2G

ND

TP

SW

3

INT

1

SW

3

INT

1S

W2

INT

0

SW

2

INT

0C

D3

10

0n

CD

3

10

0n

SP

1S

P1

R9

10

KR

91

0K

D1

Po

we

r

D1

Po

we

r

R1

27

0R

12

70

R5

1K

R5

1K

CD

1

10

0n

CD

1

10

0n

3 2 1

J2

CO

NN

EC

TO

R J

AC

K P

WR

Po

we

r S

up

ply

J2

CO

NN

EC

TO

R J

AC

K P

WR

Po

we

r S

up

ply

C1

1µ

FC

11

µF


7676B–8051–08/07



Vss

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

P1

.1/T

2E

X/S

SP

1.5

/CE

X2

/MIS

O

P1

.7/C

EX

4/M

OS

IP

1.6

/CE

X3

/SC

K

P0

_0

P0

_2

P0

_4

P0

_6

P0

_1

P0

_3

P0

_5

P0

_7

P2

_6

P2

_0

P2

_2

P2

_4

P2

_1

P2

_3

P2

_5

P2

_7

LED_0

LED_1

LED_2

LED_3

LED_4

LED_5

LED_6

LED_7

PB

_0

PB

_1

PB

_2

PB

_3

LE

D_

6

LE

D_

1L

ED

_3

LE

D_

5L

ED

_7

LE

D_

0L

ED

_2

LE

D_

4

PB

_2

PB

_0

PB

_1

PB

_3

TW

I_h

ard

_scl

TW

I_h

ard

_sd

a

OC

D_

Rx

OC

D_

Tx

/PS

EN

RS

T

Port P0

Port P2

LEDs

Buttons

OCD

TWI

C1

11

00

nC

11

10

0n

R1

9

1K

R1

9

1K

R1

01

0k

R1

01

0k

C5

10

0n

C5

10

0n

D6

D6

2 4 6 8 10

1 3 5 7 9

J5

HE

AD

ER

5X

2

J5

HE

AD

ER

5X

2

C6

10

0n

C6

10

0n

246

135

J4

HE

AD

ER

3X

2

J4

HE

AD

ER

3X

2

R2

0

1K

R2

0

1K

D3

D3

C2

10

0n

C2

10

0n

D7

D7

D1

0D

10

SW

7S

W7

R2

1

1K

R2

1

1K

2 4 6 8 10

1 3 5 7 9

J1

0

HE

AD

ER

5X

2

J1

0

HE

AD

ER

5X

2

D5

D5

R1

6

1K

R1

6

1K

R1

5

1K

R1

5

1K

2 4 6 8 10

1 3 5 7 9

J6

HE

AD

ER

5X

2

J6

HE

AD

ER

5X

2

R1

4

1K

R1

4

1K

C9

10

0n

C9

10

0n

R1

31

0k

R1

31

0k

SW

6S

W6

C7

10

0n

C7

10

0n

SW

5S

W5

1 2 3 4

J9

SIP

4

J9

SIP

4

C8

10

0n

C8

10

0n

C1

01

00

nC

10

10

0n

D9

D9

C4

10

0n

C4

10

0n

D8

D8

C3

10

0n

C3

10

0n

C1

21

00

nC

12

10

0n

2 4 6

1 3 5

J8

HE

AD

ER

3X

2

J8

HE

AD

ER

3X

2

R1

11

0k

R1

11

0k

R1

8

1K

R1

8

1K

R1

7

1K

R1

7

1K

SW

4S

W4

R1

21

0k

R1

21

0k

1 2 3 4 5 6

J7

SP

I M

ale

J7

SP

I M

ale

D4

D4


7676B–8051–08/07



XT

AL2

XT

AL1

Vcc

Vcc_cpu

Vcc_cpu

Vcc

Vcc

Vcc

P0_0

P0_1

P0_2

P0_3

P0_4

P0_5

P0_6

P0_7

P1.0

/T2

P1.1

/T2E

X/S

SP

1.2

/EC

IP

1.3

/CE

X0

P1.4

/CE

X1

P1.6

/CE

X3/S

CK

P1.7

/CE

X4/M

OS

I

P2_0

P2_1

P2_2

P2_3

P2_4

P2_5

P2_6

P2_7

P3_0/R

xD

P3_1/T

xD

P3_2/IN

T0

P3_3/IN

T1

P3_4

P3_5

P3_6

P3_7

/ALE

/PS

EN

/EA

RS

TT

WI_

hard

_sda

TW

I_hard

_scl

P1.5

/CE

X2/M

ISO

OC

D_R

x

OC

D_T

x

XT

AL1

XT

AL2

P0_0

P0_1

P0_2

P0_3

P0_4

P0_5

P0_6

P0_7

TW

I_hard

_scl

TW

I_hard

_sda

/EA

XT

AL1

XT

AL2

/ALE

P0_0

P0_1

P0_2

P0_3

P0_4

P0_5

P0_6

P0_7

OC

D_R

xO

CD

_T

x

RS

T

P1.0

/T2

P1.1

/T2E

X/S

SP

1.2

/EC

IP

1.3

/CE

X0

P1.4

/CE

X1

P1.5

/CE

X2/M

ISO

P1.6

/CE

X3/S

CK

P1.7

/CE

X4/M

OS

I

/PS

EN

P3_0/R

xD

P3_1/T

xD

P3_2/IN

T0

P3_3/IN

T1

P3_4

P3_5

P3_6

P3_7

PB

_1

PB

_0

PB

_3

PB

_2

LE

D_6

LE

D_1

LE

D_3

LE

D_5

LE

D_7

P2_0

P2_1

P2_2

P2_3

P2_4

P2_5

P2_6

P2_7

LE

D_0

LE

D_2

LE

D_4

Expansion Connector

R105

4.7

KR

105

4.7

KR

104

4.7

KR

104

4.7

K

Y1

Y1

R103

4.7

KR

103

4.7

K

SP

6S

P6

RS

T10

XT

AL2

20

XT

AL1

21

GND22

PS

EN

32

ALE

/PR

OG

33

EA

/VP

P35

VCC44

P1.0

2

P1.1

3

P1.2

4

P1.3

5

P1.4

6

P1.5

7

P1.6

8

P1.7

9

P2.0

/A8

24

P2.1

/A9

25

P2.2

/A10

26

P2.3

/A11

27

P2.4

/A12

28

P2.5

/A13

29

P2.6

/A14

30

P2.7

/A15

31

P3.0

/RX

D11

P3.1

/TX

D13

P3.2

/IN

T0

14

P3.3

/IN

T1

15

P3.4

/T0

16

P3.5

/T1

17

P3.6

/WR

18

P3.7

/RD

19

P0.0

/AD

043

P0.1

/AD

142

P0.2

/AD

241

P0.3

/AD

340

P0.4

/AD

439

P0.5

/AD

538

P0.6

/AD

637

P0.7

/AD

736

Rx_O

CD

1

RxD

_1/S

DA

12

TxD

_1/S

CL

34

Tx_OCD23

U6

AT

8xC

51_P

LC

C44

U6

AT

8xC

51_P

LC

C44

R102

4.7

KR

102

4.7

K

SP

2S

P2

R101

4.7

KR

101

4.7

K

C13

100n

C13

100n

R100

4.7

KR

100

4.7

K

SP

12

SP

12S

P11

SP

11

CD

6

100n

CD

6

100n

CD

7

100n

CD

7

100n

C15

22pF

C15

22pF

C14

22pF

C14

22pF

2 4 6 8 10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

1 3 5 7 911

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

J3

HE

AD

ER

31x2/S

M

J3

HE

AD

ER

31x2/S

M

SP

8S

P8

R107

4.7

KR

107

4.7

K

SP

10

SP

10S

P7

SP

7

R106

4.7

KR

106

4.7

K

SP

9S

P9

SP

5S

P5


7676B–8051–08/07



DS

R

Vcc

RT

SR

x_P

C

CT

S

CT

SR

TS

Tx_M

CU

DT

R

Tx_P

C

Rx_M

CU

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

P3_0/R

xD

P3_1/T

xD

/PS

EN

RS

T

"grain de café"

"grain de café"

Vcc

SP

4S

P4

C26

100n

C26

100n

CD

2

100n

CD

2

100n

C16

100n

C16

100n

C23

100n

C23

100n

SW

1

RE

SE

T

SW

1

RE

SE

T

R22

1K

R22

1K

23

141

7

U9A

74H

C125/S

O_5

U9A

74H

C125/S

O_5

SP

3S

P3

C21

100n

C21

100n

12

J11 R

TS

J11 R

TS

R24

1K

R24

1K

C22

100n

C22

100n

SW

8

ISP

SW

8

ISP

R23

1K

R23

1K

C18

100n

C18

100n

C17

100n

C17

100n

C25

100n

C25

100n

56

144

7

U9B

74H

C125/S

O_5

U9B

74H

C125/S

O_5

12

J13

J13

C20

100n

C20

100n

C1+

1

C1-

3

C2+

4

C2-

5

VCC16

GND15

V+

2

V-

6

R1O

UT

12

R2O

UT

9

T1IN

11

T2IN

10

R1IN

13

R2IN

8

T1O

UT

14

T2O

UT

7

U8

SIP

EX

-SP

3232E

CA

U8

SIP

EX

-SP

3232E

CA

12

J12 D

TR

J12 D

TR

D11

Gre

en L

ed

Rx L

ED

D11

Gre

en L

ed

Rx L

ED

R6

10K

R6

10K

C24

100n

C24

100n

C1+

1

C1-

3

C2+

4

C2-

5

VCC16

GND15

V+

2

V-

6

R1O

UT

12

R2O

UT

9

T1IN

11

T2IN

10

R1IN

13

R2IN

8

T1O

UT

14

T2O

UT

7

U7

SIP

EX

-SP

3232E

CA

U7

SIP

EX

-SP

3232E

CA

C19

100n

C19

100n

594837261

P1

SU

B-D

9 F

EM

ALE

RS

232

P1

SU

B-D

9 F

EM

ALE

RS

232

D12

Gre

en L

ed

Tx L

ED

D12

Gre

en L

ed

Tx L

ED


7676B–8051–08/07

Appendix D: References/Acronyms

4.2 References � AT89C51RD2/ID2/ED2/RB2/RC2/IC2/RE2/IE2 and AT89C51RD3/IE3 Product

Datasheet.

4.3 Acronyms � FLIP: FLexible In-system Programming

� ISP: In-System programming


7676B–8051–08/07

Appendix D: References/Acronyms

Document Revision

History

Changes from 7676A to 7676B

1. Section 1.2, page 1-2 : AT89C51RE3/ID3/IE2 not supported.

2. Section 2.3.1.2, page 2-5 : SP1 must be kept closed.

3. Section 3.1.1, page 3-11 : SW1 switch and EA jumper do not exist.

4. Appendix A, page 4-13 : the given board layout was wrong. Replaced by the

right one.

5. Appendix C, page 4-19 : there was an error on page 4 of the schematic.

Pin5 of U9B is now connected to Vcc instead of GND.


7676B–8051–08/07

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Hardware User Guide - Farnell

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