Greetings from Georgia Tech PRC - MEPTEC.ORGmeptec.org/Resources/1 - Tummala.pdf · Fundamentals of...

Prof. Rao R. Tummala Joseph M. Pettit Endowed Chair

Professor in ECE & MSEDirector, 3D Microsystems Packaging Research Center

Georgia Institute of Technology – Atlanta, GA [email protected]

System Scaling – A New Fundamental Electronics Frontier Technology

MEPTEC - November 10, 2015

Greetings fromGeorgia Tech PRC

1 | MEPTEC 2015 Prof. Rao R. Tummala

Executive Summary

System Scaling is a New Strategic Frontier

Fundamentals of System Scaling Benefits all Systems

Ultra-thin & Large Panel Glass Seems Best as System Scaling Platform

Panel Glass Superior over Si and Organic Interposers

• Over Si for cost & performance

• Over Organic for I/Os, bandwidth and warpage

Georgia Tech and its Industry Partners Demonstrated Panel Glass, Almost Ready for Mfg.

Panel Glass can be Chip-first or Chip-last Platform

System Scaling Leads to 3D System Package Architecture with TSV-like Vias at System Level


Outline

1. What is System Scaling and Why?

2. Fundamentals of System Scaling

3. Applications of System Scaling:

Smartphones

Automotive Electronics

4. Georgia Tech’s Vision, Strategy and Industry Consortium in Automotive Electronics

5. Summary


Outline



3. Application to Automotive Electronics


5. Summary


What is System Scaling and Why?

1. What is System Scaling?

2. Why System Scaling?

To achieve highest performance & functional density in smallest size at lowest cost and highest reliability at system level

Logic

Memory

RF ICs

Analog

Power

Etc.

Transistor- Based System- Based

Substrates

Boards

Passive Components

Thermal

Interconnections

Batteries


System Scaling Addresses Changing Electronics Landscape

Systems

Emerging trend to small to ultra-small systems with heterogeneous functionality

New era of automotive electronics, ultimate heterogeneous systems

ICs

IC integration beyond 14nm: No cost reduction

SOC split necessary in future

Device Pkg.

Bulky, costly, and low I/Os and high thickness

Trend to fanout pkg.

Systems Pkg.

Bulky, costly, and low I/Os and high thickness

No systematic roadmap approach


IC and System Packaging Evolution

Panel Packaging

Wafer Packaging

Package on BoardInterposer on Package

on Board???

Systems Packaging

Plastic Ceramic Organic ???

WLP WLFO Panel Fan Out ???


An example of System Scaling Need:

Smartphones

Wireless Electronics

Sensor Electronics

Camera Electronics

4G-5G RF / mm-Wave

All are Applicable to

Automotive Electronics

Digital Electronics

MEMS and Sensors

Analog Electronics

Power Electronics


An Example of Large System Need:

New Era Automotive Electronics

Ultimate Heterogeneous System Scaling Opportunity

• Smartphone Electronics

Digital, RF, Power, MEMS and sensors, camera, audio and videoAnd

• High energy-density batteries

• High-power electronics

• High-frequency electronics

• High-temperature electronics

• Sensor electronics

• Radar electronics

• Laser electronics


Gap in System Scaling vs.Transistor Scaling

Courtesy: S.S. Iyer, IBM

No

de d

imen

sio

n (

nm

)

100

10,000

1,000

0

bu

mp

pit

ch

(um

)

100

1,000

10

Gap

System Scaling (I/O Pitch)

Transistor Scaling (Node)

Year1970 20001980 1990 20101960 2020


Outline





5. Summary


Fundamentals of System Scaling

7. High Throughput

PanelMfg.

5. Balanced Fine-pitch

RDL4. Ultra-low

LossSystem

Materials

2. Ultra-shortTSV-like

Interconnects

6. High-temp & High-power

Cu-CuInterconnects

1. Ultra-thin High-temp. Low CTE

Substrates

3. High HeatTransfer

System Scaling


What is System Scaling Platform?Ultra-thin Panel Glass with Ultra-fine Pitch TPV & RDL

Good Fair Poor

Ideal Properties

Materials

Glass SC Si Organic Metal CeramicPoly SiCharacteristic

Electrical

Physical

Thermal

Mechanical

Chemical

TPV and RDL Cost

Reliability

Cost/mm2

High resistivity Low loss and low k

Smooth surface finish Large area availability Ultra thin

High Conductivity

High strength & modulus Low warpage

Resistance to process chemicals

Low cost Via formation and metallization

CTE matched to Si and PWB

At 25µm I/O pitch


Two Platform Approaches

Chip-Last

Chip-First


Why Panel Fan Out at GT?

Challenges in Fan Out

• Cost

• Board-level reliability

• Molding compound-driven issues

Ground rules and pitch

Package thickness

Warpage

Dimensional stability

Thermal & repairability

1st Gen

Wafer Fan Out

2nd Gen

Organic Panel Fan Out

3rd Gen R&D

Inorganic Panel Fan Out


Objectives of GPF GT Program

Improved Ground Rules and Pitch

Ultra-thin Without Grinding

Embedding for Low Cost Components

Chip Last (Chip Exposed) for Expensive Components

High-temp, Thermally Stable Package

Panel-scalable for Low Cost

Improved Board-level Reliability


Two Approaches to Glass Panel Fan Out

Chip First for Lower Profile & Bump-less Structure without molding compound

Glass

Via Landing


Chip-Last For Higher Value Chips to Prevent Die Loss

Glass Glass

* Patent Pending

uBump or bumpless Bonding


Through Vias like TSVsHigh Density on Ultra-thin Large Panels Leading to Low Cost

Demonstrated >1000 TCTReliability of Cu-Filled TPVs

60

70

80

90

100

110

120

initia

l

afte

r reflo

w

332

Cyc

501

Cyc

104

4 C

yc

200

5 C

yc

Sputtered Seed Direct Metallizationof TPV in Glass by Asahi Discharge

and Corning Methods

30µm DiaTPV in 100µmThin Glassby Corning

2µm Cu Wiring


Glass Panel is Almost Ready for Mfg.

Lower cost and higher performance than Si

Higher performance and Higher Bandwidth than Organic interposers


Shinko & Unimicron, GT Partners Demonstrate Glass Interposer, Ready for Mfg.

配線層がZ方向へ変動し、熱膨張を吸収

Memory Logic Si Chips

Glass Interposer

Laminated Substrate

Fully Assembled Glass Interposer

Large DieSmall Die

Small Die

Small Die

Small Die

35.0mm

35

.0m

m

Wiring: 2/2µm # of 2µm Lines : 6,600/unit # of TGVs : 18,945 Die Size

‒ Large : 24 x 20mm‒ Small : 5.5 x 7.3mm

Glass Interposer Design

2µm

Line

TGV

2µm Wirings

L/S : 2µm / 2µm # of 2µm Line : 6,600/unit

Source: Shinko


Glass Interposer from Glass Panel by Shinko

Shinko Panel – 250mm x 250mm


Component Scaling to Nanoscale @ GT PRC

Antennas

EMI Shields

PowerInductors & Capacitors

WirelessPower

Filters andDiplexers

Batteries

System Scaling to Nanoscale @GT PRC


GT PRC Industry Consortia


Outline





5. Summary


New Era of Automotive Electronics

Market: 80M Cars x $10K

Ultimate System Scaling Opportunity

• Smartphone Electronics

Digital, RF, Power, MEMS and sensors, camera, audio and video

• Automotive Electronics

High-density batteries

High power electronics

High-temperature electronics

Sensor electronics

Radar electronics

Laser Electronics

Photonics


Higher Levels of Driving Automation call for

an Increasing Number of Sensors

Source: Infineon


Semiconductor Enables Innovation to Achieve the

Necessary Function as well as the Required Cost

Source: Infineon


System Cost for Radar Have Been Significantly

Reduced with Innovative Packaging and SiGe/CMOS

Source: Infineon


Outline





5. Summary


GTAE StrategyAutonomous Driving

Electric Vehicles

Infotaiment(Apple CarPlay, Android)

Integrated functions

o Phone, music, maps,

messages, email

Major manufacturers committed to CarPlay

Connectivity and Safety

Dedicated short-range communications

(DSRC)

V2V and V2I

communications


Core Technologies of GTAE @GT

Design

Materials

Processes

I&A

Components

Devices


GTAE System Integration Strategy

C&C Modules

Sensor Modules

GaN and Sic Power Modules

System Reliability and Test

Mixed Function

Integration

High-temp Modules


Large-scale Industry Collaboration

Academic Faculty

Research Faculty

Graduate Students

Industry Partners

• On-campus Engineers

• Supply Chain• Manufacturers• Supply tools• Users

State-of-the-Art

Laboratories

Admin, Financial & Facilities

Maintenance


Graduate Students

Research Faculty

GT Faculty Expertise in GTAE

Academic Faculty

Admin, Financial & Facilities

Maintenance

Industry Partners

• On-campus Engineers

• Supply Chain• Developers• Users• Manufacturers

State-of-the-Art

Laboratories

Prof. AntoniouMaterials

Prof. BrandMEMS & Sensors

Dr. CasinoviMEMS & Sensors

Prof. TummalaSystem Integration

Prof. WolterMEMS & Sensors

Prof. WongMaterials

Prof. SaeedifardReliability

Prof. ShenDevices

Prof. SitaramanMechanical Design

Prof. GrahamThermal

Prof. HeskethSensors

Prof. JoshiThermal

Prof. LeamyReliability

Prof. OugazzadenMEMS & Sensors

Prof. ChangOptical

Prof. CresslerDevices

Prof. DivanPower

Prof. DupuisDevices

Prof. SwaminathanRF


Computing & Communication ElectronicsC1:Digital

Lowest power per unit of bandwidth

3D Glass Interposer Package

2.5D Glass Interposer Pkg

C2:PhotonicLow power, low loss optical

Minioptical

transceiver module

30 um

Low loss optical via

in glass

C3: mm-wave5G & RADAR Glass Module

Ring Resonators

for mm-wave

Low loss up to 50GHz & Beyond

C4: RFMulti-band 3D Packages

LTE modulewith High Q

passives

Board-level reliability

C5: IPDsEMI filters, built-in ESD

30um Thin Glass Panel Interposer

Ultra-Thin Low Loss Diplexers

C6: ShieldingIntegrated internal/external

Nano-Magnetic Ultra-Thin Shields


Sensing Electronics

S4: 3D Glass Package for Image Sensors

S1: Miniaturized wireless sensor interface S2: 3D Sensor Array Packaging

S3: Vibration Sensing, Monitoring


High-temperature Electronics

T1. High-temp/High-power Inductors & Capacitors

Capacitors and inductors and their integration in 3D IPDs to

handle 1 W/mm3 power at 200-250 C

T3. High-temp & High-power Interconnections

High-temp Cu interconnections; porous copper layers for low-

temp all-Cu interconnections

T4. High-Temperature Substrates

High-temperature substrates with glass core, build-up layers

and Cu interconnections

T2. High-temp Encapsulants & Mold Compounds

Meet thermal,

mechanical, electrical,

and humidity

requirements;

compatible with standard

molding manufacturing

infrastructure


High-power Electronics

P1: 3D Integrated Gate Driver Glass Package

Drivers and condition monitoring actives and passives integrated

on ultra-thin, high-density, high-temperature glass substrates

P2: Integrated Power Module (1-100kW)

Integrated power and microelectronics, low pkg inductance,

CTE-matched pkg, modular design, integrated cooling

P3:Self-Contained Liquid-cooled ModuleHAADFimage(white=Cu,Black=Carbon)

Local heat spreading from individual sources, heat dissipation at

module level with module co-design for thermal management

P4: Reliability Monitoring of Smart Power Modules

Reliability of high-temp., WBG fully-integrated power modules:

failure modes, reliability testing, and monitoring


Outline





5. Summary


Summary

System components and integration are fundamental barriers to all heterogeneous systems including small and automotive electronic systems

Georgia Tech sees a need for

• Systematic system scaling approach like ITRS

• With a System Scaling 3D architecture

Georgia Tech proposes system scaling to develop and integrate heterogeneous system functions: digital, RF, mm-wave, sensors, radar, laser and power components

It proposes 3D system package architecture with fine-pitch small TPVs for signal and large vias for power

Prof. Rao R. Tummala Joseph M. Pettit Endowed Chair

Professor in ECE & MSEDirector, 3D Microsystems Packaging Research Center

Georgia Institute of Technology – Atlanta, GA [email protected]

Thank [email protected]

+1 404 894-9097

Greetings from Georgia Tech PRC - MEPTEC.ORGmeptec.org/Resources/1 - Tummala.pdf · Fundamentals of...

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