Getting Started With Chips Cope

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    Getting Started with Chip Scope

    (reference

    http://www.xilinx.com/support/documentation/sw_manuals/chipscope_pro_sw_cores_10

    _1_ug029.pdf)

    This tutorial assumes that you have Verilog code with the ILA and ICON cores

    instantiated and have assigned ChipScopeData and ChipScopeTrig0 to useful signals.

    1. Run ChipScope Pro Analyzer

    http://www.xilinx.com/support/documentation/sw_manuals/chipscope_pro_sw_cores_10_1_ug029.pdfhttp://www.xilinx.com/support/documentation/sw_manuals/chipscope_pro_sw_cores_10_1_ug029.pdfhttp://www.xilinx.com/support/documentation/sw_manuals/chipscope_pro_sw_cores_10_1_ug029.pdfhttp://www.xilinx.com/support/documentation/sw_manuals/chipscope_pro_sw_cores_10_1_ug029.pdfhttp://www.xilinx.com/support/documentation/sw_manuals/chipscope_pro_sw_cores_10_1_ug029.pdf
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    2. Select JTAG Chain -> Xilinx Platform USB Cable

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    3. Click OK

    4. Click OK

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    5. Right click on DEV 2 and select Configure

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    6. Click on Select New File and browse to .bit file and click OK.

    7. Set the Trigger on Match Unit MO to XXXX_X111 to trigger on the 3 LSBs ofthe ChipScopeTrig0.

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    8. Collapse the DataPort vector into Busses by selecting a group of signals, rightclick on the signals and select Add to Bus -> New Bus.

    9. Right click on the Bus Name and select Rename.

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    10.Select the signals again, right click and select Remove From Viewer after the Busis created.

    11.When the Waveform window is formatted correctly, click the Run button.

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    12.When the trigger occurs the waveform will be displayed.

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    Generating ILA and ICON cores

    1. Run Project Navigator2. Right click on the project and select New Source3. Select IP (CORE Generator & Architecture Wizard)4. Set the File Name to icon5. Click Next.

    6. Select ICON (ChipScope ProIntegrated Controller) v1.03.a in theChipScope Pro folder in the Debug & Verification folder

    7. Click Next8. Click Finish

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    9. Click Finish10.Right click on the project and select New Source11.Select IP (CORE Generator & Architecture Wizard)12.Set the File Name to ila13.Click Next.

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    14.Select ILA (ChipScope ProIntegrated Logic Analyzer) v1.03.a in theChipScope Pro folder in the Debug & Verification folder

    15.Click Next16.Click Finish

    17.Uncheck Data Same As Trigger and set Data Port Width to 100 to store 512samples of 100 bits when a trigger occurs.

    18.Click Next

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    19.Set # Match Units to 2 and Match Type to Extended.20.Click Finish