Rev: 102108 DS33M30 Demo Kit

General Description

The DS33M30 demo kit (DK) is an easy-to-use evaluation board for the DS33M30 Ethernet-over-SONET/SDH devices. Maxim’s ChipView software is provided with the demo kit, giving point-and-click access to configuration and status registers from a Windows®-based_PC. On-board LEDs indicate receive loss-of-signal, queue overflow, Ethernet link, Tx/Rx, and interrupt status.

Windows is a registered trademark of Microsoft Corp.

Demo Kit Contents DS33M30DK Board CD Including:

ChipView Software DS33M30 Definition Files DS33M30DK Data Sheet DS33M30 Data Sheet

Features ♦ Demonstrates Key Functions of DS33M30

Ethernet Transport Chipset ♦ Includes Ethernet PHY Supporting Gigabit

Mode ♦ Includes Optical SFP Module for SONET/SDH

Interface ♦ Network Connectors, Transformers, and

Termination Ease Connectivity ♦ Careful Layout Provides Signal Integrity ♦ On-Board Processor and ChipView Software

Provide Point-and-Click Access to the DS33M30 Register Set

♦ All System Side and Overhead Pins are Easily Accessible for External Data Source/Sink

♦ Easy-to-Read Silkscreen Labels Identify the Signals Associated with All Connectors, Jumpers, and LEDs

Ordering Information PART TYPE

DS33M30DK Demo Kit for DS33M30

________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

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Table of Contents

1. BOARD FLOORPLAN .....................................................................................................................3

2. PCB ERRATA ..................................................................................................................................3

3. FILE LOCATIONS............................................................................................................................4

4. BASIC OPERATION ........................................................................................................................4 4.1 POWERING UP THE DEMO KIT..........................................................................................................4

4.1.1 General .................................................................................................................................................. 4 4.2 BASIC DS33M30 INITIALIZATION......................................................................................................4

4.2.1 Additional Configuration for DS33M30................................................................................................... 5 4.3 MONITOR AND CAPTURE ETHERNET TRAFFIC ...................................................................................5

5. JUMPERS AND CONNECTORS .....................................................................................................5

6. LINE-SIDE CONNECTIONS ............................................................................................................7

7. MICROCONTROLLER.....................................................................................................................7

8. POWER-SUPPLY CONNECTORS ..................................................................................................7

9. CONNECTING TO A COMPUTER ..................................................................................................7

10. INSTALLING AND RUNNING THE SOFTWARE............................................................................8

11. ADDRESS MAP ...............................................................................................................................9

12. ADDITIONAL INFORMATION/RESOURCES..................................................................................9 12.1 DS33M30 INFORMATION..............................................................................................................9 12.2 DS33M30DK INFORMATION.........................................................................................................9 12.3 TECHNICAL SUPPORT...................................................................................................................9

13. COMPONENT LIST........................................................................................................................10

14. SCHEMATICS ................................................................................................................................14

List of Figures Figure 1-1. DS33M30DK Board Floorplan................................................................................................................... 3 Figure 14-1. DS33M30 PCB Layout and Schematic Hierarchy Block Page Listing.................................................. 14

List of Tables Table 3-1. Definition and Configuration Files .............................................................................................................. 4 Table 5-1. Jumpers and Connectors ........................................................................................................................... 5 Table 11-1. Address Map ............................................................................................................................................ 9

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1. Board Floorplan

Figure 1-1. DS33M30DK Board Floorplan

2. PCB Errata DS33M30DK02A0 errata: ♦ Silkscreen for JP08 should designate the jumper function as Mac clock enable. Instead it designates the

function as MDIX enable ♦ Silkscreen for JP09 should designate the jumper function as MDIX enable. Instead it designates the function as

Mac clock enable. ♦ SRAM devices U06 and UB09 have been reworked to connect pin 1 and pin 2. On the PCB this appears as a

solder bridge between pin 1 and pin 2. This has been done to allow either a 128K*8 or a 512k*8 SDRAM to be installed and used as a 128K*8 device.

MICROPROCESSOR SFP LEDs

SERIAL PORT (57600-8-N-1)

CLOCKS AND CLOCK

SELECTION

USB

DRIVER CONFIGURATION

POWER (5V)

ETHERNET PHY AND

CONNECTOR

SONET OPTICAL SFP

SPI C

ONFI

G JU

MPER

S

ETHERNET CONFIGURATION

JUMPERS

DS33M30

DDR

COMM SELECT JUMPERs

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3. File Locations

This demo kit relies upon several supporting files, which are provided on the CD and are available as a zip file from the Maxim website www.maxim-ic.com/DS33M30DK. All locations are given relative to the directory in the CD/zip file called “_def_ini_DS33M30”.

Table 3-1. Definition and Configuration Files FILE NAME FILE USAGE

. \ _DS33M_GlobalSonet.def Top level definition file to select in ChipView’s register mode. This file will autoload the remaining definition files for the DS33M30 when parallel mode is used.

.\ds33M_BufferMan.def

.\ds33M_EncapDecap.def

.\ds33M_GlobalEth.def

.\ds33M_group.def

.\ds33M_LanSubscriber.def

.\DS33M_serial_1234.def

DS33M30 dependent files. These are called by _DS33M_GlobalSonet.def file, which is listed above.

.\m30_rx_tx_simulation 19mhz.mfg

.\m30_STS3c_bert_LoopTime.mfg

.\m30_STS3c_SONET_Loopback.mfg

.\_m30_STS3c_Ethernet_Loopback.mfg

.\_m30_STS3c_GFPNull_NoScramble.mfg

Files for manually configuring the DS33M30.

4. Basic Operation Note: In the following sections, software-related items are identified by bolding. Text in bold refers to items directly from the EV kit software. Text in bold and underlined refers to items from the Windows operating system.

4.1 Powering Up the Demo Kit • Connect PCB power jack to the wall adapter. • Connect RS-232 serial cable, or USB cable between the host PC and demo kit. • Verify that the jumpers are configured as described in Table 5-1.

4.1.1 General

• Upon power-up the power LEDs (DS13, DS12, DS14 green) will be lit. • PHY LINK LED should be lit if an Ethernet cable is connected. Note that there are three link LEDs, as the

DS33M30 is a Gigabit mode device. The L1000 LED should be litl the L100 and L10 LEDs should not be lit.

Following are several basic system initializations.

4.2 Basic DS33M30 Initialization This section covers two basic methods for configuring the DS33M30.

1. Device Driver-Based Configuration: (Note: The DS33M3001A0 board revision does not come loaded with device drivers.) If the pins J20.1+J20.2 are jumpered, the device driver autoconfigures the DS33M30 upon power-up. This enables traffic to pass from the Ethernet port to the serial port. Consult the device driver documentation for further details. To load the GUI interface for the device drivers, go to the ChipView register mode Tools menu and select Tools→Plugins→DS33M30/M33 Device Driver Demo.

2. Register-Based Configuration: EoS VC3 with two ports assigned to VCG1. a. Remove jumper J20.1+J20.2 to disable device drivers and reset the board. b. Launch ChipView.exe and select Register View.

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c. When prompted for a definition file, pick the file named _DS33M30_GlobalMicroport.def. Several additional definition files will load.

d. Go to the File menu and select File→Memory Config File→Load .MFG file. When prompted, select the file named _m30_STS3c_GFPNull_NoScramble.mfg.

4.2.1 Additional Configuration for DS33M30

• Using either a patch or crossover cable, connect the Ethernet connector to an ordinary PC or network test equipment. This should cause the link LED to turn on.

• Place a loopback connector at the SONET network side; the optical LOS LEDs should go out. • At this point any packets sent to the DS33M30 are echoed back. Incoming packets (i.e., ping) should

cause the Activity LED to blink. • Note that ChipView.exe display settings can be changed using the Options→Settings menu.

4.3 Monitor and Capture Ethernet Traffic • Although ping is mentioned, it is not the recommended frame source for testing. The ping command goes

through the computer’s TCPIP stack and sometimes is not sent out the PC’s network connector (i.e., if the PC’s ARP cache is out of date). Additionally, ping requires two PCs, as a Windows PC with only one adapter cannot ping itself (i.e., a local ping gets sent to ‘local host’ instead of out the connector). With that said, ping is still a valuable test once the prototyping stage is complete.

• Generation and capture of arbitrary (raw) packets can be accomplished using CommView. A full-featured demo is available at www.tamos.com/products/commview.

• Wireshark (formerly Ethereal) is a free packet capture utility. Download is available at www.wireshark.org. • Adding additional Ethernet ports to a PC is rather simple when a USB-to-Ethernet adapter is used. This

allows for end-to-end testing using a single PC. When using two adapters, the PC has a different IP address for each adapter. Test equipment allows selection of either adapter. Operating system-based network traffic is sent out the default adapter, which usually is the adapter that has recently had connection to a live network.

5. Jumpers and Connectors

Jumpers and connectors are listed in Table 5-1. They are listed in order of appearance on the PCB from left to right, top to bottom (as viewed with SONET connector on the left side of the board).

Table 5-1. Jumpers and Connectors SILKSCREEN REFERENCE FUNCTION BASIC

SETTING SCHEMATIC

PAGE DESCRIPTION

J03 Ethernet Connection Connected 14 Connect to Gigabit Ethernet source.

JP06 + JP03 Bias PHY Speed1 + Speed0

Jumper P2+3(high) P2+1 (low)

14

If auto negotiation is enabled this setting advertises capability for 1000 speeds. If auto negotiation is disabled then this setting forces 1000Mb mode.

JP04 Bias PHY ANEN Jumper P2+3 (high) 14 Jumper P2+3 to enable auto

negotiation.

JP05 Bias PHY Duplex Jumper P2+3 (high) 14 Jumper P2+3 to enable full duplex,

Jumper P1.2 to force half duplex.

JP09 Bias PHY MdixEn Jumper P2+1 (high) 14 P2+3 disables pair swap mode,

P2+1 enables pair swap mode.

JP08 Bias PHY MacClkEn Jumper P2+3 (low) 14

P2+3 PHY clock to mac output is disabled, P1+2 PHY clock to mac output is enabled. Mac clock only needs to be enabled in Gigabit mode.

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SILKSCREEN REFERENCE FUNCTION BASIC

SETTING SCHEMATIC

PAGE DESCRIPTION

DS05 LED activity -- 14 Flashes for PHY Tx-Rx activity.

DS06 DS07 DS09

LED link speed DS06 shold be lit (when linked) 14

LED to indicate link speed: 1000, 100, or 10Mbps. Only DS06 should be lit since the DS33M30 is GMII only.

J04 PHY test points -- 12

PHY test points. The connector pinout is compatible with existing PHY cards, but cannot be used with U04 on the board.

JP13 JP14 Runtime options NA 11 Currently the device drivers do not fit in flash, and are not loaded to the DK.

DS11 Status — 11 LED kit status, not lit.

J03 USB — 11 USB interface. See folder marked USBdrivers_CP210x for drivers.

J04 RS232 DB9 connector — 11 RS-232 DB-9 connector, operates

in ASCII mode at 57.6K,8,N,1.

JP18 JP19 Comm Port

Jumper P1+2 P1+2

11

Jumper pins 1+2 to select the RS232 transceiver. Jumper pins 2+3 to select the USB to serial converter.

SW01 Reset — 7 System Reset button.

J06 SPI All jumpered 6

SPI™ bias and data pins. Control by external processor is possible after removing CS, MISO, MOSI, and SCK

JP15 HIZ Jumper P2+3 6 Dut three-state control. J07 Software Debug — 11 ONcE EBDI.

JP07 Clock select Jumper P2+1 4 Clock selection for PHY and Ethernet side of DS33M30.

JP02 Clock select Jumper P1+2 4 Clad clock selection, Jumper P1+2 to drive with 19.44MHz. Jumper P2+3 to drive with 77.76MHz clock.

DS08 DS33M30 Int — 9 LED, lit when DS33M30 Interrupt is asserted.

J01 SFP test points Jumper P9+10 Test points for SFP module. DS01 SFP MOD0 — 2 Lit when a SFP module is installed. DS03 SFP TXDISABLE — 2 Lit when Tx is enabled.

DS02 SFP LOS — 2 Lit when fiber optic cable is removed.

J02 JP01 SFP LOS/M33 LOS Jumper 2

Jumper J02 to connect SFP LOS to DS33M30 LOS. If J02 is removed, then JP01 can be used to pull DS33M30 LOS high or low.

U01 SFP Installed 2 SFP module. J05 JTAG — 6 DS33M30 JTAG.

SPI is a trademark of Motorola, Inc.

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6. Line-Side Connections

The DS33M30DK has one optical port and one Ethernet port.

7. Microcontroller

The microcontroller has factory-installed firmware in on-chip nonvolatile memory. This firmware translates memory access requests from the RS-232 serial port into register accesses on the DS33M30 and the FPGAs.

8. Power-Supply Connectors

Connect a 5.0V wall adapter to the PCB power jack. LED DS1 provides indications that a 5.0V supply is connected properly. The board power supplies (3.3V, 2.5V, and 1.8V) are regulated to supply proper voltages to various circuits on the board.

9. Connecting to a Computer

Both USB and serial modes are supported.

To connect through a RS-232 serial port, set jumpers JP25 and JP26 jumpers to pins 1+2, identified in the silkscreen as RS232,PROCESSOR. Connect a standard DB-9 serial cable between the serial port on the DS33M30DK and an available serial port on the host computer. The host computer must be a Windows-based PC. Be sure the cable is a standard straight-through cable rather than a null-modem cable. Null-modem cables prevent proper operation.

To connect through USB, set jumpers JP25 and JP26 jumpers to pins 3+2, identified in the silkscreen as USB, PROCESSOR. Connect a USB cable between the DS33M30DK USB connector and the PC. The host computer must be a Windows-based PC, which should automatically recognize the device as a virtual com port and assign the device drivers. If drivers are not automatically assigned, direct the New Hardware wizard to the driver files on the CD in the folder marked USBdrivers_CP210x.

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10. Installing and Running the Software

ChipView is a general-purpose program that supports a number of Maxim demo kits. To install the ChipView software, run Chipview.msi from the disk included in the DS33M30DK box or from the zip file downloadable on our website at www.maxim-ic.com/DS33M30DK.

After installation, run the ChipView program with the DS33M30DK board powered up and connected to the PC. If the default installation options were used, one easy way to run ChipView is to click the Start button on the Windows toolbar and select Programs→ChipView→ChipView. In the opening screen, click the Register View button. Select the correct serial port in the Port Selection dialog box, then click OK.

Next, the Definition File Assignment window appears. This window has subwindows to select definition files for up to four separate boards on other Maxim evaluation platforms. In the active subwindow, select the _DS33M_GlobalSonet.def definition file from the list shown, or browse to find it in another directory. Press the Continue button.

After selecting the definition file, the main part of the ChipView window displays the DS33M30’s register map. To select a register, click on it in the register map. When a register is selected, the full name of the register and its bit map are displayed at the bottom of the ChipView window. Bits that are logic 0 are displayed in white, while bits that are logic 1 are displayed in green.

The ChipView software supports the following actions:

• Toggle a bit. Select the register in the register map and then click the bit in the bit map. • Write a register. Select the register, click the Write button, and enter the value to be written. • Write all registers. Click the Write All button and enter the value to be written. • Read a register. Select the register in the register map and click the Read button. • Read all registers. Click the Read All button.

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11. Address Map

SPI mode address space begins at 0x0.

Table 11-1. Address Map

OFFSET DEVICE DESCRIPTION 0X0000 DS33M30 DS33M30 registers

12. Additional Information/Resources

12.1 DS33M30 Information For more information about the DS33M30, refer to the DS33M30 data sheet at www.maxim-ic.com/DS33M30.

12.2 DS33M30DK Information For more information about the DS33M30DK, refer to the DS33M30DK Quick View page at www.maxim-ic.com/DS33M30DK.

12.3 Technical Support For additional technical support, submit your questions at www.maxim-ic.com/support.

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Rev: 102108 10 of 28

13. Component List DESIGNATION DESCRIPTION SUPPLIER PART

C01, C03, C05, C06, C09, C11, CB11, CB12, CB15, CB16, CB17, CB19, CB20, CB24, CB39, CB44, CB45, CB48, CB56, CB57, CB60, CB66, CB71, CB74, CB75,

CB88, CB97, CB101, CB112

L_0603 CERAM .1uF 16V 20% X7R AVX 0603YC104MAT

Component listing on next line, begins with C02

0603 CERAM 4.7uF 6.3V MULTILAYER Digi-Key ECJ-1VB0J475M

C02, C04, C07, CB05, CB07, CB18, CB21, CB22, CB25, CB31, CB32, CB33, CB35, CB38, CB42, CB43, CB46, CB47, CB49, CB50, CB51, CB53, CB55, CB61, CB62, CB63, CB64, CB67, CB68, CB70, CB72, CB73, CB76,

CB77, CB78, CB79, CB80, CB81, CB83, CB84, CB86, CB89, CB90, CB94, CB95, CB103, CB105, CB109, CB110, CB116, CB121

C08, C10, C12, CB04, CB08, CB09, CB10, CB14, CB30, CB40, CB65, CB85,

CB107

L_0603 CERAM .01uF 50V 10% X7R AVX 06035C103KAT

C1, C13, C14, C15, C16, C17, C18, CB120 , CB23, CB27, CB28, CB29,

CB41, CB87, CB98, CB106

1206 CERAM 10uF 10V 20% Panasonic ECJ-3YB1A106M

CB01, CB02, CB03, CB13, CB111 D CASE TANT 470uF 6.3V 20% KEM T491D477M006AS

CB06, CB26, CB34, CB36, CB37, CB52, CB54, CB58, CB59, CB69, CB82, CB91,

CB92, CB93, CB96, CB102, CB108, CB114, CB115

0603 CERAM .1uF 16V 10% Panasonic ECJ-1VB1C104K

CB104, CB117 L_1206 CERAM 1uF 16V 10% Panasonic ECJ-3YB1C105K

CB113 1206 CERAM 4.7uF 25V 10% X5R Panasonic ECJ-3YB1E475K

CB99, CB100, CB118, CB119 L_D CASE TANT 68uF 16V 20% Panasonic ECS-T1CD686R

DB01 SCHOTTKY DIODE, 1 AMP 40 VOLT

Internatioanl Rectifier 10BQ040

DS01, DS03, DS11 , DS04, DS12, DS14 L_LED, GREEN, SMD Panasonic LN1351C DS02, DS08, DS10 L_LED, RED, SMD Panasonic LN1251C

DS05, DS06, DS07, DS09 LED, GREEN/GREEN, SMD LUMEX 67-1362-1-ND

DS13 LED, RED/GREEN, SMD LITEON 160-1172-1-ND GND_TP01, GND_TP02, GND_TP03, GND_TP04, GND_TP05, GND_TP06,

GND_TPB01, GND_TPB02, GND_TPB03

STANDARD GROUND CLIP KEYSTONE 4954

H01, H02, H03, H04, H05, H08 KIT, 4-40 HARDWARE, .50 NYLON STANDOFF AND NYLON HEX-NUT

Labstock 4-40KIT4

J01 TERMINAL STRIP, 10 PIN, DUAL ROW, VERT Digi-Key S2012-05-ND

J02, JB01 100 MIL 2 POS JUMPER Labstock NA

J03 CONNECTOR, SINGLE LEVEL, GIGABIT RJ-45, 10 PIN

Halo Electronics HFJ11-1G02E

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J04 PLUG, SMD, 50 PIN, 2 ROW VERTICAL Samtec SFM-125-L2-S-D-LC

J05 L_TERMINAL STRIP, 10 PIN, DUAL ROW, VERT Samtec TSW-105-07-T-D

J06 HEADER, 14 PIN, DUAL ROW, VERT Samtec HDR-TSW-107-14-T-

D

J07 100 MIL 2*7 POS JUMPER Labstock NA

J08 L_CONN, DB9 RA, LONG CASE AMP 747459-1

J09 TYPE B SINGLE RT ANGLE, BLACK Digi-Key WM17108-ND

JB02

CONN 2.1MM/5.5MM PWRJACK RT ANGLE PCB, closed frame, high current 24VDC@5A also requires 5V ACDC adapter INPUT 100-240VAC 50-60HZ 0.6A OUTPUT DC 5V 2.6A. PN DMS050260-P5P-SZ. MODEL 3Z-161WP05

CUI, INC PJ-002AH

JP01, JP02, JP03, JP04, JP05, JP06, JP07, JP08, JP09, JP13, JP14, JP15,

JP18, JP19 100 MIL 3 POS JUMPER Labstock NA

L01, L02 1uH ±10% 0805 Multilayer Ceramic 400 mA TDK GLF2012T1R0M

L1 FERRITE 3A 100 OHM AT 100 MHZ 1206 SMD Steward HI1206N101R-10

R01, R03, R04, RB19 RES 0603 0.0 Ohm 1/16W 5% Panasonic ERJ-3GEY0R00V

R02 RES 0603 1.0M Ohm 1/16W 5% Panasonic ERJ-3GEYJ105V

RB01, RB18 , RB03, RB20, RB22 RES 0603 330 Ohm 1/16W 5% Panasonic ERJ-3GEYJ331V

RB02, RB04, RB12, RB13, RB14 RES 0603 30 Ohm 1/16W 5% Panasonic ERJ-3GEYJ300V

RB05 RES 0603 2.2K Ohm 1/16W 5% Panasonic ERJ-3GEYJ222V

RB06, RB07, RB16 RES 0603 2.0K Ohm 1/16W 5% Panasonic ERJ-3GEYJ202V

RB08 RES 0603 100 Ohm 1/16W 1% Panasonic ERJ-3EKF1000V

RB09, RB11 RES 0603 1.00K Ohm 1/16W 1% Panasonic ERJ-3EKF1001V

RB15 RES 0603 9.76K Ohm 1/16W 1% Panasonic ERJ-3EKF9761V

RB17, RB21 L_RES 0603 10K Ohm 1/16W 5% Panasonic ERJ-3GEYJ103V

RP01, RP02, RP03, RP04, RP05, RP06, RP07, RP08, RPB12

RESISTOR, 4 PACK, 30 OHM 5PCT QUAD 0603 Panasonic EXB-V8V300JX

RPB01, RPB07, RPB20, RPB24 RESISTOR, 4 PACK, 330 OHM 5PCT QUAD 0603 Panasonic EXB-V8V331JX

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RPB02, RPB08, RPB11, RPB17, RPB19 RESISTOR, 4 PACK, 1K OHM 5PCT QUAD 0603 Panasonic EXB-V8V102JX

RPB03, RPB04, RPB13, RPB15, RPB18, RPB21, RPB22, RPB23, RPB25, RPB26,

RPB27, RPB28, RPB29

RESISTOR, 4 PACK, 10K OHM 5PCT QUAD 0603 Panasonic EXB-V8V103JX

RPB05, RPB06, RPB14 RESISTOR, 4 PACK, 2.2K OHM 5PCT QUAD 0603 Panasonic EXB-V8V222JX

RPB09, RPB10 RESISTOR, 4 PACK, 50 OHM 2PCT QUAD 0603 KOA CN1J4TTD500G

SW01 SWITCH MOM 4PIN SINGLE POLE Panasonic EVQPAE04M

TP01 TEST POINT, 1 PLATED HOLE, DO NOT STUFF Labstock NA

U01 SFP host / receptacle PARTS_KIT SFP_HOST-TYCO

U02

GIG PHYTER V, 10/100/1000 ETHERNET PHYSICAL LAYER, 128 PIN QFP

National Semiconductor DP83865DVH

U03 ETHERNET EXTENSION DEVICE

Dallas Semiconductor DS33M30

U04

DOUBLE DATA RATE (DDR) SDRAM 2-2-2 TIMING 256MBITX16 TSSOP

MICRON MT46V16M16TG-75E

U05 MMC2107 PROCESSOR Motorola MMC2107

U06, UB09 CYPRESS SRAM, LAB STOCK Labstock NA

U07 IC, SINGLE-CHIP USB TO UART BRIDGE, 28 PIN QFN

SIL CP2101

U1 SPI SERIAL EEPROM 8M 8 PIN SOIC 3.3V Atmel AT26DF081A

UB01 IC, LINEAR REG 1.5W, 2.5V or Adj, 1A, 16TSSOP-EP

Maxim MAX1793EUE-25

UB02 IC, LINEAR REG 1.5W, 1.8V or Adj, 1A, 16TSSOP-EP

Maxim MAX1793EUE-18

UB03

MICROPROCESSOR VOLTAGE MONITOR, 3.08V RESET, 4PIN SOT143

Maxim MAX811TEUS-T

UB04, UB05, UB07 IC, LINEAR REG 1.5W, 3.3V or Adj, 1A, 16TSSOP-EP

Maxim MAX1793EUE-33

UB06 HIGH SPEED BUFFER FAIRCHILD NC7SZ86

UB08 Dual RS-232 transceivers with 3.3V/5V internal capacitors

MAXIM MAX3233E

XB01 XTAL LOW PROFILE 8.0MHZ ECL EC1-8.000M

YB01 OSCILLATOR, CRYSTAL CLOCK, 3.3V - 19.44 MHZ SaRonix SOCKET+NTH089A3-

19.44

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YB02

SOCKETED OSCILLATOR, CRYSTAL CLOCK, 3.3V - 25.000 MHZ

SaRonix NTH089AA3-25.000+SOCKET

YB03 OSCILLATOR, CRYSTAL CLOCK, 3.3V - 77.76 MHZ SaRonix SOCKET+NTH089A3-

77.7600

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Rev: 102108 14 of 28 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

Maxim Integrated Products , 120 San Gabrie l Dr ive , Sunnyvale , CA 94086 408-737-7600 © 2008 Maxim Integrated Products

14. Schematics The DS33M30DK schematics are featured in the following pages. The schematic contains three hierarchal blocks: Microcontroller, Ethernet PHY, and Ethernet Test Points. All signals inside a hierarchy block are local, with exception for VCC and ground. In-port and out-port connectors are used to allow signals inside a hierarchy block to become accessible as pins on the hierarchy blocks symbol. From here blocks are wired together as if they were ordinary components. Figure 14-1 shows the system diagram in terms of hierarchal blocks with schematic page numbers given for each functional block.

Figure 14-1. DS33M30 PCB Layout and Schematic Hierarchy Block Page Listing

µP BLOCK

PAGE 1 SYMBOL

SCHEMATIC PAGES 9-11

DS33M30

SCHEMATIC PAGES 1-8

POWER SUPPLY

SCHEMATIC PAGES 7-8

ETHERNET PHY PAGE 4 SYMBOL

SCHEMATIC

PAGES 3-4, 12, 13-15

SONET SFP PAGE 2

DDR PAGE 5

CLOCKS AND CONFIGURATION PAGES 4,6

is a registered trademark of Maxim Integrated Products.

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(BLO

CK

)

PO

WE

R.

P.7

-8

SE

RD

ES

.P

.2E

TH

ER

NE

T.

P.3

-4,1

2,1

3-1

5

BLO

CK

NA

ME

:_rc

_to

p_dn_.

SP

I_M

ISO

SP

I_S

CK

M30_IN

T

DU

T_JT

RS

T_N

RE

SE

T_S

YS

PH

Y_IN

T

SP

I_M

OS

I

DU

T_M

T3

RP

B1

5

RP

B1

3

U03

DU

T_

JT

DI

DU

T_T

ES

T_E

N

DU

T_M

T0

DU

T_

MT

1

DU

T_M

T4

M3

0_

CS

M30_IN

T

D5_S

PI_

SW

AP

D7_S

PI_

CP

OL

D6_S

PI_

CP

HA

DU

T_T

ES

T_E

N

DU

T_M

T4

DU

T_M

T3

DU

T_M

T0

DU

T_

MT

110K

10K

DU

T_JT

DO

DU

T_H

IZ_N

RE

SE

T_

SY

S

D2_S

PI_

CLK

D1_S

PI_

MO

SI

D0_S

PI_

MIS

OD

UT

_C

LA

DC

LK

DU

T_JT

MS

DU

T_JT

CLK

SP

I_S

S

L12J8L1K6K7

J5

H7

M1J11

J2M12

J4

J9H4

H9K4K9K5K8

H1

D12J7

D2J6

H5H8

G1

H6

F2

E1

H2

G2

F1

A1

C2

H3

G3

D1

1

C1

D1

B1

K1

1

L1

1

M1

1

G10

H1

1

K1

0

J10

H1

0

4

8 7 6 5

21 3 4

8 7 6 5

21 3

6D

3

6D

3

6A

7

6A

8

9B

7v

6D

3

9B

6v

6D

3

9B

7v

7B

31B

14B

49B

6v

1B1

6C

79A

7v

4B

4

9B

6v

6A

56A

8

1B

4

6A

7

1B1

1B

4

1B

4

1B

4

6D

2

1B

86C

79A

7v

6D

2

6D

2

6D

2

1B

7

1C

7

1C

7

1C

7

1C

7

6C

7

7B

31A

84B

49B

6v

6D

2

6D

2

6D

24C

6 6A

76A

8

6A

76A

8

PA

GE

:

DA

TE

:T

ITLE

:

EN

GIN

EE

R:

AA

BB

CC

DD

112 2

334 4

556 6

778 8

V3_3

V3_3

DS

33M

30

CS

*

SD

O

SC

LK

SD

I

INT

*

SP

ISW

AP

CP

OL

CP

HA

HIZ

*

TE

ST

*

RS

T*

RE

FC

LK

MT

4

MT

3

MT

0

MT

1

JT

RS

T*

JT

MS

JT

CLK

JT

DI

JT

DO

VSS

CVSS2

VSSVSS

VSSVSS

VSSVSS

CVDD2_1.8V

VDD_1.8VVDD_1.8VVDD_1.8VVDD_1.8VVDD_1.8V

VDD_1.8VVDD_1.8V

VDD_1.8V

VDD_3.3VVDD_3.3V

VDD_3.3VVDD_3.3V

VSS

VSS

VSSVSSVSSVSSVSS

V3_3

V1_8

_m

otp

rocre

scard

_dn

HIE

RA

RC

HY

BLO

CK

MIC

RO

PR

OC

ES

SO

R

INT

3

RE

SE

T_IN

A_D

UT

_<

12..0>

INT

4

CS

_X

3

CS

_X

4

CS

_X

5

RD

_D

UT

WR

_D

UT

D_D

UT

<7..0>

INT

5

INT

2

CS

_X

2

CS

_X

1

SP

I_C

S

SP

I_S

CK

SP

I_M

OS

I

SP

I_M

ISO

MIS

C_IO

<8..1>

MIS

C_IO

<9>

MIS

C_IO

<10>

MIS

C_IO

<11>

MIS

C_IO

<12>

PU

LLU

PS

FO

RO

PE

ND

RA

INP

INS

SE

RV

ES

AS

DE

VIC

ED

ET

EC

TM

OD

0IS

GR

OU

ND

ED

INT

HE

SF

P

.1UF

4.7UF

1U

H

4.7UF

4.7UF

.1UF

1U

H

330

100

GR

EE

N

GR

EE

N

RE

D

1K

10K 10K

JM

P_

3

JM

P_

2

SF

P_I2

C_S

DA

SF

P_D

EV

_D

ET

EC

T

SF

P_I2

C_C

LK

SF

P_I2

C_S

DA

SF

P_R

AT

E

SF

P_T

XD

ISA

BLE

SF

P_D

EV

_D

ET

EC

TS

FP

_LO

S

SF

P_V

CC

TS

FP

_V

CC

R

SF

P_T

X_F

AU

LT

SF

P_T

XD

ISA

BLE

SF

P_M

OD

2

SF

P_M

OD

0

SF

P_

MO

D1

SF

P_R

AT

E

SF

P_LO

S

SF

P_V

CC

R

SF

P_V

CC

T

DU

T_S

FP

_R

DP

SF

P_M

OD

0

DU

T_LO

S

DU

T_S

FP

_R

DN

DU

T_S

FP

_T

DN

DU

T_S

FP

_T

DP

SF

P_M

OD

0

SF

P_M

OD

2

SF

P_T

X_F

AU

LT

SF

P_

MO

D1

SF

P_LO

S

SF

P_R

AT

E

SF

P_LO

SD

UT

_LO

S

CB19

CB21

J01

L0

2

CB18

CB22

CB15

L01

U01

RP

B0

1

RB

08

DS

01

DS

03

DS

02

U03

RP

B0

2

RP

B0

4

RP

B0

3

JP

01

J02

SF

P_T

X_F

AU

LT

SF

P_I2

C_C

LK

SF

P_LO

S

SF

P_T

XD

ISA

BLE

03/1

0/2

008

DS

33M

30D

K02A

0

ST

EV

ES

CU

LLY

2/1

4(T

OT

AL)

2/8

(BLO

CK

)

CR

-2:

@\_

RC

_LIB

\.\_

RC

_T

OP

_D

N_\(

SC

H_1):

PA

GE

2

SE

RD

ES

.P

.2

BLO

CK

NA

ME

:_rc

_to

p_dn_.

1 2 3 4 65 7 8 9 10

1920 1718 141516 13 12 11

293130

2827262524232221

4

8 7 6 5

21 3

12

12

12

H1

2

G12

E11

G11

F12

K12

J12

F10

F11

E12

4

8 7 6 5

21 3

4

8 7 6 5

21 3

4

8 7 6 5

21 3

13

22

1

65

4

973

108

12

2A

3

2A

3

2A

3

2C

2

2B

22A

6

2C

22A

52B

2

2A

62C

2

2B

12B

22A

82A

62A

5

2B

52B

5

2A

62A

3

2A

52A

3

2A

6

2A

62A

5

2A

6

2A

62A

1

2A

82A

62A

52A

1

2D

3

2D

2

2C

22A

3

2A

82A

6

2A

8

2A

5

2C

3

2C

22A

3

2B

3

2B

22A

82A

52A

1

2A

1

2B

2

2A

6

2A

52A

1

2B

3

2B

3 2B

2

2B

2

2A

6

2A

1

PA

GE

:

DA

TE

:T

ITLE

:

EN

GIN

EE

R:

AA

BB

CC

DD

112 2

334 4

556 6

778 8

6

10

84

12

3 5 7 9

CO

NN

_10P

V3_3

V3_3

DS

33M

30

HVDD_3.3V

RVDD_1.8V

TVDD_1.8V

TD

P

TD

N

RD

N

TVSS

RHVSS

RD

P

LO

S

V3_3

V1_8

V3_3

SF

P_H

OS

T

CGNDCGNDCGNDCGNDCGNDCGNDCGNDCGND

CGNDCGNDCGND

VE

ER

RD

-

RD

+

VC

CT

VC

CR

VE

ER

TD

+

VE

ET

VE

ET

TD

-

VE

ER

VE

ER

LO

S

RA

TE

MO

D-D

EF

1

MO

D-D

EF

0

MO

D-D

EF

2

TX

_D

ISA

BLE

TX

_F

AU

LT

VE

ET

V3_3

V3_3

67 5 4 3 12 0

30

30

30

7 6 5 4

30

3 2 1 0E

TH

_R

XD

<7..0>

GTXCLK

GM

II_T

X_E

R_

ET

H_T

X_E

N

ET

H_R

X_E

RR

ET

H_R

XD

V

ET

H_R

X_C

LK

DUT_LAN_CLK

ETH_MDIO

ETH_MDC

ET

H_T

XD

<7..0>

RB12

RP

04

RP

B1

2

U03

RP

05

3/8

(BLO

CK

)3/1

4(T

OT

AL)

03/1

0/2

008

ST

EV

ES

CU

LLY

DS

33M

30D

K02A

0

ET

HE

RN

ET

.P

.3-4

,12

,13

-15

CR

-3:

@\_

RC

_LIB

\.\_

RC

_T

OP

_D

N_\(

SC

H_1):

PA

GE

3

BLO

CK

NA

ME

:_rc

_to

p_dn_.4

8 7 6 5

21 3

4

8 7 6 5

21 3M

8

L9

L6

L1

0

L8

M9

L7

M7

M10

M6

L5

M2

M5

E2

G9

K1

J1 L4

J3 M4

K3

L3

M3

L2

K2

4

8 7 6 5

21 3

4D

34C

34D

4

4A24C3

4A

24C

3

4C

3

4C

4

4D

4

4D

3

4A5

4B4

4B4

4C

34C

4

PA

GE

:

DA

TE

:T

ITLE

:

EN

GIN

EE

R:

AA

BB

CC

DD

112 2

334 4

556 6

778 8

DS

33M

30

TX

D[0

]

TX

D[1

]

TX

D[2

]

TX

D[3

]

TX

D[4

]

TX

D[5

]

TX

D[6

]

TX

D[7

]

TX

EN

TX

ER

R

MDC

MDIOGTXCLK

LANCLKI

RX

D[0

]

RX

D[1

]

RX

D[2

]

RX

D[3

]

RX

D[4

]

RX

D[5

]

RX

D[6

]

RX

D[7

]

RX

CLK

RX

DV

RX

ER

R

ISIN

TE

ND

ED

FO

RU

SE

AS

TE

ST

PO

INT

SN

OT

CO

NN

EC

TIO

NT

OA

RE

SO

UR

CE

CA

RD

ET

HE

RN

ET

CO

NN

EC

TO

R(I

.M.

BU

S)

ET

H_R

EF

_C

LK

ISO

NLY

US

ED

INR

MII

MO

DE

(50

MH

Z)

2.2K

77.7

6M

HZ

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V_S

OC

KE

T

30

JM

P_

3

30

30

30JM

P_

3

19.4

4M

HZ

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V_S

OC

KE

T

25.0

00M

HZ

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V_S

OC

KE

T

GT

XC

LK

GM

II_T

X_E

R_C

LK

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O_M

AC

ET

H_R

XD

<3..0>

ET

H_T

XD

<3..0>

ET

H_R

XD

<7..0>

ET

H_T

XD

<7..0>

CLK

_T

O_M

AC

ET

H_T

XD

<7..4>

ET

H_R

XD

<7..4>

CLK

_T

O_M

AC

GT

XC

LK

ET

H_C

OL_D

ET

ET

H_R

X_E

RR

PH

Y_IN

T

ET

H_R

XD

V

ET

H_R

X_C

LK

ET

H_R

X_C

RS

ET

H_T

X_C

LK

ET

H_T

X_E

N

GM

II_T

X_E

R_

RE

SE

T_S

YS

ET

H_M

DIO

ET

H_M

DC

PY

25M

HZ

OS

C

AV

_LA

N_C

LK

DU

T_C

LA

DC

LK

DU

T_LA

N_C

LK

AV

_LA

N_C

LK

PY

25M

HZ

OS

CR

EF

C_25M

RB05

YB

03

RB

02

JP

02

RB

14 R

B13

RB

04

JP

07

YB

01

YB

02

4/1

4(T

OT

AL)

ST

EV

ES

CU

LLY

4/8

(BLO

CK

)

03/1

0/2

008

DS

33M

30D

K02A

0

ET

HE

RN

ET

.P

.3-4

,12

,13

-15

CR

-4:

@\_

RC

_LIB

\.\_

RC

_T

OP

_D

N_\(

SC

H_1):

PA

GE

4

BLO

CK

NA

ME

:_rc

_to

p_dn_.

13

2

18

45

18

45

18

45

13

2

13B

7v

12B

5v

3A

44C

3

13A

7v

12B

5v

4C

33C

6

13B

1v

12B

5v

4C

34A

7

13B

7v

12C

5v

4D

43B

2

13B

7v

12C

5v

3B

64C

4

13B

7v

13A

7v

12C

5v

12B

5v

4D

34C

33B

2

13B

7v

12C

5v

12B

5v

4C

33B

6

13B

1v

12B

5v

4B

14C

3

13B

7v

12B

5v

3B

64C

4

13A

7v

12B

5v

4D

43B

2

13B

1v

12B

5v

4B

14A

7

13B

7v

12B

5v

4A

23A

4

13A

1v

12C

5v

12B

5v

13A

1v

12C

5v

3C

3

13A

1v

13A

7v

12B

5v

4A

23C

6

1C

4

3A

4

12B

5v

4B

4

13B

4v

12B

5v

4B

4

3C

313A

1v

12C

5v

PA

GE

:

DA

TE

:T

ITLE

:

EN

GIN

EE

R:

AA

BB

CC

DD

112 2

334 4

556 6

778 8

_phy_dp83865bvh_dn

ONLY GMII

LA

N_C

LK

PH

YO

SC

25M

MD

CM

DIO

RE

SE

T_B

TX

_E

R_

TX

_E

N

TX

_C

LK

RX

_C

RS

RX

_C

LK

RX

DV

TX

D<

7..0>

RX

D<

7..0>

PH

Y_IN

T

RX

_E

RR

CO

L_D

ET

SP

AR

E<

4..1>

GM

II_C

LK

FR

OM

_M

AC

CLK

TO

MA

CC

LK

TO

MA

C_T

ES

TP

NT

VC

C1

OS

C

GN

DO

UT

V3_3

I.M

.C

AR

DP

LU

G-C

ON

NE

CT

OR

S

ET

HE

RN

ET

(LA

N)

CO

NN

EC

TO

RS

_phy_im

bus_m

b_dn

US

ED

ON

BO

TT

OM

OF

MO

TH

ER

BO

AR

DF

OR

CO

NN

EC

TIO

NT

OE

TH

ER

NE

TC

AR

D

SIN

GLE

50

PIN

LA

N_C

LK

PT

2_R

XD

<3..0>

PT

2_R

XD

V

PT

2_R

X_C

RS

PT

2_R

X_E

RR

PT

2_T

XD

<3..0>

PT

2_T

X_C

LK

RE

SE

T_B

GM

II_C

LK

FR

OM

_M

AC

SP

AR

E

GM

II_C

LK

TO

MA

C_B

UF

GM

II_T

X_E

R_

PT

1_R

XD

<3..0>

PT

1_C

OL_D

ET

PT

1_R

X_C

LK

PT

1_R

XD

V

PT

1_R

X_C

RS

PT

1_R

X_E

RR

PT

1_T

XD

<3..0>

PT

1_T

X_C

LK

PT

1_T

X_E

N

PT

2_C

OL_D

ET

PT

2_R

X_C

LK

PT

2_T

X_E

N

MD

IO

PH

Y_IN

T

MD

C

OS

C25M

VC

C1

OS

C

GN

DO

UT

VC

C1

OS

C

GN

DO

UT

V3_3

V3_3

V3_3

FO

RD

DR

15 14 13 12 11 10

9 8 7 6 5 4 3 2 1 0

12 11 10 9 8 7 6 5 4 3 2 1 0

4.7UF 4.7UF

.01UF .01UF

1.00K 1.00K

15 1314 12 11 10

9 8 7 6 45 3 2 1 0

0 1 2 3 4 5 6 7 8 9 10 11 12.01UF

4.7UF

4.7UF

4.7UF

.1UF

.1UF

.1UF

.1UF

4.7UF

4.7UF

.1UF

DD

R_V

RE

F

DD

R_

A<

12

..0

>

DD

R_D

Q<

15..0>

DD

R_D

Q<

15..0>

DD

R_

A<

12

..0

>

DD

R_U

DQ

S

DD

R_LD

QS

DD

R_U

DM

DD

R_LD

M

DD

R_C

KIN

V

DD

R_

CS

DD

R_

CK

DD

R_C

KE

DD

R_

WE

DD

R_R

AS

DD

R_C

AS

DD

R_

BA

1

DD

R_B

A0

DD

R_U

DM

DD

R_LD

M

DDR_VREF

DD

R_

CS

DD

R_

CK

DD

R_C

KE

DD

R_C

KIN

V

DD

R_

WE

DD

R_R

AS

DD

R_C

AS

DD

R_

BA

1

DD

R_B

A0

DD

R_U

DQ

S

DD

R_LD

QS

CB43 CB46

CB40 C10

RB09 RB11

U04

CB30

U03

CB72

CB25

CB63

CB56

CB57

CB16

CB60

CB31

CB86

CB44

DD

R_V

RE

F

5/8

(BLO

CK

)

5/1

4(T

OT

AL)

DD

RM

EM

OR

Y.

P.5

03/1

0/2

008

DS

33M

30D

K02A

0

ST

EV

ES

CU

LLY

CR

-5:

@\_

RC

_LIB

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RC

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PA

GE

5

BLO

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51 6516 60

63

62

57

59

56

54 13 10 811 57 4 2

29

49

6139

1555

33118

663448

521264

586

1725435314

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47

20

46

24

45

44

21 23

22

27

26 38 37 36 35 32 31 3042

41 28

40 39

B6

D6

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F6

G6

G8

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D3

D10

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F7

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C7

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E6

E7

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B7

E8

D8

B8

F8

C8

A9

B9

C9

A1

1

A10

C10

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A6

C6

A2

A3

A4

B4

C4

A5

B5

C5

F5

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D5

F4

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D4

B3

C3

C11A12

B2

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G5

G7

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5D

65D

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5C

8

5D

65D

2

5C

4

5A

1

5A

4

5C

5

5C

5

5A

8

5B

8

5B

8

5B

8

5B

8

5B

8

5B

8

5B

8

5B

8

5B

8

5B

8

5C

3

5C

3

5D5 5D2

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3

5C

3

5C

3

5C

3

5C

3

5C

3

5C

3

5C

3

5B

3

5C

1

5C

1

PA

GE

:

DA

TE

:T

ITLE

:

EN

GIN

EE

R:

AA

BB

CC

DD

112 2

334 4

556 6

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V2_5

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33M

30

VSSQ

VSSQ

VSSQ

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SD

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SD

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SD

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SD

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SD

DQ

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SD

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SD

DQ

[6]

SD

DQ

[7]

SD

DQ

[8]

SD

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SD

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SD

DQ

[11]

SD

DQ

[12]

SD

DQ

[13]

SD

DQ

[14]

SD

DQ

[15]

SD

LD

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SD

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A[0

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SD

A[1

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SD

A[2

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SD

A[3

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SD

A[4

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SD

A[5

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SD

A[6

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SD

A[7

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SD

A[8

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SD

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SD

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SD

A[1

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CLK

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VDDQ_2.5V

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CR

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PA

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:

DA

TE

:T

ITLE

:

EN

GIN

EE

R:

AA

BB

CC

DD

112 2

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556 6

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4.7UF

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330

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4.7UF

470UF

1.8

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RE

SE

T_

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S

V2

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CB35

CB52

CB83

CB34

CB82

CB67

CB41

CB85

CB26

CB54

CB64

CB38

CB28

CB87

CB69

CB59

CB84

CB27

SW

01

UB

03

RB

20

DS

12

CB37

CB29

CB107

CB81

CB70

CB23

CB116

CB06

CB58

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22

DS

14

C04

CB13

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06

C01

C02

CB03

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CB97

CB110

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CR

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BLO

CK

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4 3

1 23 1

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12

12

21

41

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15

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13

542

1710111412

3

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15

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13

542

1710111412

3

4B

41B

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8

PA

GE

:

DA

TE

:T

ITLE

:

EN

GIN

EE

R:

AA

BB

CC

DD

112 2

334 4

556 6

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MA

X1793_U

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CB118

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CB93

CB105

CB102

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C17

DB

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PO

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10UF

68UF

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470UF

0.00.0

4.7UF

4.7UF

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0.0

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3.3

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10UF

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4.7UF

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4.7UF

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4.7UF

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10UF

10UF

10UF

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100O

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DA

TE

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EN

GIN

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AA

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112 2

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10

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28

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TIM_16H_8L

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330

INT

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ENABLE_DRIVER_H

CS_SPI_FLASH

USER_LED2

ENABLE_CALLBACKS_H

RUN_KIT_USR

KIT_STATUS

ONCE_TMS

ONCE_TRST_B

ONCE_TCLK

OSC_MCU

SPI_MOSI

SPI_MISO

SP

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27 30 31 34 3516151210

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36

37

38

39

40

41

42

43

46

48

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53

52

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A15

A14

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D5

D6

D7

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44

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Mon

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128

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DA

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ITLE

:

EN

GIN

EE

R:

AA

BB

CC

DD

112 2

334 4

556 6

778 8

V3_3

IOIOIO

V3_3

IOIOIOIO

IOIOIO IO IO IO

IOIOIN

V2_5

V1_8

V2_5

V1_8

V3_3

IO IO IO IO

DP

83865_U

VSS<1..35>

MU

LT

I_E

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TR

AP

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RIG

GE

R

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MD

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CLK

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O_M

AC

MD

IB_N

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INT

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RU

PT

*

MD

IA_N

MD

C

MD

IO

CLK

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MD

ID_N

MD

ID_P

MD

IC_N

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IC_P

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IB_P

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RX

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CK

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CR

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TC

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TD

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TD

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TR

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*

RESET*

BG_REF

VDD_SEL_STRAP

1V8_AVDD3

1V8_AVDD2

1V8_AVDD1_<1..5>

2V5_AVDD<1..2>

IO_VDD<1..12>

CORE_VDD<1..8>

ST

RA

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PT

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ON

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FO

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WD

AT

AS

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CH

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LIN

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NE

N

DS

05

DS

09

DS

06

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5

RP

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5

RP

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5

RP

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CB42

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JP

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CB09

CB10

CB08

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MD

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MD

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MD

ID_

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MD

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MD

IB_

P

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B

L10O

B

GR

EE

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RE

EN

GR

EE

N_G

RE

EN

2.2

K

LA

CT

OB

MD

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2.2

K

GR

EE

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RE

EN

JP

03

2.2

K

DS

07

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7

2.2

K

330

JP

06

JM

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3

L100O

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MD

ID_

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RB

16

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RP

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4

2.2

K

JP

09

JP

08

NO

N_IE

EE

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TR

AP

RP

B0

6

2.2

K

PH

Y_IN

T

MD

IO

RE

SE

T_B

.01UF

C12

C08

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C05

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C03

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C09

.1UF

.1UF

CB74

.1UF

CB12

4.7UF

CB55

4.7UF

CB77

4.7UF

CB49

4.7UF

CB73

4.7UF

CB53

4.7UF

C07

4.7UF

CB62

.01UF

CB14

.1UF

CB48

.1UF

CB71

.1UF

CB75

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C11

.1UF

CB66

.1UF

CB24

.1UF

CB20

.1UF

CB45

.1UF

CB11

4.7UF

CB47

4.7UF

CB50

4.7UF

CB76

4.7UF

CB68

4.7UF

CB51

4.7UF

4.7UF

CB61

4.7UF

CB90

.01UF

CB04

.1UF

CB39

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CB88

4.7UF

CB79

4.7UF

CB80

4.7UF

CB32

4.7UF

CB33

MA

C_C

LK

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TR

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YN

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LK

MD

IX_E

N_S

TR

AP

MU

LT

I_E

N_S

TR

AP

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X_T

RIG

GE

R

MA

N_M

DIX

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TR

AP

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CLK

CR

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C_LIB

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DS

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008

2/2

(BLO

CK

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14/1

4(T

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AL)

BLO

CK

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ME

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PA

RE

NT

BLO

CK

:\_

rc_to

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1

24

3

1

24

3

1

24

3

1

24

3

13

2

13

2

13

2

13

2

13

2

4

8 7 6 5

21 3

4

8 7 6 5

21 3

4

8 7 6 5

21 3

18

27

3

45

5

10

87

1211

462 31 9

13B

3

13B

3

13B

3

13B

3

13B

3

13C

3

13C

3

13B

3

13C

3

13C

3

13C

3

13B

3

13B

3

13B

3

13A

3

13A

3

13A

3

13C

313D

24B

4^

13C

313D

24B

4^

13D

213D

64B

4^

PA

GE

:

DA

TE

:T

ITLE

:

EN

GIN

EE

R:

AA

BB

CC

DD

112 2

334 4

556 6

778 8

1000P

F,

2K

V

MX

3-

MX

3+

J8J7MX

2-

J5J4J6J1 J2 MX

0-

MX

0+

MX

2+

J3 MX

1-

MX

1+

750

X4

CM

RC

HO

KE

S

0.0

1U

FX

4

CO

NN

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FJ11_1G

02E

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VC

C

TD

0+

TD

1+

TD

0-

TD

1-

TD

2+

SH

1

SH

2

TD

3+

TD

3-

GN

D

TD

2-

V2_5

V2_5

V3_3

V3_3

V3_3

V3_3

V3_3

V3_3

V2_5

V1_8

V3_3

3

42

1

3

42

1

3

42

1

3

42

1