Gaussian Random Number Generator

Linear Feedback Shift RegisterA linear feedback shift register (LFSR) is a mathematical device that can be used to generate pseudorandom numbers. We can specify an LFSR by means of the characteristic polynomial (also called feedback polynomial). In the best case, the state will have a cycle length of 2n1 states. LFSRs can have two equivalent representations : Fibonacci LFSR Form Galois LFSR Form. We have chosen the Galois LFSR form as it computes all taps in parallel.Box Muller TransformationThe BoxMuller transform is a pseudo-random number sampling method for generating pairs of normally distributed (zero expectation, unit variance) random numbers, given a source of uniformly distributed random numbers.

It is commonly expressed in two forms. The basic form as given by Box and Muller takes two samples from the uniform distribution on the interval (0,1] and maps them to two standard, normally distributed samples. Our ApproachWe have made a Uniform Random Number Generator using Linear Feedback Shift Registers. These Uniform Random Numbers are then converted to Gaussian Distribution using the Box Muller Transformation.

Random Number GeneratorA random number generator (RNG) is a computational or physical device designed to generate a sequence of numbers or symbols that lack any pattern, i.e. appear random.

It is very hard to generate purely random number,so we have generated pseudo random numbers with the help of Linear Feedback Shift Register.Galois LFSR Form

We have used Galois LFSRs of characteristic eqn. x32+x31+x30+x29+1.

A General Diagram of the Galois LFSROur Box Muller Implementation

Our Box Muller Implementation (Contd..)

Box Muller ImplementationWe have implemented the Box-Muller Transformation in pipelined stages.

Our pipelined architecture has the following five stages-Generation of URNG with two 32 bit LFSR.Log, Cos, Sine, Square root Calculation Unit.GRNG Calculation with required SD.GRNG Calculation with required Mean.Selection of any of the output. Different Stages of the Pipelined ArchitectureStage 1- Stage 1 calls the LFSR module and generates two 32 bit Uniformly Distributed Random Numbers. This result is then stored in two 32 bit registers.

Stage 2- This stage takes up the output of first stage and provide it to Log calculation Unit and Sine & Cos Calculation Unit respectively. The output of Log Unit is given to Square Root Calculation Unit, the results are stored in appropriate length registers. Suitable Delay is provided after each unit so that Data Conflict in wires do not occur.

Different Stages of the Pipelined Architecture (Contd.)Stage 3- The output of Sine and Cos Unit is multiplied with the output of Square Root Unit. Appropriate number of most significant bits are chosen. Now, we have Gaussian Random Numbers of mean 0 & variance 1. This is then multiplied with the required Standard Deviation. Appropriate selection of bits is performed again to get Gaussian numbers of required variance. Stage 4- The sign of newly generated Gaussian no. is checked and it is added or subtracted from the input mean. Now we have two Gaussian Random Outputs with required mean and variance. Verilog Modules for Box-Muller ImplementationTausworthe URNG is the same as URNG generated by Galois LFSR.Logarithmic Unit has been made by using 32 bit priority encoder. Hence it is a purely combinational circuit ( doesn't require clock pulses).Cos Calculation Unit & Sine Calculation Unit is made by using polynomial approximation. Square Root Calculation Module is based on staircase approximation.

Verilog Modules for Box-Muller Implementation (Contd..)For general purposes, we have also made a Twos complement generating module.To combine everything generated so far, we have created a GRNG module that writes Gaussian o/p in a text file. Output of the GRNG ModuleThis module generates Gaussian Random No.s of mean 0 and variance 1. We then convert this system to our required mean and variance system. The Gaussian Number thus generated is written on a file.File is generated such that, the first two values are mean and variance of the system followed by the random no.s. The Random No. is written in the given form-

Conversion of Mean and VarianceTo change the mean of our distribution, we simply add the required mean to every sample.E[X+M] = E[X] + M = M (since E[X]=0)To change the Standard Deviation of our distribution, we multiply the required SD to every sample.E[(AX)2] = A2 E[X2] = A2 (since E[X2] = 1)

Synthesis ReportDevice utilization summary:---------------------------Selected Device : 3s100evq100-5 Number of Slices: 883 out of 960 91% Number of Slice Flip Flops: 229 out of 1920 11% Number of 4 input LUTs: 1610 out of 1920 83% Number used as logic: 1609 Number used as Shift registers: 1 Number of IOs: 131 Number of bonded IOBs: 99 out of 66 150% (*) Number of MULT18X18SIOs: 2 out of 4 50% Number of GCLKs: 1 out of 24 4%

Low Level Synthesis

Macro Statistics# Multipliers : 732x15-bit multiplier : 232x3-bit multiplier : 132x3-bit registered multiplier : 232x4-bit multiplier : 136x32-bit multiplier : 1# Adders/Subtractors : 1232-bit adder : 832-bit subtractor : 134-bit subtractor : 26-bit adder : 1# Registers : 262 Flip-Flops : 262# Xors : 171 1-bit xor2 : 171

Final Register Report

Macro Statistics# Registers : 228 Flip-Flops : 228# Shift Registers : 1 2-bit shift register : 1TimingTotal 23.166ns (17.479ns logic, 5.687ns route) (75.5% logic, 24.5% route)

Plotting Output through MATLABThe output file is read with the help of MATLAB. First and Second values are stored as Mean and Variance.The rest of values are read in pair's and converted to signed decimal form and then stored in an array.The Probability Density Function of this array is then plotted and compared with the same of Matlab generated random no. (Same mean, variance and length of array). A Sample Output, generated by the GRNG module for Mean- 2392SD- 291 and no. of Test cases are 327676.

Sorting of the GRNG fileclose all;clear all;clc;fp=fopen('getval.txt');tp=fopen('sort.txt','wt');mean=fscanf(fp,'%lx\n',1);fprintf(tp,'%x\n',mean);sd=fscanf(fp,'%lx\n',1);fprintf(tp,'%x\n',sd);y=fscanf(fp,'%lx\n',inf);j=1;for i=1:2:length(y)-2 if(y(i)==1) z(j)=-1*y(i+1); end if(y(i)==0) z(j)=y(i+1); end j=j+1;end

length(y); for i=1:length(z) p(i)=(1/power((2*pi*sd*sd),0.5))*exp(-(power((z(i)-mean),2))/(2*sd*sd));endstem(z,p);q=sort (z);for i=1:length(z) if q(i)