GaN HEMT SPICE Model Standard for Power & RF

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Samuel Mertens MOS-AK Workshop Washington, DC December 9, 2015 GaN HEMT SPICE Model Standard for Power & RF

Transcript of GaN HEMT SPICE Model Standard for Power & RF

Page 1: GaN HEMT SPICE Model Standard for Power & RF

Samuel Mertens MOS-AK Workshop Washington, DC December 9, 2015

GaN HEMT SPICE Model Standard for Power & RF

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2 © 2013 Cadence Design Systems, Inc..

•  Standardizing Compact Models •  Since 1996 •  Started with BSIM3

•  Support standardization and making the model usable by industry

•  GaN HEMT first foray into III-V semiconductors

Compact Model Coalition @SI2

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3 © 2013 Cadence Design Systems, Inc..

CMC Progress Chart

Plot courtesy of Green

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•  Higher Electron-mobility at high electron density of III-V (including GaN) leads to higher operational frequencies and lower losses

•  Not negligible market-wise •  GaAs HBT PAs are part of nearly all cell phones

•  The complexity of the chips are smaller •  Main simulation focus is in frequency

domain

Historically, III-V semiconductors used to live only live in RF

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•  Historic reasons •  In-house fabrication •  Small # of transistors •  Frequency domain

•  Proprietary models •  Based on public model, but with improvements •  Considered a competitive edge

•  Limited tools needed

III-V industry has been relatively free of standard models

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•  Augment model staff •  You don’t have to do all the work to develop and

maintain models •  Focus on process specific features

•  Get to physics-based model faster •  Easier to move to new process •  Better predictability, scalability and statistical

modeling •  Share the model with partners, customers

and vendors

Advantages of standard model for companies with their own models

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•  Reduced power losses for switching applications •  Low gate charge, and low on-resistance lead to

many commercial applications for power conversion (and no QRR)

•  These companies are used to Si integration levels and a Si design flow •  Standard models are part of that flow •  Time domain is important

•  No body – no inversion, no accumulation can’t use Si model

GaN in Power Electronics – since 2009

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•  Four phases 1.  Call for models 2.  Self-Evaluation 3.  Evaluation by CMC members 4.  Prepare Standard

CMC standardization procedure

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•  CMC compiled a list of requirements •  Technical requirements •  Support requirements

•  We received 9 applications who returned a checklist and a list of references

•  Committee reviewed the applicants

Phase 1 details

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•  Technical requirements •  Physical •  Surface-Potential based (preferred) •  Gummel-symmetry

•  Support requirements •  Documentation •  Support •  Maintenance

Phase 1 requirements - highlights

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•  8 were invited to present at the Q4’13 CMC meeting •  Anwar (Uconn) •  Angelov (Chalmers) •  Antoniadis (MIT) •  Chan(UST) •  Khandelwal (UNIK) •  Martin (LETI) •  Shur (RPI) •  Trew (NCSU)

•  4 candidates found a sponsor to move to next phase

Phase 1 progress

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•  Angelov (Chalmers) •  Semi-empirical, semi-threshold voltage based •  Current “standard” in RF

•  Antoniadis/Radhakrishna - MVSG (MIT) •  Charge-based current calculation

•  Khandelwal – ASM-HEMT (UNIK) •  Surface Potential based

•  Martin – HSP (LETI) •  Surface Potential based

Phase 2 candidates

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•  Two sets of measurement data were supplied •  Qorvo (RF) •  Toshiba (Power switching)

•  The 4 candidates were asked to fit this data to their model and then show overlays for a list of plots

Phase 2 details

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After downselect ballot, 2 candidates are being reviewed by CMC membership in phase 3

•  Antoniadis/Radhakrishna – MVSG (MIT) •  Khandelwal – ASM-HEMT (UNIK)

Really strong candidates for both RF and power switching applications

Phase 2 ballot results

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MVSG Modeling Approach

Source- Implicit

Tx

Drain- Implicit

Tx

Source- Field

plate Tx

Gate- Field

plate Tx

Intrinsic Tx

§  TheMVSGmodel:ChargebasedmodelforGaNHEMTs§  Basedontheconceptofvirtualsource‘top-of-barrier’transport

ofcarriersinfieldeffectdevices

§  Technologyindependentmodelwithfewphysicalparameters

§  ModelsbothHV-longchannelandHF-shortchannelGaNHEMTs

Slide courtesy of U. Radhakrishna

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MVSG Terminal Currents

VS VG VD

Leff 0 x

EC vxo

xo

Qi(xo) Rs Rd

=µExo

( )Vsat

dinvsinvsatD FQQvWI

2/ ,, +

=

Func%onfortransi%onfromnvsattovsat

Sourceanddrainendcharge

Satura%onvelocity

MVS model extended for long channel employing GCA

Slide courtesy of U. Radhakrishna

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§  Captures terminal currents in forward and reverse mode

§  Satisfies Gummel symmetry

§  Has good high order derivative behavior

§  Thermal model captures transport over wide temperatures

§  RC time constant captures dynamic self-heating

Slide courtesy of U. Radhakrishna MVSG - HV Modeling: Terminal Currents

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dxQLxQ i

L

x gS

g

'

0

1∫=

⎟⎟⎠

⎞⎜⎜⎝

⎛−= dxQ

LxQ i

L

x gD

g

'

0∫=

⎟⎟⎠

⎞⎜⎜⎝

⎛=

Using current continuity and GCA

( ) ⎥⎦

⎤⎢⎣

⎡ −−

−=

532 5

,5,

3,

3,2

,22,

2,

dinvsinvdinvsinvsinv

dinvsinv

gD

QQQQQ

QQ

WLQ

( ) ⎥⎦

⎤⎢⎣

⎡ −+

−−

−=

532 5

,5,

3,

3,2

,22,

2,

dinvsinvdinvsinvdinv

dinvsinv

gS

QQQQQ

QQ

WLQ

MVSG - HV Modeling: Terminal Charges

Field plate parameters from CVs

Terminal CVs showing effect of FPs

Slide courtesy of U. Radhakrishna

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VDS

VON

ON OFF

f=10KHzf=5KHzf=1KHz

T=25°C T=40°C T=100°C

VGQ=-15VVGNQ=0V

Breakdownat320V

MVSG - HV Modeling: Charge Trapping Slide courtesy of U. Radhakrishna

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§  ValidatedagainstHV-buck/boostboard

§  Capturesswitchnode(SN)waveformsandtheslewratesaccurately

VIN

OUT

GateDrive

LevelShi\+GateDrive

PWM

VDD Half-Bridge

MVSG - HV Modeling: Circuit Validation

Empiricalmodel

SR=33V/nsSR=60V/ns

Slide courtesy of U. Radhakrishna

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§  Capturesterminalcurrents,chargesofscaledRF-devices

§  Device-levelsmallsignalS-parametersmodeled

MVSG - RF Modeling: S-Parameters Slide courtesy of U. Radhakrishna

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§  MVSGmodelcalibratedagainstsmall-signalcanmatchlarge-signal

§  Sourceandload-pullcontoursareaccurate

§  Powersweepcapturedbythemodelatdifferentclasses

MVSG - RF Modeling: Large-Signal

Pout contours

Source-pull contours

Power sweep validation

Pout contours

Load-pull contours

Slide courtesy of U. Radhakrishna

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MVSG - RF modeling: Circuit Validation IEEE-802.11P RF-transceiver Receiver benchmarking Transmitter benchmarking

3-stage ring oscillator Oscillation waveforms

and phase noise Boost ratio and ripple

VOUT

VDRAIN

IINDUCTOR

IOUT

(a) (b)

VG=-3.0V-2.8V-2.6V-2.5V-2.4V

VINPUT

RF-DC boost converter

Slide courtesy of U. Radhakrishna

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§  2-DEG Charge and Surface-potential Model −  Variation of Fermi-level with bias are divided into

regions and analytical solutions developed for each region

−  Regions combined as unified model

ASM-HEMT Modeling Approach Slide courtesy of S. Khandelwal

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§ Drain-current derived by drift-diffusion transport

§ Real device effects accounted in the model

Physics-Based Drain Current Model Slide courtesy of S. Khandelwal

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§ Non-linear Access Regions

Slide 26

Linear (Ohmic)

Saturation

ASM-HEMT Access Region Model Slide courtesy of S. Khandelwal

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§  All device terminal charges are derived as function of surface-potentials

• Slide 27

( )

( )

( )

0

0

0

, .

, .

1 , .

L

g s g x

L

d s g x

L

s s g x

Q Wqn V V dx

xQ Wqn V V dxL

xQ Wqn V V dxL

=

=

⎛ ⎞= −⎜ ⎟⎝ ⎠

Charge Conservation

CGD

CGS

CDS

D

G

S

Physics-Based Modeling of Capacitances Slide courtesy of S. Khandelwal

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§ Consistent I-V and C-V models § Non-linear access regions resistance §  Self-heating effect §  1/f and thermal noise §  Trapping effects § Gate resistance §  Field plate region

model

Slide courtesy of S. Khandelwal

ASM-HEMT Model Features

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§ DC I-V Characteristics

Accurate sub- and above-Voff results

Slide courtesy of S. Khandelwal

ASM-HEMT Model Results

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§ DC Gm, Gm` and Gm`` model results

Accurate Gm and derivatives

Slide courtesy of S. Khandelwal

ASM-HEMT Model Results

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§ Multi-bias S-parameters Modeling

• Slide 31

Slide courtesy of S. Khandelwal

ASM-HEMT Model Results

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§ Multi-bias large signal power sweep results

Accurate multi-bias large-signal results

Slide courtesy of S. Khandelwal

ASM-HEMT Model Results

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§ Model passes standard model quality tests

• Slide 33 GS GD

cgGS GD

C CC C

δ−

=+

Gummel Symmetry

AC Symmetry

Slide courtesy of S. Khandelwal

ASM-HEMT Model Quality

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• CMC members received – Model code (Verilog A) – Documentation – Extraction procedure – Parameters sets

• Testing model • Ballot (Q2 ‘16)

Phase 3

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• Extraction on their own devices • Circuit simulation

– Larger circuits – Convergence – Performance

– Time and Frequency domain • Noise testing • Usability

Phase 3 testing

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• Model is made ready for standardization – QA suite – OP parameters – Clean up – Clear final code

• Could take 1-2 quarters • Targeting standard model at end of 2016

Phase 4

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• Join CMC to help us define this standard

CMC

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•  Rob Jones (Raytheon) •  All model candidates for their hard work •  Ujwal Radhakrishna (MIT) and Sourabh

Khandelwal (UCB) for their model summaries •  CMC members •  Qorvo and Toshiba for the HW data •  James Fiorenza (ADI), Vijay Krishnamurthy (TI)

and Keith Green (TI)

Acknowledgements

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