Fundamentals of Fast Pulsed IV Measurement - Keysight · B1510A High Power SMU (200V/1A, 10fA...
Transcript of Fundamentals of Fast Pulsed IV Measurement - Keysight · B1510A High Power SMU (200V/1A, 10fA...
Alan Wadsworth
Agilent Technologies
Fundamentals of Fast Pulsed IV Measurement
© Agilent Technologies, 2014
Agenda for Today
Page 2
• Parametric Test: Some Perspective
• Overview of Fast Pulsed Measurement Solutions
• Practical High-Speed Measurement Issues
• High Speed Measurement Examples
• Summary and Conclusions
PARAMETRIC TEST: A PERSPECTIVE
Page 3
Parametric Test Measures 4 Basic Device Types:
Page 4
Transistors Diodes Resistors Capacitors
Most measurements are either current versus voltage (I-V) or capacitance versus voltage (C-V) measurements.
What is a Source/Measure Unit? Simplified Equivalent Circuit:
Page 5
A
V
Consider how many rack & stack instruments you would have to combine together to get equivalent functionality!
Voltage Source
Current Source
Ammeter
Voltmeter
Circuit
Common
What Does Parametric Test Involve?
Page 6
Semiconductor parametric test involves the measurement of voltage
and current very accurately and very quickly. It also involves the
measurement of capacitance.
MOSFETs have 4 terminals:
4 SMUs Magic Number!
SMU2
SMU 1
SMU 3
SMU 4
Id
DC Versus Fast (Transient) IV Measurement
Page 7
Time M
easure
ment
Valu
e
Wait time for DC Measurement
Wait time for Fast
IV Measurement
Transient Response
Long Averaging (DC)
Minimum Averaging
DC Measurement (Milliseconds)
Fast I/V Measurement
(Microseconds and below)
• Basically “static” measurement
• Can wait for the system to settle down
before making the measurement
• Long measurement times allow sufficient
averaging / integration time for high
accuracy
• Dynamic measurement
• Must make measurement during the
transient response
• Trade-offs must be made between speed
and accuracy
Why Is High-Speed Measurement Becoming Critical to Parametric Test?
Page 8
• Lower operating voltages
• Some phenomena (such as NBTI/PBTI) have more impact
than in the past due to smaller operating margins
• Expanded use of new and exotic materials
• Some materials (SOI, high-k gate dielectrics) are more
sensitive to heating effects or experience other issues
requiring fast pulsed measurement
• Random telegraph signal noise (RTN)
• As lithographies shrink, MOSFET drain current variations due
to RTN can affect the stability of SRAM cells
• RTN measurement requires fast (nanosecond) sampling rates
• Circuits and devices are operating hotter
• High temperatures generally exacerbate the above effects
Fast measurement is necessary to obtain the accurate device parameters
OVERVIEW OF FAST PULSED MEASUREMENT SOLUTIONS
Page 9
What is a Pulsed IV Measurement? • IV measurement made using pulses (not DC signals)
• Pulse widths can vary from milliseconds to nanoseconds
DC IV measurement Pulsed IV measurement
Measurement can be slow.
Timing dependency is low.
Measurement must be relatively fast.
Timing dependency is high.
Pulse widths vary from ms to ns
Different equipment is needed depending on
the pulse width requirements
Apply voltage
(or current)
Time
Measure current
(or voltage)
Pulse width
Spot
Sweep
Pulse period
Page 10
How Much Bandwidth is Needed?
Page 11
-2.5E-01
-2.0E-01
-1.5E-01
-1.0E-01
-5.0E-02
0.0E+00
5.0E-02
1.0E-01
1.5E-01
2.0E-01
2.5E-01
0 1E-08 2E-08 3E-08 4E-08 5E-08 6E-08
Time (Sec)
Am
plit
ude
-2.0E-01
0.0E+00
2.0E-01
4.0E-01
6.0E-01
8.0E-01
1.0E+00
1.2E+00
0.E+00 5.E-09 1.E-08 2.E-08 2.E-08
Time (sec)
Am
plit
ude
=
A pulse (square wave) is the superposition of sine waves (odd harmonics).
• The base line frequency is determined by pulse period.
• The practical maximum frequency is determined by the width and transition time.
• The DC components only determine the pulse offset.
10 ns pulse width
2 ns edges
100 s period
Can easily need a system with GHz
of bandwidth!
Using Standard SMUs for Pulsed Measurement
Easy extension from DC measurement.
Can make pulsed IV measurements down to
500 μs using the same DC measurement setup
Intrinsic hardware based timing control for
pulse width, period and wait time parameters.
Three standard SMU modules are supported
on the B1500A device analyzer.
B1510A High Power SMU (200V/1A, 10fA resolution)
B1511B Medium Power SMU (100V/0.1A, 10fA resolution)
B1517A High resolution SMU (100V/0.1A, 1fA)
Note:
1. Measurement range and DUT impedance may limit the achievable pulse width.
2. Trade-offs need to be made between effective resolution and pulse speed.
SMU module
Vd
Id
Vg
Page 12
50 μs Pulsing Using Medium Current SMU (MCSMU) Specialized SMU supporting 50 μs pulsing
(10 times faster than other SMUs)
Power output of 30 V@1 A (pulse mode)
Software supports unique Oscilloscope view that enables you to monitor
voltage & current waveforms directly on B1500A without any additional
equipment
Oscilloscope view permits waveform verification and timing parameter
optimization
Time
Pulse
Level Actual waveform
Programed waveform
Actual waveform does not match programmed
waveform due to capacitive loading, etc.
Risk that measurement is performed
before pulse reaches its peak.
Oscilloscope view Measurement point
Actual waveform can be monitored.
50μs Pulse MCSMU (B1514A)
Page 13
The Traditional Solution for Fast Pulsed Measurement
Page 14
D
S
G
R
DC Bias Source and System Controller
Shunt Resistance
Id
Gate bias pulse
Voltage drop due to Id
Pulse Generator (R) resistanceShunt
Id todue drop VoltageId
SMUs for DC bias
Oscilloscope
A seemingly simple
measurement technique,
but…
This is not simple to
implement!
Vd
+
-
Challenges When Implementing a Pulsed IV System Using Discrete Instruments
Page 15
System accuracy • The overall error is the sum of the individual instrument errors
• Basic scope resolution is only ~ 8 bits
Requires precision components & connectors • The shunt resistance must be very precise
• The cabling needs to be matched and calibrated
• Connections need to be tightened to known a torque using a torque wrench
Software • The amount of time and effort needed to create the software to integrate
everything together is not trivial
Compensation for Id Voltage Drop • Actual Vd applied to transistor varies with Id, so compensation routines are
needed if a constant Vd is desired
Agilent’s Solution for 10 ns Pulsed IV Measurement
Page 16
Agilent 81110A Pulse Generator
Gate Pulse Monitor Ch
Agilent B1500A Semiconductor Device
Analyzer
DC Bias Ch from SMU
Gate Pulse Output Ch
Agilent DSO Digital Storage Oscilloscope
D
S
G
Drain Current Monitor Ch
Bia
s-T
DUT
Optional 11713B Switch Controller:
Provides easy switching between DC
and Pulsed Measurements. Convenient EasyEXPERT GUI
Correlation to DC Measurement @ 10ns pulse width using a bulk NMOS transistor w/o self heating
Page 17
0.0E+00
2.0E-03
4.0E-03
6.0E-03
8.0E-03
1.0E-02
1.2E-02
1.4E-02
1.6E-02
0 1 2 3 4 5
Vd (V)
Id (
A)
DC Vg = - 0.5V
DC Vg = 0V
DC Vg = 0.5V
DC Vg = 1V
10nsec Vg = - 0.5V
10nsec Vg = 0V
10nsec Vg = 0.5V
10nsec Vg = 1V
0.E+00
2.E-03
4.E-03
6.E-03
8.E-03
1.E-02
1.E-02
1.E-02
2.E-02
-1 -0.5 0 0.5 1 1.5
Vg (V)Id
(A
)
DC Vd = 1V
DC Vd = 2V
DC Vd = 3V
DC Vd = 4V
10nsec Vd = 1V
10nsec Vd = 2V
10nsec Vd = 3V
10nsec Vd = 4V
IV curves measured using a 10 ns pulse width correlate
well with IV curves measured at DC (as they should).
Id-Vd: DC vs. PLSDIV @ 10ns Id-Vg: DC vs. PLSDIV @ 10ns
Key Specs of Agilent 10 ns Solution
Page 18
Id-Vd, Id-Vg measurement with pulsed gate bias.
• Pulse bias sweep measurement using a single pulse.
Variable pulse width
• 10 nsec to 1 sec.
• Pulse period is fixed as 100 sec (10 KHz)
Pulse level
• -4.5 V to +4.5V
• Maximum amplitude is up to 4.5V
• Positive pulse for NMOS FET and negative pulse for PMOS FET
Vd Range
• Maximum 10 V
Id measurement range.
• Maximum 80 mA
• Minimum 1 A resolution (depends on measurement range)
An Alternative: Dedicated Hardware for Fast IV Measurement
Page 19
Remote-sense and Switch Unit (RSU) - Located near DUT to minimize signal delay
- Buffered output monitor function
- Can switch between SMU and WGFMU
Output: SMA to/from DUT
SMU connection: Triaxial DC measurement or debug using SMUs
Voltage Monitor: BNC Monitor waveforms using oscilloscope
DUT B1500A mainframe
w/B1530A modules
Furnished
Cables
RSU RSU
Waveform Generator/Fast Measurement Unit (WGFMU)
WGFMU: Basic Functionality and Specifications
Page 20
Voltage ranges supported
– PG mode: -5 V to 5 V
– Fast IV mode: -5 V to 5 V, 0 V to 10 V,
-10 V to 0 V
Current measurement ranges (fixed)
– 1 A, 10 A, 100 A, 1 mA, 10 mA
Settling times for current measurement (0.6%)
– 10 mA Range : 125ns
– 1 mA Range : 200 ns
– 100 A Range : 820 ns
– 10 A Range : 5.8 s
– 1 A Range : 37 s
Measurement resolution
– 14 bit ADC
Noise
– Max. 0.1 mVrms (V force)
– Max. 0.4 mVrms (V measure)
– <0.2% of Range (I measure)
Sampling rate
– 200 MSa/s (Interval: 5 ns or 10 ns to 1 s
w/avg.)
Memory length
– 4,000,000 points/channel PG mode: Minimum 50 ns pulse width (50 Load)
Fast IV mode: Minimum 145 ns pulse width
Equivalent circuit of one WGFMU channel
(2 channels / module):
Output
50 V
PG mode
A
V
Fast IV mode
Arbitrary Linear
Waveform
Generator
Note: Fast IV mode eliminates
load line effects
Fast IV Sweep Measurement Made Using the Agilent’s WGFMU
Page 21
• A staircase sweep with 100 s per step (50 s delay) was performed to create a baseline
• A staircase sweep with 1 s per step (500 ns delay) correlates well with the 100 s measurement
• A 1 s pulsed IV sweep (100 ns rise/fall time, 500 ns delay, 2 s period) also correlates well with the other two measurements
• Averaging time: 50 ns
• Current measurement range: 10 mA
This data shows that there is no dependency on step size or pulsing; all measurements yield the same results.
-1.E-03
-9.E-04
-8.E-04
-7.E-04
-6.E-04
-5.E-04
-4.E-04
-3.E-04
-2.E-04
-1.E-04
0.E+00
-3 -2.5 -2 -1.5 -1 -0.5 0
Vg (V)
Id (
A)
100 s Step (Reference)
1 s Step
1 s Pulse
Rack & Stack Solution vs. Integrated Module
Page 22
Discrete Instrument Solution:
•Extremely fast pulsing (2 ns rise/fall, 10 ns width)
•Complex calibration issues
•Requires very sophisticated software
•Can be subject to load line effects
•Can be expensive
Integrated Module:
•Easy to use
•No calibration issues (off-the-shelf product)
•Slower pulsing capability (10 ns rise/fall, 50 ns width)
•Eliminates load line effects
•Relatively less expensive
PRACTICAL HIGH SPEED MEASUREMENT ISSUES
Page 23
Proper Structure Design is Crucial to Achieving Clean Pulses on Pulses <200 ns in Width
Page 24
Structure optimized
for RF measurement
Structure for conventional
DC measurement
Large overshoot and ringing Clean pulse shape
Source Gate
Sub Drain
Source
/Sub
Source
/Sub Gate
Source
/Sub
Source
/Sub Drain
Pad Arrangement Good Down to ~200 ns
Page 25
Coaxial Probe
Gate Drain
Substrate Source
Coaxial Probe
Signal
GND
Signal
GND
Long, non-50 Ohm current
path distorts the pulse shape.
Pad Arrangement Good Down to ~100 ns
Page 26
Coaxial Probe
Gate Drain
Source Substrate
Coaxial Probe
Signal
GND
Signal
GND
Note that a minor change in pad layout significantly improves
measurement results.
Pad Arrangement Good Down to 10 ns
Page 27
Coaxial
Probe
Gate Drain
Source/
Subs
Coaxial
Probe
Signal
GND
Signal
GND Source
/ Subs
Source/
Subs
Source/
Subs GND GND
Minimize the loss in
the drain current path
Minimize the loss in
the gate pulse path Minimize the voltage offset caused by the
high-frequency impedance mismatch
between the source and substrate
Important! Keep the Signal Path Clean
Page 28
DC bias, ground and
control pads (if needed)
DUT GSG
Pads
GSG
Pads
Signal Path
•Separate probes by at least 200 m to avoid cross-talk
•All grounds should be connected together
200 m
Minimum pad size:
50 m x 50 m
(Infinity Probes)
Using DC Probes for High-Speed Measurements
Page 29
Establishes return path
for Drain Current Establishes return path
for Gate Pulse
Terminates Well
and Source
16493R-202
SSMC (Plug) – SMA(m) 200 mm
16493R-202
SSMC(Plug) – SMA(m) 200 mm
16493R-101 or 102
Cable Accessories
To measurement equipment To measurement equipment
Advantages:
•Cheaper than RF probes
•Bandwidth OK for WGFMU module
•Flexible pad layouts
Disadvantages:
•Minimum achievable pulse width ~100 ns
•Mechanical tension created on probes
•Not supported by all prober companies
Using RF Probes for High-Speed Measurements
Page 30
Signal Gnd Signal Gnd Gnd
G Gate
Source/
Well
Source/
Well
Source/
Well
Source/
Well
Drain
RF Probe
( ex. Cascade Microtech Infinity Probe)
To measurement equipment
SMA Connectors
Advantages:
•More than sufficient bandwidth
• Impossible to improperly connect
Disadvantages:
•Cost
•Fixed pad layout
Can SMUs be Used as Bias Sources in High-Speed Measurements?
Page 31
SMU #1
WGFMU #1
t
Response time of SMU output
NO! SMUs cannot respond fast enough
when the FET is driven by a fast pulse. WGFMU #1
SMU #1
A SMU #2 WGFMU #2
• It is best if you can keep the non-switching nodes
at ground
• If you need to vary the voltage on all nodes, then
use only high-speed equipment (e.g. WGFMU)
even if the node is held at a constant voltage
• If you must use SMUs, then only connect them to
terminals where there is little or no current flow
• Also if using SMUs, make sure that they are set to
their maximum current range for fastest response
Wafer Chuck Considerations
Page 32
Wafer Chuck Chuck to ground
capacitance
(>1000 pF)
Vchuck
Vtop
Vchuck
Vtop
Difficult to change chuck voltage quickly
Alternative method
• If left open the chuck will charge up and the
substrate potential may not be stable during
measurement (important if performing long-
duration reliability test)
• If the WGFMU module is connected to the
chuck then it will have a very long settling time
due to the large chuck capacitance
• Use a shorting plug to ground the wafer chuck
(do not leave it open!)
• If the chuck must be biased, keep the voltage
constant throughout your measurement
Probe Contact Resistance
Page 33
Maintaining low contact resistance is
critical for pulsed measurements
•High contact resistance combines with stray capacitance to
degrade pulse shape (sometimes quite significantly)
•High contact resistance also reduces both the amplitude of the
pulse voltage and the current flowing into the DUT
Cable Capacitance Can Also Affect Measurement Results
Page 34
A
A
50
50
Measured Id
Cable charging
current
Actual Id less than
measured by Ammeter
(or current probe)
Id
Vd
Rising Edge
Falling Edge
Measurement Distortion
One way to avoid this issue (other than making
your cables as short as possible) is to measure
current at the source, since it is usually at a
stable voltage (i.e. zero volts).
Issues Caused by Fixed 50 PGU Output Impedance
WGFMU Module (Fast IV Mode) No load lines effects
Vg
Vd
Device Impedance
changes
Conventional Pulse Generator
Voltage applied to DUT changes when device impedance
changes
Voltage applied to DUT does not match programmed
value even when device impedance becomes constant
Vg
Vd
Device Impedance
changes
1
2
1
2
Electromagnetic Induction Noise
Page 36
noiseloopnoise BSt
tV ___d
d)(
Magnetic Flux: B_noise
Noise
current
Loop Area: S_loop
•Electromagnetic noise is proportional to the loop area
•To reduce noise, make the signal loop as small as possible
Twist Cables to Minimize Noise (B1500A WGFMU Module Example)
Page 37
B1500A
Twist long cables between
the RSUs and the B1500A
to minimize signal area
RSU RSU
Must properly connect
probe shields
To make current
return path for drain
current signal.
To make current
return path for gate
pulse signal.
To shorten the
well and source
16493R-202
SSMC (Plug) –
SMA(m) 200 mm
16493R-202
SSMC(Plug) – SMA(m) 200
mm
RSU RSU
16493R-101 or 102
Cable accessories to connect probe shields
Beware of “Hidden” Ground Loops
Page 38
SMU
GNDU
WGFMU
Circuit Common
Chamber
Wafer Chuck
Frame
I/F Plate
Chassis Common
B1500A Prober
Ground Loop
SMU Cable (Triaxial)
Connecting with multiple cables reduces the residual resistance,
but it increases total area of ground/signal loop
Solution to Ground Loop Issue
Page 39
SMU
GNDU
WGFMU
Circuit Common
Chamber
Wafer Chuck
Frame
I/F Plate
Chassis Common
B1500A Prober SMU Cable (Triaxial)
You may need to disconnect the instrument common from earth
(chassis) ground and/or do the same for the wafer prober.
Filtering Noise (If Necessary)
Page 40
RSU RSU
Ferrite Cores
•Ferrite cores are an effective means of eliminating noise
•Cut-off frequencies need to be chosen carefully to avoid removing
the high-frequency components of the signal being measured
HIGH-SPEED AND PULSED MEASUREMENT EXAMPLES
Page 41
Negative Bias Temperature Instability
Page 42
• Phenomena:
– Shift in Vth and degradation
(reduction) of Ion under negatively
biased gate voltage
– Dynamic recovery
The shift partially recovers if the stress is
removed
– More severe in PMOS transistors
• Accelerated under:
– High temperature
– High Vg bias
VDD
IN Out
PMOS
NMOS
L
H
H
L
ON
OFF
OFF
ON
Why Has NBTI Become a Major Issue?
Page 43
• Process Vdds are lower
– At Vdd <= 1.2 V, even a 20-50 mV shift in Vth has a
big impact
• Many ICs are running much hotter than in the
past (circuit self heating)
• Advanced processing issues exacerbate the NBTI
mechanism
– Dependent on gate dielectric material
High-k gate dielectrics have more defects than
standard materials
– Dependent on gate insulator thickness
Effect grows exponentially worse as thickness
decreases
NBTI Dynamic Recovery
Page 44
Fast recovery from the stress condition
The defects generated by the stress recover rapidly after removal of the stress:
• The total number of defects consists of the combination of permanent defects and fast recovering defects (different defect mechanisms).
• It is difficult to estimate the number of fast recovery defects prior to measurement because they depend upon a variety of factors (gate material, process factors, bias voltage and stress time).
Stress Measurement
Gate Bias
Drain Bias
Time
Voltage
Transition from stress
to measure
Drain Current
|Id|
Time
Rapid recovery immediately
after stress removal
Start of Measurement
Slow recovery
Ultra-fast NBTI Measurement Requirements
Page 45
At the 2006 IRPS H. Reisinger (Infineon) questioned the NBTI data taken via conventional methods. He stated that the dynamic recovery time of charge trapped in the insulator or surface greatly affects the results of the NBTI characterization.
The dynamic recovery time is highly
dependent on the gate insulation
material:
Conventional oxide…200 s
High-k dielectric... <1 s
Conclusion: NBTI measurements
made within 1 s after stress
removal are necessary!
by Reisinger:90nm Conventional
Ultra-fast Id Spot Measurement Using WGFMU
Page 46
Id spot measurement within 1 s after removal of the stress*
*Note: 10 mA and 1 mA ranges. The measurement speed depends upon the measurement range settling time.
Magnified
Stress Stress Stress
Measure
Vd
Vg
Both AC & DC Stressing Capabilities are Needed
Page 47
Vd
Stress Stress Stress
Vg
DC Stress AC Stress (100 kHz, Duty cycle 50%)
Meas
Vd
Vg
Stress Stress Stress
Meas
• The only difference between the AC and DC cases is the shape of the
stress waveforms
• In both cases there is no delay in transitioning from stress to measure
and no glitching during the transition
The Effects of DC & AC Stress on NBTI Device Degradation Are Dramatically Different
Page 48
(s) (s)
1
10
100
1.E-04 1.E-02 1.E+00 1.E+02 1.E+04
Accumulated Nominal Stress Time (sec) Id
(%
)
Duty 25%
Duty 50%
DC
• Pure DC stress causes the largest shift in the Id.
• AC stress is probably a more realistic representation of the stress
experienced by devices under normal operating conditions
1
10
100
1.E-04 1.E-02 1.E+00 1.E+02 1.E+04
Accumulated Absolute Stress Time (sec)
Duty 25%
Duty 50%
DC
Id (
%)
Why is RTS Noise* Important?
Page 49
*Note: RTS noise (RTN) is also known as burst noise or popcorn noise.
• As MOSFET device sizes shrink, RTS noise
becomes much more prominent at low frequencies
– RTS noise is believed to be caused by charge
trapping/de-trapping
– If RTS noise occurs it generally dominates all other
low-frequency noise components
• Active pixel sensors (aka CMOS image sensors)
are especially sensitive to RTS noise
– In CMOS image sensors RTS noise generates
erroneous white spots in what should be dark areas
• SRAM Cell Stability
– As lithographies and voltage levels have continued to
shrink, RTS noise is starting to impact SRAM cell
stability.
What is a Random Telegraph Signal (RTS)?
Page 50
A random process that has the following properties:
1. X(t) = ±1
2. The number of zero crossings in the interval (0,t) is described by a
Poisson process.
0
+1
-1
Time
WGFMU RTS Noise Measurement Technique
Page 51
Gate
Drain
Time
V
Drain current sampling
I
WGFMU
Output waveform
monitor (optional)
(Measured with WGFMU)
Note: Sampling rates need to be in the nanosecond range, and hundreds of
thousands (or even millions) of measurement points may need to be recorded.
Sample RTS Noise Measurements Made Using the B1500A WGFMU Module
Zoom
Measured sampling data
Digitized data
Time [s]
Id [
A]
Page 52
RTS Noise Power Spectrum Distribution
Slope is constant
at low frequencies.
2
1
fSlope
(At high frequencies)
Page 53
When are <100 ns Pulses Required?
Page 54
SOI Transistors
– Short pulse width (under 100 ns) to avoid heat generation.
– Very small duty cycle (< 0.1%) to allow time for the device to cool.
S
G Id
Vg
Vd An ultra short pulse
can be used to
measure the intrinsic
Id of a MOSFET.
Ef Ev
Ec
Gate
p-Si
Barrier Oxide
High-K
MOS-FET on SOI
n+
p-Si
Gate Source Drain
p SiO2
n+ p
Self-heating
effect
Trapped
electrons
tunneling
through the
barrier oxide
MOSFETs Impacted by electron trapping
– Short pulse width to measure Id before any
electrons can get trapped
– Negative gate baseline voltage to remove
electrons before next pulsed measurement.
Measurement Example Using 10 ns Pulsing
-1.E-03
0.E+00
1.E-03
2.E-03
3.E-03
4.E-03
5.E-03
6.E-03
7.E-03
8.E-03
9.E-03
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6
Vg
Id (
A)
W = 10nsec
W = 100nsec
W = 1usec
DC
SiON device with large interface trap density
Charge trapping effects
are clearly visible in the
measurement results.
Page 55
SUMMARY AND CONCLUSIONS
Page 56
What Are the Key Points to Remember for Successful High-Speed Test?
Page 57
Equipment considerations
• Make sure you know what your fast measurement or pulsing needs are so
that you can chose the proper equipment to meet your requirements.
• If making on-wafer measurements, make sure that your prober supports the
necessary probes and that it has a low enough noise floor for your needs.
• Follow all suggestions in this presentation for on-wafer probing.
Careful planning and device layout can prevent many headaches later
• Optimize layouts for high-speed
• Minimize contact resistance
Follow these basic principles if building a system on your own
• Calibrate scope and pulse generator using precision meter
• Use high-quality cables with known delay times
• Keep cable lengths as short as possible
• Make sure all connections have the proper torque
Agilent Parametric Handbook Has More Information
You can download the PDF file (Rev 3) from the web:
http://www.agilent.com/find/parametrichandbook
You can also request it after completing the evaluation form.
>200 pages of invaluable
information on parametric test
Page 58
Thank You for Your Kind Attention
Page 59
Questions
Page 60