Fundamental Mode Circuit Design - Penn State · PDF file11/14/2012 L11: Fundamental Mode...
51
Fundamental Mode Circuit Design 11/14/2012 1 L11: Fundamental Mode Circuit
Transcript of Fundamental Mode Circuit Design - Penn State · PDF file11/14/2012 L11: Fundamental Mode...
Fundamental Mode Circuit Design
11/14/2012 1L11: Fundamental Mode Circuit
11/14/2012 2L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
Design a fundamental mode sequential circuit with two inputs X2 and X1.
The single output Z is to be 1 only when X2X1 = 11, provided that this is
the third of a sequence of input combinations 00 10 11. Otherwise, the
output is to be 0. The design must be sure of no spurious 1 outputs will
occur during transitions between two states with 0 outputs. Both inputs
will not change simultaneously.
11/14/2012 3L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
Design a fundamental mode sequential circuit with two inputs X2 and X1.
The single output Z is to be 1 only when X2X1 = 11, provided that this is
the third of a sequence of input combinations 00 10 11. Otherwise, the
output is to be 0. The design must be sure of no spurious 1 outputs will
occur during transitions between two states with 0 outputs. Both inputs
will not change simultaneously.
X2X1 => 00 10 11
11/14/2012 4L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
Design a fundamental mode sequential circuit with two inputs X2 and X1.
The single output Z is to be 1 only when X2X1 = 11, provided that this is
the third of a sequence of input combinations 00 10 11. Otherwise, the
output is to be 0. The design must be sure of no spurious 1 outputs will
occur during transitions between two states with 0 outputs. Both inputs
will not change simultaneously.
X2X1 => 00 10 11 Z = 1
11/14/2012 5L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
Design a fundamental mode sequential circuit with two inputs X2 and X1.
The single output Z is to be 1 only when X2X1 = 11, provided that this is
the third of a sequence of input combinations 00 10 11. Otherwise, the
output is to be 0. The design must be sure of no spurious 1 outputs will
occur during transitions between two states with 0 outputs. Both inputs
will not change simultaneously.
0
0
11
0 1
0 1
0 0
1
1
X2
X1
11/14/2012 6L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
Design a fundamental mode sequential circuit with two inputs X2 and X1.
The single output Z is to be 1 only when X2X1 = 11, provided that this is
the third of a sequence of input combinations 00 10 11. Otherwise, the
output is to be 0. The design must be sure of no spurious 1 outputs will
occur during transitions between two states with 0 outputs. Both inputs
will not change simultaneously.
0
0
11
0 1
0 1
0 0
1
1
X2
X1
Z
11/14/2012 7L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
11/14/2012 8L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
0
0
11
0 1
0 1
0 0
1
1
X2
X1
Z
1
11/14/2012 9L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
0
0
11
0 1
0 1
0 0
1
1
X2
X1
Z
1 2
11/14/2012 10L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
0
0
11
0 1
0 1
0 0
1
1
X2
X1
Z
1 2 3
11/14/2012 11L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
0
0
11
0 1
0 1
0 0
1
1
X2
X1
Z
1 2 3 4
11/14/2012 12L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
0
0
11
0 1
0 1
0 0
1
1
X2
X1
Z
1 2 3 4 5
11/14/2012 13L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
00 01 11 10
6
0
1
2
3
4
5
00,0
X2, X1
,00
,00X1
X2 Z
11/14/2012 14L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
11/14/2012 15L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
D Q
CK
D FF
11/14/2012 16L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
D Q
CK
D FF
RES
D Q
CK
D FF
11/14/2012 17L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
D Q
CK
D FF
CLR
D Q
CK
D FF
RES
D Q
CK
D FF
11/14/2012 18L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
CLR
D Q
CK
D FF
11/14/2012 19L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
CLR
D Q
CK
D FF
000 001 011 010 100 101 111 110
6
0
1
2
3
4
5
7
000,0
CLR, D, CK
,00
,00
11/14/2012 20L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
11/14/2012 21L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
00 01 11 10
6
0
1
2
3
4
5
00,0
X2, X1
,00
,00X1
X2 Z
11/14/2012 22L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
000 001 011 010 100 101 111 110
6
0
1
2
3
4
5
7
000,0
000,0
CLR, D, CK
11/14/2012 23L11: Fundamental Mode Circuit
Fundamental Mode Circuit Design
11/14/2012 24L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 25L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 26L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 27L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 28L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 29L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 30L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 31L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 32L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 33L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 34L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 35L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
00
01
11
10
00
10
01
11
11/14/2012 36L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 37L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
00 a
01 b
11 c
10 d
a
d c
b
00
10
01
11
11/14/2012 38L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
00 a
01 b
11 c
10 d
a
d c
b
00
10
01
11
11/14/2012 39L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
00 a
01 b
11 c
10 d
a
d c
b
00
10
01
11
11/14/2012 40L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
00 a
01 c
11 b
10 d
11/14/2012 41L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
00 a
01 c
11 b
10 d
a
d b
c
00
10
01
11
11/14/2012 42L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
00 a
01 c
11 b
10 d
11/14/2012 43L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 44L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 45L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 46L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 47L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 48L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 49L11: Fundamental Mode Circuit
Fundamental Mode Circuit: Cycles & Races
11/14/2012 P50L11: Fundamental Mode Circuit
11/14/2012 51L11: Fundamental Mode Circuit
![Circuit Switching - Signaling [Compatibility Mode]](https://static.fdocuments.in/doc/165x107/546b7050b4af9f892c8b4c91/circuit-switching-signaling-compatibility-mode.jpg)
![OWA010010 WCDMA RAN Fundamental ISSUE 1.111 [Compatibility Mode]](https://static.fdocuments.in/doc/165x107/577cd45c1a28ab9e7898504e/owa010010-wcdma-ran-fundamental-issue-1111-compatibility-mode.jpg)
