FUNCTIONAL RAM TESTING Christian LANDRAULT [email protected].

FUNCTIONAL FUNCTIONAL RAM TESTINGRAM TESTING

Christian LANDRAULTChristian LANDRAULT

[email protected]@lirmm.fr

SUMMARYSUMMARY

IntroductionIntroduction Memory modelingMemory modeling Failure mechanisms and fault Failure mechanisms and fault

modelingmodeling Test algorithms for RAMTest algorithms for RAM

IntroductionIntroduction

Memories (esp. RAM) are at the Memories (esp. RAM) are at the forefront of commercial electronic forefront of commercial electronic designsdesigns

DRAMs are the technology driver DRAMs are the technology driver for the semiconductor industryfor the semiconductor industry

Memories are the most numerous Memories are the most numerous IPs used in SOC designs IPs used in SOC designs (hundreds ! and >90% of an SoC in (hundreds ! and >90% of an SoC in 2010)2010)

Main types of semiconductor Main types of semiconductor memory RAMs: Random Access memory RAMs: Random Access MemoriesMemories

Dynamic Random Acess Memory Dynamic Random Acess Memory (DRAM)(DRAM) Highest possible densityHighest possible density Slow access time (typically 20ns)Slow access time (typically 20ns) Information stored as charge on capacitor Information stored as charge on capacitor

and should be refreshedand should be refreshed Static Random Acess Memory (SRAM)Static Random Acess Memory (SRAM)

Fastest (typically 2ns)Fastest (typically 2ns) Information stored in cross coupled latchesInformation stored in cross coupled latches

100k

1M

10M

100M

1G

10G

82 86 90 94 98 02 06

1G512M

256M128M

64M16M

4M1M

256k

Number of MemoryNumber of MemoryCells per ChipCells per Chip

Memory testingMemory testing

Memory testing has to prove that Memory testing has to prove that the circuits under test behave as the circuits under test behave as designed, it consists of:designed, it consists of: Parametric tests which concern Parametric tests which concern

voltage/current levels and delays on voltage/current levels and delays on the IO pins of the chipthe IO pins of the chip

Functional testing including dynamic Functional testing including dynamic testingtesting

Parametric (electrical) Parametric (electrical) testingtesting

DC Parametric DC Parametric testingtesting Contact testContact test Power Power

consumptionconsumption Leakage testLeakage test Threshold testThreshold test Output drive Output drive

current testcurrent test Output short Output short

current testcurrent test

AC Parametric AC Parametric testingtesting Rise and fall timeRise and fall time Setup and hold timeSetup and hold time Delay testDelay test Speed testSpeed test

IIDDQDDQ testing (CMOS testing (CMOS memories only)memories only) Zero defect Zero defect

approachapproach Use to detect some Use to detect some

defects not handle defects not handle by functional testingby functional testing

SUMMARYSUMMARY



Functional RAM Chip Functional RAM Chip ModelModel

RefreshAddress

Address latch Column decoder Refresh logic

MemoryCell Array

Write driver

Data registerSense amplifiers

Rowdecoder

Data out Data in

R/W and CE

Vss

WL

BL BL

Vdd

6-devices SRAM cellpoly

single-device single-device DRAM cellDRAM cell

WLWL

BLBLCC

Vss

WL

BL BL

Vdd

6-device SRAM celldepletion

VssVss

WLWL

BLBL BLBL

VddVdd

6-device SRAM 6-device SRAM cellcell

CMOSCMOS

RAM write RAM write circuitcircuit

Data inData in

BLBL BLBL

WriteWrite

Two dimensional decoding schemeTwo dimensional decoding scheme(saves decoder and wiring area)(saves decoder and wiring area)• row decoder select row of cells row decoder select row of cells via WLvia WL• column decoder column decoder

Functional SRAM Chip Functional SRAM Chip ModelModel

RefreshAddress


MemoryCell Array

Write driver


Rowdecoder

Data out Data in

R/W and CE

Functional SRAM Chip Functional SRAM Chip ModelModel

Address

Address latch Column decoder

MemoryCell Array

Write driver


Rowdecoder

Data out CEData in

R/W and

SUMMARYSUMMARY



Failure, errors and faultsFailure, errors and faults

A system A system failurefailure occurs when the system occurs when the system behaviour is incorrectbehaviour is incorrect

Failures are cause by errorsFailures are cause by errors An An errorerror is a difference between the is a difference between the

fafaultyulty value and the golden one, this is value and the golden one, this is the manifestation of a faultthe manifestation of a fault

A A faultfault represents the physical difference represents the physical difference between a good and incorrect systembetween a good and incorrect system

Faults can be permanent or non-Faults can be permanent or non-permanentpermanent

Failure MechanismsFailure Mechanisms

CorrosionCorrosion Electromigration (burning out of wires due to Electromigration (burning out of wires due to

collision of electrons and Al grains)collision of electrons and Al grains) Bonding deterioration (open due to Bonding deterioration (open due to

interdiffusioninterdiffusion of materials i.e. Au-Al of materials i.e. Au-Al)) Ionic contamination (modification of threshold Ionic contamination (modification of threshold

vovolltagestages due to ion diffusion into transistor gate due to ion diffusion into transistor gate)) AlloyingAlloying (Al atom migration into Si) (Al atom migration into Si) Radiation and cosmic raysRadiation and cosmic rays (soft memory errors, (soft memory errors,

…)…) …………..

Functional faultsFunctional faults

Cell stuckCell stuck Driver stuckDriver stuck Read/write line stuckRead/write line stuck Chip-select line stuckChip-select line stuck Data line stuckData line stuck Open in data lineOpen in data line Shorts between data Shorts between data

lineslines Crosstalk between Crosstalk between

data linesdata lines

Address line stuckAddress line stuck Open in address lineOpen in address line Shorts between Shorts between

address linesaddress lines Open decoderOpen decoder Wrong accessWrong access Multiple accessMultiple access Cell can be set to 0 and Cell can be set to 0 and

not to 1 (or vice versa)not to 1 (or vice versa) Pattern sensitive Pattern sensitive

interaction between interaction between cellscells

Any wiring Any wiring connection in connection in the memorythe memory

Either a Either a memory cell memory cell

or a data or a data registerregister

Reduced Functional ModelReduced Functional Model

RefreshAddress


MemoryCell Array

Write driver


Rowdecoder

Data out Data in

R/W and CE

Address decoder

Memory Cell Array

Read / Write logic

Reduced Functional Model Reduced Functional Model (cntd)(cntd)

Address decoder

Memory cell array

Read/write logic

Address

Data

Fault Models: Address decoder Fault Models: Address decoder Fault AFFault AF

1. A certain address access no cell1. A certain address access no cell

2. A certain cell is never accessed2. A certain cell is never accessed

3. A certain address access 3. A certain address access

multiple cellsmultiple cells

4. A certain cell is accessed by 4. A certain cell is accessed by

multiple addressesmultiple addresses

Ax

Cx

Cx

CyAx

Ax

Ay

Cx

4 4 Address decoder Faults which cannot stand alone Address decoder Faults which cannot stand alone

((assuming same fault during read and write operations and assuming same fault during read and write operations and

no sequential behavior of the faulty decoder)no sequential behavior of the faulty decoder)

Fault Models: Address decoder Fault Models: Address decoder Fault AFFault AF

4 Combinations of 4 Combinations of Address decoder Faults Address decoder Faults Fault A: 1+2Fault A: 1+2

Fault B: 1+3Fault B: 1+3

Fault C: 2+4Fault C: 2+4

Fault D: 3+4Fault D: 3+4

Ax Cx

Cx

CyAy

Ax

Ax

Ay

Cx

Cy

Ax

Ay

Cx

Cy

Conditions for detecting Conditions for detecting address faults AFaddress faults AF

The March test should contain The March test should contain the two following march the two following march elementselements

(rx, … , wx)(rx, … , wx) (rx, … , wx)(rx, … , wx)

FunctionalFunctional Memory Faults Memory Faults

A functional fault model is a non-empty A functional fault model is a non-empty set of fault primitivesset of fault primitives

A fault primitive is a difference between A fault primitive is a difference between the observed and the expected memory the observed and the expected memory behaviourbehaviour

A fault primitive is denoted by <S/F/R>A fault primitive is denoted by <S/F/R> S describes the sensitizing operation sequenceS describes the sensitizing operation sequence F describes the state stored in the faulty cellF describes the state stored in the faulty cell R describes the output of the read operationR describes the output of the read operation For example <1/0/-> is a stuck-at 1 and For example <1/0/-> is a stuck-at 1 and

<0w1/0/-> is a rising transition fault<0w1/0/-> is a rising transition fault

Taxonomy of Taxonomy of FunctionalFunctional Memory FaultsMemory Faults

Fault Primitive

C: Number of Cells O: Number of Operations

C=1Single Cell Fault

C>1Coupling Fault

C=22-Coupling Fault

C=33-Coupling Fault

0=<1Static Fault

O>1Dynamic Fault

O=22-op Fault

0=33-op Fault

Static and Dynamic faultsStatic and Dynamic faults

Static faults:Static faults: sensitisation needs only one sensitisation needs only one operation (Testable by common March operation (Testable by common March Tests)Tests) Static Single-Cell Faults (S1CF)Static Single-Cell Faults (S1CF) Static Two-Cell Faults (S2CF)Static Two-Cell Faults (S2CF) ……

Dynamic faultsDynamic faults: : sensitisation needs more sensitisation needs more than one operation (Not testable by than one operation (Not testable by common March Tests)common March Tests) Dynamic Single-Cell Faults (D1CF)Dynamic Single-Cell Faults (D1CF) Dynamic Two-Cell Faults (D2CF)Dynamic Two-Cell Faults (D2CF) ……

S1CF: Stuck-at fault (SAF)S1CF: Stuck-at fault (SAF)

The logic value of (a line or) a cell The logic value of (a line or) a cell is always 0 (SA0) or 1 (SA1)is always 0 (SA0) or 1 (SA1)

To detect memory cell's SAFs:To detect memory cell's SAFs: SA0: Write 1 Read 1 (w1 r1)SA0: Write 1 Read 1 (w1 r1) SA1: Write 0 Read 0 (w0 r0)SA1: Write 0 Read 0 (w0 r0)

S1CF: Transition FaultS1CF: Transition Fault

A cell fails to undergo a 0 A cell fails to undergo a 0 1 1 transition (TFtransition (TF

riserise) or a 1 ) or a 1 0 0

transition (TFtransition (TFfallfall

) when it is written) when it is written

To detect transition fault:To detect transition fault: TFTF

riserise : w0 w1 r1 : w0 w1 r1

TFTFfallfall

: w1 w0 r0 : w1 w0 r0

S1CF: Read Disturb Faults S1CF: Read Disturb Faults (RDF)(RDF)

A Cell is said to have a A Cell is said to have a RDFRDF if the read if the read operation performed on the cell returns operation performed on the cell returns an incorrect value while changing the an incorrect value while changing the contents of the cell to the wrong valuecontents of the cell to the wrong value

To detectTo detect Read Disturb Fault Read Disturb Fault from each from each cell a 1 and a 0 should be read cell a 1 and a 0 should be read r0r0 r1r1

S1CF: Deceptive Read S1CF: Deceptive Read Disturb Faults (DRDF)Disturb Faults (DRDF)

A Cell is said to have a A Cell is said to have a DRDFDRDF if the read if the read operation performed on the cell returns operation performed on the cell returns the expected value while changing the the expected value while changing the contents of the cell to the wrong valuecontents of the cell to the wrong value

To detect To detect Deceptive Read Disturb FaultDeceptive Read Disturb Fault each cell should be read twice each cell should be read twice successively. The first read sensitize the successively. The first read sensitize the fault and the second detects it fault and the second detects it r0r0r0r0 r1r1r1r1

S1CF: Incorrect Read Faults S1CF: Incorrect Read Faults (IRF)(IRF)

A Cell is said to have a A Cell is said to have a IRFIRF if a read if a read operation performed on the cell operation performed on the cell returns the incorrect value while returns the incorrect value while keeping the correct stored value in keeping the correct stored value in the cellthe cell

To detect To detect Incorrect Read FaultIncorrect Read Fault from from each cell a 1 and a 0 should be read each cell a 1 and a 0 should be read r0r0 r1r1

S1CF: Write Disturb Faults S1CF: Write Disturb Faults (WDF)(WDF)

A Cell is said to have a A Cell is said to have a WDFWDF if a non if a non transition write operation causes a transition write operation causes a transition in the celltransition in the cell

To detect To detect Write Disturb FaultWrite Disturb Fault each cell each cell

should be read after a non-transition should be read after a non-transition

writewrite 0w0r00w0r0 1w1r11w1r1

Fault models: Coupling Fault models: Coupling Fault (2 cells)Fault (2 cells)

Implies two cells: the victim cell and the Implies two cells: the victim cell and the aggressor cellaggressor cell

Different kinds of coupling faults:Different kinds of coupling faults: Inversion coupling faultsInversion coupling faults Idempotent coupling faultsIdempotent coupling faults State coupling faultsState coupling faults Dynamic coupling faultsDynamic coupling faults Bridging faultsBridging faults …………....

S2CF: Inversion Coupling S2CF: Inversion Coupling FaultFault

Inversion Coupling Fault (CFInversion Coupling Fault (CFinin):): The content of the The content of the victim cell is inverted if the aggressor cell has a victim cell is inverted if the aggressor cell has a transitiontransition

According to the kind of transition (0 According to the kind of transition (0 1 or 1 1 or 1 0) 0) there is two possible CFthere is two possible CFinin types: types:

< < ; ; > < > < ; ; > > To detect CFTo detect CFinin between cell x (victim) and y between cell x (victim) and y

(aggressor)(aggressor) CFCFinin (y rise (y rise x inverted): w0x w0y w1y r0x. x inverted): w0x w0y w1y r0x.

CFCFinin (y fall (y fall x inverted): w0x w1y w0y r0x. x inverted): w0x w1y w0y r0x.

S2CF: S2CF: IdempotentIdempotent Coupling Coupling FaultFault

Idempotent Coupling Fault (CFIdempotent Coupling Fault (CFidid):): The victim is forced to The victim is forced to 0 or 1 if the aggressor has a 0 0 or 1 if the aggressor has a 0 1 or 1 1 or 1 0 transition 0 transition

According to the kind of transition (0 According to the kind of transition (0 1 or 1 1 or 1 0) 0) there is four possible CFthere is four possible CFidid types: types:

< < ; 0 > < ; 0 > < ; 0 > < ; 0 > < ; 1 > < ; 1 > < ; 1 > ; 1 > To detect CFTo detect CFidid between cell x (victim) and cell y between cell x (victim) and cell y

(aggressor)(aggressor) CFCFidid (y rise (y rise x=0): w1x w0y w1y r1x x=0): w1x w0y w1y r1x CFCFidid (y fall (y fall x=1): w0x w1y w0y r0x x=1): w0x w1y w0y r0x CFCFidid (y rise (y rise x=1): w0x w0y w1y r0x x=1): w0x w0y w1y r0x CFCFidid (y fall (y fall x=0): w1x w1y w0y r1x x=0): w1x w1y w0y r1x

S2CF: State Coupling FaultS2CF: State Coupling Fault

State Coupling Fault (CFState Coupling Fault (CFstst):): The coupled cell (victim) is The coupled cell (victim) is forced to 0 or 1 if the coupling cell (aggressor) is in a forced to 0 or 1 if the coupling cell (aggressor) is in a certain statecertain state

There is four possible CFThere is four possible CFstst types: types:

< 0 ; 0 > < 0 ; 1 > < 1 ; 0 > < 1 ; 1 >< 0 ; 0 > < 0 ; 1 > < 1 ; 0 > < 1 ; 1 > To detect CFTo detect CFstst between cell x (victim) and y (aggressor) between cell x (victim) and y (aggressor)

CFCFstst (y=0 (y=0 x=0): w1x w0y r1xx=0): w1x w0y r1x CFCFstst (y=0 (y=0 x=1): w0x w0y r0xx=1): w0x w0y r0x CFCFstst (y=1 (y=1 x=0): w1x w1y r1xx=0): w1x w1y r1x CFCFstst (y=1 (y=1 x=1): w0x w1y r0xx=1): w0x w1y r0x

S2CF: Dynamic Coupling S2CF: Dynamic Coupling Fault Fault

Dynamic Coupling Fault (CFDynamic Coupling Fault (CFdyndyn):): The victim The victim is forced to 0 or 1 if the aggressor cell has is forced to 0 or 1 if the aggressor cell has a read or write operationa read or write operation

More general case of the Idempotent More general case of the Idempotent Coupling Fault (CFCoupling Fault (CFidid) because it can be ) because it can be sensitized by any read or write operationsensitized by any read or write operation

There are four CFThere are four CFdyndyn faults faults

<r0 <r0 w0;0> <r0 w0;0> <r0 w0;1> <r1 w0;1> <r1 w1;0> <r1 w1;0> <r1 w1;1> w1;1>

S2CF: Write (read) disturb S2CF: Write (read) disturb coupling fault coupling fault

Write disturb coupling (CFWrite disturb coupling (CFwdwd):): A cell is said to A cell is said to have a CFwd if a non transition write perform have a CFwd if a non transition write perform on the victim results in a transition when the on the victim results in a transition when the aggressor is set into a logic stateaggressor is set into a logic state

There are four types of CFThere are four types of CFwdwd faults faults

Read disturb coupling (CFRead disturb coupling (CFrdrd):): Two cells are said Two cells are said to have a CFrd if a read performed on the to have a CFrd if a read performed on the victim destroys the data stored in the victim if victim destroys the data stored in the victim if a given state is present in the aggressora given state is present in the aggressor

There are four types of CFThere are four types of CFrdrd faults faults

S2CF: Incorrect read S2CF: Incorrect read coupling fault coupling fault

Incorrect read coupling faultIncorrect read coupling fault (CF(CFirir):): Two cells are said to have an CFir if a Two cells are said to have an CFir if a read performed on the victim returns read performed on the victim returns the incorrect logic value when the the incorrect logic value when the aggressor is sent into a given stateaggressor is sent into a given state

There are four types of CFThere are four types of CF irir faults faults

S2CF: Deceptive read S2CF: Deceptive read disturb coupling fault disturb coupling fault

Deceptive read disturb coupling faultDeceptive read disturb coupling fault (CF(CFdrdr):): A cells is said to have an CFdr if A cells is said to have an CFdr if a read performed on the victim a read performed on the victim returns the correct logic value and returns the correct logic value and changes the content of the victim, changes the content of the victim, when the aggressor is sent into a when the aggressor is sent into a given stategiven state

There are four types of CFThere are four types of CFdrdr faults faults

Fault models: Bridging Faults Fault models: Bridging Faults (BF)(BF)

A short between cells or lines (2 or more)A short between cells or lines (2 or more) This is a bidirectional fault caused by logic level rather than a This is a bidirectional fault caused by logic level rather than a

transitiontransition Two sorts of bridging faults (BFs) exist:Two sorts of bridging faults (BFs) exist:

AND-type (ABF): the shorted cells/lines take the AND value of their fault-AND-type (ABF): the shorted cells/lines take the AND value of their fault-free values (four possible ABFs)free values (four possible ABFs)

OR-type (OBF): the shorted cells/lines take the OR value of their fault-OR-type (OBF): the shorted cells/lines take the OR value of their fault-free values (four possible OBFs)free values (four possible OBFs)

Can be made equivalent to a number of linked CFs, i.e.Can be made equivalent to a number of linked CFs, i.e. "Cell x is the victim of cell y" and "Cell y is the victim of cell x""Cell x is the victim of cell y" and "Cell y is the victim of cell x" The faults are linked. It is possible that they will hide each other.The faults are linked. It is possible that they will hide each other.

To detect a BF, it might be necessary to write a certain pattern on To detect a BF, it might be necessary to write a certain pattern on adjacent memory cells, see checkerboard algorithm using adjacent memory cells, see checkerboard algorithm using (“010101…”) pattern.(“010101…”) pattern.

Pattern Sensitive (PSF)Pattern Sensitive (PSF)

The victim cell is forced to 0 or 1 if a certain number of The victim cell is forced to 0 or 1 if a certain number of neighbors show a particular patternneighbors show a particular pattern

The PSF is the most general k-coupling fault with k=nThe PSF is the most general k-coupling fault with k=n With the Neighborhood Pattern Sensitive Fault (NPSF), the With the Neighborhood Pattern Sensitive Fault (NPSF), the

neighborhood is limited to all the cells in a single position neighborhood is limited to all the cells in a single position surrounding the base cellsurrounding the base cell

Equivalent to an N-coupling fault involving more than one Equivalent to an N-coupling fault involving more than one aggressor (up to 8 adjacent locations)aggressor (up to 8 adjacent locations)

Extremely hard to detectExtremely hard to detect For each memory cell: the effect of all the possible For each memory cell: the effect of all the possible

combinations (2combinations (288) of the adjacent cells should be tested.) of the adjacent cells should be tested.

Neighborhood Pattern Sensitive Neighborhood Pattern Sensitive (NPSF)(NPSF)

In practice two types of NPSF are usedIn practice two types of NPSF are used

The type-1 NPSF with 4 neighborhood cells The type-1 NPSF with 4 neighborhood cells (north, west, south, east)(north, west, south, east)

The type-2 NPSF with 8 neighborhood cellsThe type-2 NPSF with 8 neighborhood cells

Base cellBase cellType-1 neigh-Type-1 neigh-borhood cellborhood cell

Base cellBase cellType-2 neigh-Type-2 neigh-borhood cellborhood cell

Type-1Type-1 Type-2Type-2

Neighborhood Pattern Sensitive Neighborhood Pattern Sensitive (NPSF)(NPSF)

Active NPSF (ANPSF):Active NPSF (ANPSF): change of the base cell due to a transition in the neighborhood cellschange of the base cell due to a transition in the neighborhood cells Each base cell must be read in state 0 and in state 1, for all possible Each base cell must be read in state 0 and in state 1, for all possible

changes in the neighborhood patternchanges in the neighborhood pattern Passive NPSF (PNPSF):Passive NPSF (PNPSF):

the change of the base cell is impossible due to a certain the change of the base cell is impossible due to a certain neighborhood cells configurationneighborhood cells configuration

Each base cell must be written and read in state 0 and in state 1, for Each base cell must be written and read in state 0 and in state 1, for all permutations in the neighborhood patternall permutations in the neighborhood pattern

Static NPSF (SNPSF):Static NPSF (SNPSF): The content of the base cell is forced to a certain state due to a The content of the base cell is forced to a certain state due to a

certain neighborhood patterncertain neighborhood pattern Each base cell must be read in state 0 and in state 1, for all Each base cell must be read in state 0 and in state 1, for all

permutations in the neighborhood patternpermutations in the neighborhood pattern

Dynamic Fault models: examplesDynamic Fault models: examples

Sense Amplifier (SA) Recovery FaultSense Amplifier (SA) Recovery Fault The SA saturates after a long sequence of 0s or 1sThe SA saturates after a long sequence of 0s or 1s

Write Recovery Fault (addressing fault in the Write Recovery Fault (addressing fault in the decoder)decoder) Write followed by a read/write to another location Write followed by a read/write to another location

affects the previously accessed locationaffects the previously accessed location

Detection needs At-Speed testing !!Detection needs At-Speed testing !!

Single-Cell Dynamic Fault Models: Single-Cell Dynamic Fault Models: Dynamic RDF, IRF and DRDFDynamic RDF, IRF and DRDF

Definition similar to the static Definition similar to the static Read Disturb Read Disturb FaultFault, , Incorrect Read FaultIncorrect Read Fault and and Deceptive Read Deceptive Read Disturb FaultsDisturb Faults with an initial write follows by with an initial write follows by one or more read operationone or more read operation

dRDF:dRDF: A Cell is said to have a dRDF if a write followed by A Cell is said to have a dRDF if a write followed by one or more read performed on the cell returns (on the one or more read performed on the cell returns (on the last read) an incorrect value while changing the last read) an incorrect value while changing the contents of the cell to the wrong valuecontents of the cell to the wrong value

dIRF:dIRF: A Cell is said to have a dIRF if a write followed by A Cell is said to have a dIRF if a write followed by one or more read performed on the cell returns (on the one or more read performed on the cell returns (on the last read) incorrect value while keeping the correct last read) incorrect value while keeping the correct stored value in the cellstored value in the cell

dDRDF: dDRDF: A Cell is said to have a dDRRF if a write followed A Cell is said to have a dDRRF if a write followed by one or more read performed on the cell returns (on by one or more read performed on the cell returns (on the last read) the expected value while changing the the last read) the expected value while changing the contents of the cell to the wrong valuecontents of the cell to the wrong value

Fault models: Fault models: Data Retention Data Retention (DRF)(DRF)

A cell fails to retain its logic value after some timeA cell fails to retain its logic value after some time Due to a defective pull-up within a SRAM cellDue to a defective pull-up within a SRAM cell A cell loses its value due to leakage current: the cell A cell loses its value due to leakage current: the cell

lose its charge due to this leakage currentlose its charge due to this leakage current Two different DRFs exist (loss of 1 and loss of 0) and Two different DRFs exist (loss of 1 and loss of 0) and

may coexistmay coexist To detect DRF => a delay has to be inserted before To detect DRF => a delay has to be inserted before

reading back memory content (usually ~ 10-100 ms)reading back memory content (usually ~ 10-100 ms) Can be easily add to any test algorithmCan be easily add to any test algorithm Test time increase dramatically !Test time increase dramatically !

Fault models: linked faultsFault models: linked faults

Linked faults are two or more faults (coupling faults) that Linked faults are two or more faults (coupling faults) that affect the same cellaffect the same cell

Can be of the same type ( i.e. CF x->y and CF z->y )Can be of the same type ( i.e. CF x->y and CF z->y )or of different types ( i.e. CF x->y and TFor of different types ( i.e. CF x->y and TFriserise y ) y )

They can hide each other (They can hide each other (fault maskingfault masking): Extremely difficult to ): Extremely difficult to detectdetect

ii jj kk ll ii kk ll

<<;1>;1>

<<;0>;0> <<;0>;0><<;1>;1>

2 CF2 CFidid faults faults 2 CF2 CFidid linked faults linked faults

Relation between Relation between functional faults and fault functional faults and fault modelsmodels

SAFSAF

CFCF

Shorts between data Shorts between data lineslines

Crosstalk between Crosstalk between data linesdata lines TFTF

Cell can be set to 0 Cell can be set to 0 and not to 1 (or vice and not to 1 (or vice versa)versa)

AFAF

Address line stuckAddress line stuck Open in address lineOpen in address line Shorts between Shorts between

address linesaddress lines Open decoderOpen decoder Wrong accessWrong access Multiple accessMultiple access

Cell stuckCell stuck Driver stuckDriver stuck Read/write line stuckRead/write line stuck Chip-select line stuckChip-select line stuck Data line stuckData line stuck Open in data lineOpen in data line

NPSFNPSF Pattern sensitive Pattern sensitive

interaction between interaction between cellscells

Relation between functional Relation between functional faults and fault models faults and fault models (examples)(examples)

Vss

WL

BL BL

Vdd

11

2233

44

55 66

77

1, 2, 1, 2, 33: : SA0SA0 44: : AF for cells AF for cells

after the openafter the open 5, 6: 5, 6: State State

Coupling FaultsCoupling Faults 7: 7: SAF (depending SAF (depending

on the cell on the cell content and the content and the technology)technology)

dynamic Read Destructive Faultdynamic Read Destructive Faultin the core cell in the core cell [ETS04][ETS04]

Defect 1Defect 1

Defect 1 involves a dynamic Defect 1 involves a dynamic Read Destructive FaultRead Destructive Fault

I / O DATAI / O DATA

R O

WR

O W

DE

CO

DE

RD

EC

OD

ER

MEMORYMEMORY

ARRAYARRAY

C O L U M NC O L U M N

D E C O D E RD E C O D E R

Tn3Tn3

Tn2Tn2

Tn1Tn1

Tp2Tp2

Tp1Tp1

SS SBSB Tn4Tn4

WLWL

BLBBLBBLBL

DefectDefect Fault Fault ModelModel

Min Min Res(kRes(k))

11 dRDFdRDF ~130~130

22 RDF; DRDFRDF; DRDF ~8~8

33 RDF; DRDFRDF; DRDF ~3~3

44 TFTF ~25~25

55 IRF; TFIRF; TF ~100~100

66 TFTF ~2000~2000

dynamic Read Destructive Faultdynamic Read Destructive Faultin the core cellin the core cell

Lower resistive size of Defect 1Lower resistive size of Defect 1 more read operations are required to more read operations are required to sensitizesensitize the fault the fault

w0 r0 r0 r0 r0 r0

dynamic Read Destructive Faultdynamic Read Destructive Faultin the core cellin the core cell

Detection of dRDF as function of resistance value, cycle time and number of read operation

0

2

4

6

8

10

1,6 1,8 2 2,5 3 3,5 4 6 8 10

Cycle time (ns)

R (

MO

hm)

w-r

w-r-r

w-r-r-r

w-r-r-r-r

w-r-r-r-r-r

No Fault

Validity of fault modelsValidity of fault models

Use of Inductive Fault Analysis at the Use of Inductive Fault Analysis at the layout levellayout level Generate defect sizes, location and layers Generate defect sizes, location and layers

(according to what may really happen in the (according to what may really happen in the fab.)fab.)

Place the defect on a model of the layoutPlace the defect on a model of the layout Extract the schematic and electrical Extract the schematic and electrical

parameters for the defective cellparameters for the defective cell Deduce and check possible fault modelsDeduce and check possible fault models

Results depend on the used technology Results depend on the used technology and fab. processesand fab. processes

14,8%14,8%17,8%17,8%DRFDRF

3,3%3,3%0%0%ICFICF

13,2%13,2%9,9%9,9%SCFSCF

7,0%7,0%0%0%TFTF

11,9%11,9%21,0%21,0%SOFSOF

49,8%49,8%51,3%51,3%SAFSAF

<9<9mm<2<2mmSpot SizeSpot Size

SUMMARYSUMMARY



Test Algorithms: notations Test Algorithms: notations usedused

: indicates address ascending order: indicates address ascending order

: indicates address descending order: indicates address descending order

w0 : write 0 at current locationw0 : write 0 at current location

w1 : write 1 at current locationw1 : write 1 at current location

r0 : read current location, expecting a 0r0 : read current location, expecting a 0

r1 : read current location, expecting a 1r1 : read current location, expecting a 1

(….): algorithm element(….): algorithm element

{(…),(…),…,(…)}: full algorithm{(…),(…),…,(…)}: full algorithm

Test algorithmsTest algorithms

Full Full Behavioural test is Behavioural test is definitively definitively too consuming (3.n.2too consuming (3.n.2nn))

Classical and early memory testing Classical and early memory testing methods with test time proportional methods with test time proportional toto n (zero-one, checkerboard, …)n (zero-one, checkerboard, …) nn2 2 and n.logand n.log22(n) (walking1/0, ping-pong, (n) (walking1/0, ping-pong,

GalGalpatpat,, Galcol, Galcol, …) …)

Test algorithm: Zero-OneTest algorithm: Zero-One

This minimal test consists of writing 0s and This minimal test consists of writing 0s and 1s in the memory1s in the memory Step1: write 0 in all cellsStep1: write 0 in all cells Step2: read all cells (0 expected)Step2: read all cells (0 expected) Step3: write 1 in all cellsStep3: write 1 in all cells Step4: read all cells (1 expected)Step4: read all cells (1 expected)

O(n)O(n) test test Fault coverage:Fault coverage:

Not all AFs detectedNot all AFs detected SAFs detected if the adress decoder is fault freeSAFs detected if the adress decoder is fault free Not all TFs and CFs detectedNot all TFs and CFs detected

Test algorithm: Test algorithm: CheckerboardCheckerboard

Cell are divided in two groupsCell are divided in two groups Step1: write 1 in all green cells and 0Step1: write 1 in all green cells and 0 in pink cellsin pink cells Step2: read all cellsStep2: read all cells Step3: write 0 in all green cells and 1 in pink cellsStep3: write 0 in all green cells and 1 in pink cells Step4: read all cellsStep4: read all cells

O(n)O(n) test test Fault coverage:Fault coverage:

Not all AFs detectedNot all AFs detected SAFs detected if the adress decoder is fault freeSAFs detected if the adress decoder is fault free Not all TFs and CFs detectedNot all TFs and CFs detected

This test is able to detect bridging faultsThis test is able to detect bridging faults

Test algorithms: GALPAT Test algorithms: GALPAT and Walking 1/0and Walking 1/0

Memory is filled with 0s (or 1s) except for the Memory is filled with 0s (or 1s) except for the base-cell which contains a 1 (0)base-cell which contains a 1 (0)

During theDuring the test the base cell walks through the test the base cell walks through the memorymemory

Difference between GALPAT and W 1/0 is in Difference between GALPAT and W 1/0 is in reading the base cell reading the base cell

0 0 0 0 0 0 0 0

0 1 0 0 1 0 0 0

0 0 0 0 0 0 0 0

Walking 1/0Walking 1/0

0 0 0 0 0 0

0 1 00 1 0

0 0 00 0 0

GALPATGALPAT

Test algorithms: GALPAT Test algorithms: GALPAT and Walking 1/0and Walking 1/0

All AFs are detected and locatedAll AFs are detected and located All SAFs are detected and locatedAll SAFs are detected and located All TFs are detected and locatedAll TFs are detected and located All CFs are also detected and locatedAll CFs are also detected and located But both are But both are O(nO(n22)) tests tests other tests have been proposed as a shorter other tests have been proposed as a shorter

alternative (0(nalternative (0(n3/23/2):): Sliding diagonalSliding diagonal Butterfly (only neighboorhood cells of the base cell are read)Butterfly (only neighboorhood cells of the base cell are read) GALCOLGALCOL

1 0 0 0 00 1 0 0 00 0 1 0 00 0 0 1 00 0 0 0 1

0 0 1 0 00 0 0 1 00 0 0 0 11 0 0 0 00 1 0 0 0

0 1 0 0 00 0 1 0 00 0 0 1 00 0 0 0 11 0 0 0 0

Test algorithms test timeTest algorithms test time

Number of operationsNumber of operations

nn nn n.logn.log22nn nn2 2 (hr!!)(hr!!)

1Mb1Mb 0.0630.063 1.261.26 18.3318.33

16Mb16Mb 1.011.01 24.1624.16 4691.34691.3

256Mb256Mb 16.1116.11 451451 1200959.91200959.9

2Gb2Gb 128.9128.9 3994.43994.4 76861433.776861433.7

8774 Years !!8774 Years !!

March testsMarch tests

The test is "marching" through the The test is "marching" through the memorymemory

The test is composed of March The test is composed of March elements represented between ()elements represented between ()

March tests are the simplest testMarch tests are the simplest tests s (optimal ?)(optimal ?) to detect most of the to detect most of the functional faultsfunctional faults

March tests: March tests: example of example of MATS++MATS++

{{(w0); (w0); (r0,w1); (r0,w1); (r1,w0,r0)}(r1,w0,r0)}

For i=0 to n-1For i=0 to n-1 Write 0 in cell CWrite 0 in cell Cii

For i=0 to n-1For i=0 to n-1 Read cell CRead cell Cii and check its content (0 expected) and check its content (0 expected) Write 0 in cell CWrite 0 in cell Cii

For i=n-1 to 0 For i=n-1 to 0 Read cell CRead cell Cii and check its content (1 expected) and check its content (1 expected) Write 0 in cell CWrite 0 in cell Cii Read cell CRead cell Cii and check its content (0 expected) and check its content (0 expected)

March tests: March tests: example of example of MATS++MATS++

{{(w0); (w0); (r0,w1); (r0,w1); (r1,w0,r0)}(r1,w0,r0)}

Takes 6n operations when used bit-Takes 6n operations when used bit-wisewise

All SAFs are detected All SAFs are detected All AFs unlinked with TFs are detectedAll AFs unlinked with TFs are detected All AFs linked with TFs are detectedAll AFs linked with TFs are detected All TFs are detectedAll TFs are detected

00 11

March test summaryMarch test summary

Name Ref. algorithm

MATS [NAI79] { (w0); (r0,w1);(r1)}

MATS+ [ABA83] {(w0);(r0,w1); (r1,w0)}

MATS++ [VAN91] {(w0);(r0,w1);(r1,w0,r0)}

March X [VAN91] {(w0);(r0,w1);(r1,w0);(r0)}

March C- [MAR82] {(w0);(r0,w1);(r1,w0);(r0,w1);(r1,w0);(r0)}

March A [SUK81] {(w0);(r0,w1,w0,w1);(r1,w0,w1);(r1,w0,w1,w0);(r0,w1,w0)}

March Y [VAN91] {(w0);(r0,w1,r1);(r1,w0,r0);(r0)}

March B [SUK81] {(w0);(r0,w1,r1,w0,r0,w1);(r1,w0,w1);(r1,w0,w1,w0); (r0,w1,w0)}

March GS [VAN93] {(w0);(r0,w1,r1,w0,w1);(r1,w0,r0,w1);(r1,w0,w1,w0); (r0,w1,r1,w0);Del;(r0,w1,r1);Del;(r1,w0,r0)}

March M [MIK96] {(w0);(r0,w1,r1,w0);(r0);(r0,w1);(r1);(r1,w0,r0,w1,);(r1);(r1,w0)}

March LR [VAN96] {(w0);(r0,w1);(r1,w0,r0,w1);(r1,w0);(r0,w1,r1,w0,);(r0)}

March U [VAN97] {(w0);(r0,w1,w0,w1,r1);(r1,w0,w1,w0,r0);(r0,w1,w0,w1,r1); (r1,w0,w1,w0,r0; (r0)}

March LA [VAN99] {(w0);(r0,w1,r1,w0);(r0,w1); (r1,w0,r0,w1); (r1,w0)}

March SR [VAN00] { (w0);(r0,w1,r1,w0);(r0,r0); );(w1), (r1,w0,r0,w1); (r1,r1)}

Name Ref. algorithm

MATS [NAI79] { (w0); (r0,w1);(r1)}

MATS+ [ABA83] {(w0);(r0,w1); (r1,w0)}

MATS++ [VAN91] {(w0);(r0,w1);(r1,w0,r0)}

March X [VAN91] {(w0);(r0,w1);(r1,w0);(r0)}

March C- [MAR82] {(w0);(r0,w1);(r1,w0);(r0,w1);(r1,w0);(r0)}

March A [SUK81] {(w0);(r0,w1,w0,w1);(r1,w0,w1);(r1,w0,w1,w0);(r0,w1,w0)}

March Y [VAN91] {(w0);(r0,w1,r1);(r1,w0,r0);(r0)}

March B [SUK81] {(w0);(r0,w1,r1,w0,r0,w1);(r1,w0,w1);(r1,w0,w1,w0); (r0,w1,w0)}

March GS [VAN93] {(w0);(r0,w1,r1,w0,w1);(r1,w0,r0,w1);(r1,w0,w1,w0); (r0,w1,r1,w0);Del;(r0,w1,r1);Del;(r1,w0,r0)}

March M [MIK96] {(w0);(r0,w1,r1,w0);(r0);(r0,w1);(r1);(r1,w0,r0,w1,);(r1);(r1,w0)}

March LR [VAN96] {(w0);(r0,w1);(r1,w0,r0,w1);(r1,w0);(r0,w1,r1,w0,);(r0)}

March U [VAN97] {(w0);(r0,w1,w0,w1,r1);(r1,w0,w1,w0,r0);(r0,w1,w0,w1,r1); (r1,w0,w1,w0,r0; (r0)}

March LA [VAN99] {(w0);(r0,w1,r1,w0);(r0,w1); (r1,w0,r0,w1); (r1,w0)}

March SR [VAN00] { (w0);(r0,w1,r1,w0);(r0,r0); );(w1), (r1,w0,r0,w1); (r1,r1)}

March SS [HAM02] {(w0);(r0,r0,w0,r0,w1);(r1,r1,w1,r1,w0);(r0,r0,w0,r0,w1); (r1,r1,w1,r1,w0; (r0)}

March test Fault Coverage March test Fault Coverage (example)(example)

AlgorithAlgorithmm

Fault CoverageFault CoverageOperatOperat

ion ion countcount

SSAAFF

AFAF TFTF CFCFinin

CFiCFidd

CFCFdydynn

SCSCFF

Linked faultsLinked faults

MATSMATS AlAlll

SomeSome 4.n4.n

MATS+MATS+ AlAlll

AllAll 5.n5.n

MATS+MATS+++

AlAlll

AllAll AllAll 6.n6.n

March March XX

AlAlll

AllAll AllAll AllAll 6.n6.n

March March C-C-

AlAlll

AllAll AllAll AllAll AllAll AllAll AllAll 10.n10.n

March March AA

AlAlll

AllAll AllAll AllAll All linked CFids, some CFins All linked CFids, some CFins linked with CFidslinked with CFids 15.n15.n

March March YY

AlAlll

AllAll AllAll AllAll All TFs linked with CFinsAll TFs linked with CFins 8.n8.n

March March BB

AlAlll

AllAll AllAll AllAllAll linked CFids, all TFs linked All linked CFids, all TFs linked

with CFids or CFins, some with CFids or CFins, some CFins linked with CFidsCFins linked with CFids

17.n17.n

March test Fault Coverage March test Fault Coverage (example for single and two cell (example for single and two cell FFMs in %)FFMs in %)

AlgorithAlgorithmm

Single-Cell FFMsSingle-Cell FFMs Two-cell FFMsTwo-cell FFMsOperatOperat

ion ion countcountSFSF TFTF WW

DFDFRDRDFF

DRDRDFDF IRFIRF

CFCF

ststCFCFdsds

CFCF

trtrCFCFwdwd

CFCF

rdrd

CFCFdrdrdd

CFCF

irir

MATS+MATS+ 101000

5050 --101000

--101000

5050 2525 2525 -- 5050 -- 5050 5.n5.n

March March BB

101000

101000

--101000

--101000

7575 6262 5050 -- 5050 -- 5050 17.n17.n

March March UU

101000

101000

--101000

--101000

101000

6666 101000

--101000

--101000 13.n13.n

March March C-C-

101000

101000

--101000

--101000

101000

6666 101000

--101000

--101000 10.n10.n

March March LRLR

101000

101000

--101000

--101000

101000

6666 101000

--101000

--101000 14.n14.n

March March SRSR

101000

101000

--101000

101000

101000

101000

6666 101000

--101000

7575 101000 14.n14.n

March March SSSS

101000

101000

101000

101000

101000

101000

101000

101000

101000

101000

101000

101000

101000 22.n22.n

Testing of Neighborhood Testing of Neighborhood Pattern-Sensitive FaultsPattern-Sensitive Faults

Active NPSF (ANPSF):Active NPSF (ANPSF): Each base cell must be read in state 0 and in state 1, for all Each base cell must be read in state 0 and in state 1, for all

possible transitions in the neighborhood patternpossible transitions in the neighborhood pattern (k-1).2(k-1).2k k possible patterns, (type-1: k=5, type-2: k=9)possible patterns, (type-1: k=5, type-2: k=9)

Passive NPSF (PNPSF):Passive NPSF (PNPSF): Each base cell must be written and read in state 0 and in Each base cell must be written and read in state 0 and in

state 1, for all permutations in the neighborhood patternstate 1, for all permutations in the neighborhood pattern 22k k possible patternspossible patterns

Static NPSF (SNPSF):Static NPSF (SNPSF): Each base cell must be read in state 0 and in state 1, for all Each base cell must be read in state 0 and in state 1, for all

permutations in the neighborhood patternpermutations in the neighborhood pattern 22k k possible patternspossible patterns


It is essential to minimize the number of It is essential to minimize the number of writes during NPSF testingwrites during NPSF testing

SNPSF patterns are produced following SNPSF patterns are produced following an Hamiltonian sequence (hamiltonian an Hamiltonian sequence (hamiltonian distance of 1 between patterns, Gray distance of 1 between patterns, Gray code for example): k+2code for example): k+2kk-1 writes-1 writes

ANPSF and PNPSF patterns are ANPSF and PNPSF patterns are produced following an Eulerian produced following an Eulerian sequence : k+k.2sequence : k+k.2kk writes writes


NNumber of writes umber of writes further reduced by testing further reduced by testing the neighborhoods simultaneouslythe neighborhoods simultaneously

Tilling method: number of Tilling method: number of writes divided by kwrites divided by k

Two-group methodTwo-group method (type-(type-1 only): number of writes 1 only): number of writes divided by 4divided by 4

B

a

bd

c

Group 1Group 1 Group 2Group 2

Basic NPSF location Basic NPSF location algorithmalgorithm

write base-cells with 0;write base-cells with 0;looploop

apply a pattern;apply a pattern; {it could change the base-cell from 0 to 1}{it could change the base-cell from 0 to 1}

read base-cell;read base-cell;endloop;endloop;write base-cells with 1;write base-cells with 1;looploop

apply a pattern;apply a pattern; {it could change the base-cell from 1 to 0}{it could change the base-cell from 1 to 0}

read base-cell;read base-cell;endloop;endloop;

Basic NPSF detection Basic NPSF detection algorithmalgorithm

write base-cells with 0;write base-cells with 0;looploop

apply a pattern; {it could change the base-cell from 0 to 1} apply a pattern; {it could change the base-cell from 0 to 1} read base-cell;read base-cell;

endloop;endloop;write base-cells with 1;write base-cells with 1;looploop

apply a pattern; {it could change the base-cell from 1 to 0}apply a pattern; {it could change the base-cell from 1 to 0}endloop;endloop;read base-cell;read base-cell;

Only valid for ANPSF or SNPSF for which no Only valid for ANPSF or SNPSF for which no transition is needed in the base celltransition is needed in the base cell

Tilling method cannot be used as base cells are Tilling method cannot be used as base cells are changingchanging

NPSF testing algorithm NPSF testing algorithm summarysummary

AlgorithmAlgorithm LocationLocation Fault coverageFault coverage Operation Operation countcountSAFSAF TFTF NPSFNPSF

AA PP SS

TDANPSF1GTDANPSF1G NN LL DD 163.5 n163.5 n

TLAPNPSF1GTLAPNPSF1G YY LL LL LL LL LL 195.5 n195.5 n

TLAPNPSF2TTLAPNPSF2T YY LL LL LL LL 5122 n5122 n

TLAPNPSF1TTLAPNPSF1T YY LL LL LL LL 194 n194 n

TLSNPSF1GTLSNPSF1G YY LL LL 43.5 n43.5 n

TLSNPSF1TTLSNPSF1T YY LL LL 39.2 n39.2 n

TLSNPSF2TTLSNPSF2T YY LL LL 569.8 n569.8 n

TDSNPSF1GTDSNPSF1G NN LL DD 36.125 n36.125 n

DDetectietection or on or

LLocatioocationn

AActivective PPassiveassive SStatictatic

type-type-11oror

type-type-22TTilling illing or 2-or 2-

GGroup roup methodmethod

Test of Word-Oriented Test of Word-Oriented MemoriesMemories

For SAFs and TFs which involve only one For SAFs and TFs which involve only one cell use data background and its cell use data background and its complement instead of 0 and 1complement instead of 0 and 1

MATS+ for a 4 bit memoryMATS+ for a 4 bit memory

Data background = 0101Data background = 0101

{{(w0101); (w0101); (r0101,w1010); (r0101,w1010); (r1010,w0101)}(r1010,w0101)}

Test of Word-Oriented Test of Word-Oriented MemoriesMemories

For CFs involving cells in different words use data For CFs involving cells in different words use data background and its complement instead of 0 and 1background and its complement instead of 0 and 1

For CFs involving cells in the same word:For CFs involving cells in the same word: If the write operation dominates the CF, no problemIf the write operation dominates the CF, no problem If the CF dominates the write operation, CFIf the CF dominates the write operation, CF inin are detected but are detected but

for CFid data background has to be replaced by B data for CFid data background has to be replaced by B data backgroundbackground

For SCFs and BFs data background has also to be For SCFs and BFs data background has also to be replaced by logreplaced by log22B+1 data backgroundB+1 data background

FUNCTIONAL RAM TESTING Christian LANDRAULT [email protected].

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Transcript of FUNCTIONAL RAM TESTING Christian LANDRAULT [email protected].