FSI China IC Manufacture Annual Summit 2007 Final

15
Copyright © 2007 | FSI International | All Rights Reserved always thinking // better ® 1/15 The Financial Benefits of All Wet Photoresist Removal for 200mm China IC Manufacture Annual Summit Wuxi, China November 29, 2007

description

A presentation at China (Wu Xi)) IC manufacturing Summit in 2007 to promote innovated process solution.

Transcript of FSI China IC Manufacture Annual Summit 2007 Final

Page 1: FSI China IC Manufacture Annual Summit 2007   Final

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The Financial Benefits of All Wet Photoresist Removal

for 200mm

China IC Manufacture Annual SummitWuxi, China

November 29, 2007

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Outline

• Ion Implantation and PR Stripping Challenge• FSI ZETA® System ViPR™ process capability• Financial Benefit of All-Wet PR stripping

– Process / Production Cycle Time Reduction– Improved Clean Space Productivity– Reduced Capital Investment

• FSI ZETA® System Installed Base Update• Summary

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CMOS – Si Doping by Ion Implantation

15 layers on 90nm and up CMOS process

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⊗dehydrogenated,

amorphouscarbon layer

Key Factor on Implanted PR removal: Dopant / Dose / Energy

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Multiple Process Flexibility for IC fabrication

• FEOL– All-Wet Photoresist Strip (ViPR™)– Metal Strip for Salicide Formation

(PlatNiStrip™ )– Contact Clean

• BEOL– Cu/low-k Post-Ash Clean– Al/Cu Post Ash Clean (DSP)

• Back End Process• Wafer Bumping

– Photoresist Strip – Flux / Oxide Removal

• General – Wafer Reclaim

x8 ChemicalIn one tool

Fresh chemicalby POU mixing

Closed ChamberFSI ZETA® System = Batch Spray Technology

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Asher Residue

ZETA® System ViPR™ Process Eliminates Most Ash Steps

Patterned Photoresist

Clean Wafer

Etch or ion implant

Anneal and/or photo

Asher

ZETA® G3

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Comparison: ZETA® System vs. Wet Bench55keV, 1E15 As Implant

ZETA® System ViPR™ Process 13.5 min

Immersion 170°C for 30 min

• Residue remains• Process is not

feasible in a wet bench

• All PR removed• Direct comparison

shows ViPR™ process is more effective

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ZETA® System with ViPR™ Capability

UHDGate

ContactPlug

B-Gap Eng.

SDE Engineering

Wt / Channel Eng. Twin WellD/Well

CCD

S/D

Isolation

HALO Pocket

DPG1.0E+17

1.0E+16

1.0E+15

1.0E+14

1.0E+13

1.0E+12

1.0E+11

Dos

e (a

tom

s/cm

2 )

Energy (keV)0.1 1 10 100 1000 10000

Requires Ashing

FSI’s ViPR™Technology Capability

Traditional Wet Process Capability

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Reduce Production Cycle Time Significantly

All Wet Strip & Clean

gate gate

Process Cycle Time

Cap

ital

Cos

t

25mins 105mins

FSI’s ViPR™ Process All-Wet PR Stripping

Traditional Ash + Wet PR Stripping

Post Ash Clean

gate gate

Photoresist Ashing

+Batch Queue

gate gatedamagelayer

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Reduce Production Cycle Time Significantly

PR Stripping Process Cycle Time

0.00

5.00

10.00

15.00

20.00

25.00

30.00

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Mask Layers

Accu

milia

ted

Proc

ess

Cyc

le T

ime

(hr)

Ash+BenchFSI Zeta 200 ViPR

Cycle timeSaving

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> 250 WPH rate efficiency for Photoresist stripping process

Improve Clean Room Space Efficiency200mm Wafers

FSI Zeta 200ViPR

(6.3 M2)> 250 WPH

Wet Bench(19M2)

>250 WPH

Asher(6M2)

> 90WPH

Asher(6M2)

>90WPH

Asher(6M2)

>90WPH

ZETA® SystemAll-Wet

Ash + Wet Bench

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Improve Clean Room Space Efficiency200mm Wafers

0

50

100

150

200

250

300

350

10.8 21.6 32.4 43.2 54.0 64.8 75.6 86.4

Fab Capacity (1000's Wafers/ Month)

Cle

an S

pace

( m

2 )

Asher+BenchFSI Zeta 200 ViPR

Clean roomSpaceSaving

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Reduce Capital Investment

0

5,000

10,000

15,000

20,000

25,000

30,000

35,000

10.8 21.6 32.4 43.2 54.0 64.8 75.6 86.4

Fab Capacity (1000's Wafers/ Month)

Dep

osite

d C

apita

l (10

00's

US

D)

Asher + BenchFSI Zeta 200 ViPR

Overall CapitalSaving

BetterCapital turnover

efficiency

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ZETA® System Installation Base> 120 Systems in Production Worldwide

20 Systems Currently with ViPR™ Capability

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Zeta ViPR Summary

• ZETA® system's ViPR™ technology for all wet photoresist removal has been proven in a manufacturing environment.

• Financial Benefits:– Reduce resist stripping process time from

1.5–3hrs to 0.5hrs.– Improve overall fab production cycle time per

mask layer by 3 to 5%– Lower capital investment by 15 to 33%