FPGA vs. Processor based Embedded...

FPGA vs. Processor based

Embedded Systems

Eng. Monther Abusultan

Outline

Embedded Systems

ASIC

Ps

FPGAs

Processors Types

Discrete/Hard/Soft Processor Cores.

Parallelism.

Case Study

Reconfigurable Computing.

Conclusion

2 FPGA vs. Microprocessors: Embedded Systems

Embedded Systems

What is an Embedded System?

Embedded systems refer to devices that are built to handle

one or a few pre-established tasks.

The computer controlling the whole thing is built into or

'embedded' within the device.

How can the embedded computer be implemented?

ASIC

P

FPGA


ASICs

Application Specific Integrated Circuits

Designed to perform one single task (dedicated computers)

Much smaller and less complicated than general purpose.

computers.

Only used for mass production due to high Non-Recurring

Engineering (NRE) cost, but cheap per unit price.

i.e. cellphones, ipods, …

Iphone 4 touchsreen

controller


P

Microprocessors

Digital circuits that can perform mathematical/logical operation

that are flashed into the Ps memory.

uPs are programmed using a programming language (Assembly, C,

Java, …).

Code is compiled and translated into binary representation

(Opcodes/operands).

Executes instructions (functions) sequentially.


FPGAs

Field Programmable Logic Arrays

An FPGA is an array

of Configurable Logic

Blocks (CLBs)

Logic functions can

be implemented on

multiple CLBs and

connected together.


Logic Elements

Lookup Table LUTs (Combinatorial Logic)

SRAM cells (storing logic functions)

Multiplexers

Flip-Flops (Clocked Registered Logic)

16-bit SR

flip-flop

clock

mux

y

qe

a

b

c

d

16x1 RAM

4-input

LUT

clock enable

set/reset

Programmable

interconnect

Programmable

logic blocks

Required function Truth table

a b c y

00001111

00110011

01010101

01010111

y = (a & b) | c

&

|

a

b

cy

AND

OR


FPGAs - Continue

Unlike Ps which execute stored programs, FPGAs implement hardware by describing the function of each CLB and the interconnections between them.

Digital systems implemented on FPGAs can be programmed using VHDL/Verilog languages or by drawing schematics.

VHDL stands for: Very High Speed Integrated Circuits (VHSIC) Hardware Description Language.

Verilog stands for: Verify Logic

FPGAs (or programmable logic) are the fastest growing segment of the semiconductor industry!!


FPGA Development Kit


Quick Comparison: FPGA vs. P

Custom HDL (FPGA) Software (P)

Architecture Custom Architecture Fixed Architecture

Development Long Short

Resources Uses a lot of resources

(dependable on complexity

and speed)

Fixed (the size of the

microprocessor)

Speed Very fast (concurrency) Relatively Slow (sequentially)

Noise Immune (partial

reconfiguration)

Once corrupted, can’t be fixed.

Parallel

processing

Easy to achieve (inherent) Can perform one task at time

Flexibility Very flexible (Can even

implement Ps and custom

logic)

Limited by architecture and

integrated modules


Hard and Soft Processor cores

Certain FPGAs have integrated Hard processor cores on

chip (PowerPC,…)

FPGAs can implement Soft processor cores.

Soft processor cores, are Ps that are designed using a

HDL and are ready to be implemented on an FPGA.

MicroBlaze: 32bit RISK P (Xilinx)

NIOS II: 32bit RISK P (Altera)

Picoblaze: 8bit P (Xilinx)


Processors Options

A designer can select one of the following options to

implement their system:

Discrete Processor

Hard Processor Core

Soft Processor Core


Discrete Processor

A discrete microprocessor solution is the traditional approach that

designers have used.

These types of processors are available from a multitude of vendors

and have a wide range of features.

A discrete microprocessor is implemented as an ASIC with a

specific peripheral set along with the processor core.

Common, but does not always meet design requirements, espicially

when custom logic is needed.


Hard Processor Core

Has dedicated silicon on the FPGA.

Allows to operate with a core frequency, speed ratings similar to

that of a discrete microprocessor.

Exists in an environment where the surrounding peripherals can be

customized for the application.

Does not provide the ability to adjust the core for the application.

Does not have the flexibility of adding a processor to an existing

design.

Only specific FPGAs have the option of having a hard-core.

Example: PowerPC in Virtex-4/5 FPGAs


Soft Processor Core

A soft-core processor solution is one that is implemented entirely

in the logic primitives of an FPGA.

Because of this implementation, the processor will not operate at

the speeds or have the performance of a hard-core or a discrete

solution.

Expanded functionality and flexibility.

Price of additional units?


Soft Processor Core - Cont

Slower, lower performance… Then why?

Provides a substantial amount of flexibility through the

configurable nature of the FPGA.

Can be customized after being implemented to meet changes in

design requirements (need additional I/O?)

Additional custom peripherals can be added on the same FPGA as

well as custom instructions (Parallel MULTs/FFTs …)

Combined the best of both worlds:

Ease of coding software programs

Customizable logic fabric


Parallelism

CPUs run at a faster clock speeds ~3GHz

FPGAs run at best at a clock speed of ~1GHz

So what is the catch? The important difference is that a single conventional CPU can

only process a single instruction per clock cycle.

By contrast, an FPGA can be configured as multiple virtual processors capable of functioning in parallel.

A configuration such as this will therefore quickly outweigh a clock speed disadvantage 10x-15x.


Case Study: DOA Estimation

Direction-of-Arrival estimation algorithm was

implemented on an FPGA.

Once using Custom HDL.

And another time using integrated soft processor core.

The performance, resources, and development time were

compared and analyzed.

A soft processor core was used in

the comparison to reduce the

amount of modifications on

the system hardware.


Custom-HDL Implementation

T


9-bit, 1024 point, 8 parallel channels, fixed point FFT.

Radix-4 implementation.

Cooley–Tukey algorithm

Custom-HDL FFT


Custom-HDL Implementation

Custom HDL-Based

FPGA Hardware

ADC Driver: Custom VHDL

Sample RAM: Xilinx Core

FFT: Xilinx Core

FFT RAM: Xilinx Core

Freq Detect: Custom VHDL

Bartlett DOA: Custom VHDL


Microprocessor-Based Implementation

Microprocessor-Based

FPGA Hardware



FFT: MicroBlaze

Freq Detect: MicroBlaze

Bartlett DOA: MicroBlaze

Xilinx MicroBlaze Soft Processor Core

32-bit RISC

280 Dhrystone MIPS @235 MHz Clock


Hardware vs. Software (FFT)

Single Channel FFT – Fixed Point

HW SW Comparison

Time 34.3 us 104,825 us HW is ~3000 times faster

Area HW is 45% smaller

- Slices 418 1494

- Registers 1271 2172

- LUTS 929 2349

- LUT RAM 144 69

- DSP Slices 9 5

- BRAM (18k) 7 64

Performance Comparison


Hardware vs. Software (FFT)

8-Channel FFT – Fixed Point

HW SW Comparison

Time 34.3 us 838,600 us HW is ~24,500 times faster

Area SW is ~4 times smaller

- Slices 3347 1494

- Registers 10,172 2172

- LUTS 7434 2349

- LUT RAM 1147 69

- DSP Slices 72 5

- BRAM (18k) 20 64

NOTE: MicroBlaze resources do not change

once instantiated



Hardware vs. Software (Frequency Detection) [Linear Search]

Fixed Point Frequency Detection

HW SW Comparison

Time 10.3 us 1007 us HW is ~100 times faster

Area HW is ~100 times smaller

- Slices 15 1494

- Registers 27 2172

- LUTS 18 2349

- LUT RAM 0 69

- DSP Slices 2 5

- BRAM (18k) 0 64


once instantiated



Hardware vs. Software (DOA) [Matrix Multiplication]

Bartlett Fixed Point DOA Estimation

HW SW Comparison

Time 1.73 s 310 s HW is ~180 times faster

Area HW is ~8 times smaller

- Slices 58 1494


- LUTS 165 2349

- LUT RAM 0 69

- DSP Slices 0 5

- BRAM (18k) 0 64


once instantiated



Hardware vs. Software (Complete Computation)

Fixed Point DOA Computation

HW SW Comparison

Time 46 s 839,917 s HW is ~18,000 times faster

Area SW is ~4 times smaller

- Slices 3420 1494


- LUTS 7617 2349

- LUT RAM 1147 69

- DSP Slices 74 5

- BRAM (18k) 20 64


once instantiated



Hybrid Implementation

Balancing performance with

development time



FFT: Xilinx Core

FFT RAM: Xilinx Core

Freq Detect: Custom VHDL

Bartlett DOA: MicroBlaze


Hardware vs. Software vs. Hybrid (Complete Computation)

Fixed Point DOA Computation

HW SW Hybrid Comparison

Time 46 s 839,917 s 1351 s Hybrid is ~30x slower than HW

Hybrid is ~620x faster than SW

Area

- Slices 3420 1494 4841

- Registers 10399 2172 12,978

- LUTS 7617 2349 9783 Hybrid is ~1.5x larger than HW

- LUT RAM 1147 69 1216 Hybrid is ~5x larger than SW

- DSP Slices 74 5 79

- BRAM (18k) 20 64 84



Flexibility

Did we reach limit for flexibility?

Not yet!

Can FPGAs get more Field Programmable than being

configured after being shipped?

Yes… With FPGAs everything is possible!

How about reconfiguring it dynamically?

Guess what …


Partial Reconfiguration

The Virtex Series family of FPGAs for Xilinx and Altera’s most

recent 28nm FPGA Stratix V support partial configuration.

It is the ability to reconfigure a distinct portion of the FPGA

while the remaining is still in operation!!!!

It is done while the system is active.

Partial reconfiguration has opened the door for applications:

That require downloading of different designs’ bitstreams into the

same area of the device.

That require the flexibility to modify the parts of a design without

having to either reset or completely reconfigure the entire device.


Huh?!

Due to the cutting-edge SRAM-based FPGA technology:

The FPGA can be divided into sections, each section can be

reconfigured while the rest are fully operational.

Once configured it can be used to process data.


Dynamic and Static Sections

The dynamic parts are independent parts of the input design

that need not be active during the whole design.

The static part is such a part of the input design that needs to

be active throughout the whole design process.

The static part must include:

The configuration controller.

The logic required for

data and interface management.


Partial Reconfiguration

Advantages:

Increased system performance: No loss of performance or

functionality with unaffected portions of a design.

Ability to change hardware: FPGAs can be updated at any

time and on the fly.

Hardware sharing: same hardware can be used to perform

multiple functions which leads to:

Reduced Area .

Reduced Power consumption.

Overall lower cost.

Damaged Hardware? You can move your dynamic part from a

damaged area of the FPGA to a healthy area (space applications)


Conclusion

FPGAs:

Are Inherently Parallel.

Are Field Configurable.

Can house Processors.

Dynamically Partially Reconfigurable.

Are Awesome!!!!!

Should we still use Processors?

Yes we still do need them (Application)!

More Digital Design/Embedded Systems courses?


References

FPGA vs. Microprocessors: Embedded Systems36

Abusultan, M.; Harkness, S.; LaMeres, B.J.; Yikun Huang; , "FPGA implementation of a Bartlett direction of

arrival algorithm for a 5.8ghz circular antenna array," Aerospace Conference, 2010 IEEE , vol., no., pp.1-10, 6-

13 March 2010

“Design and Test of FPGA-based Direction-of-Arrival Algorithms for Adaptive Array Antennas”, Brock J.

LaMeres, Raymond Weber, Yikun Huang, Monther Abusultan, and Sam Harkness, 2011 IEEE Aerospace

Conference, 5-12 March 2011, Big Sky, MT, USA.

Enoch O. Hwang, “Digital Logic and Microprocessor Design With VHDL”, ©2004.

LaMeres, B.J.; Gauer, C.; , "Dynamic reconfigurable computing architecture for aerospace applications,"

Aerospace conference, 2009 IEEE , vol., no., pp.1-6, 7-14 March 2009

Rahul Dubey, “Introduction to Embedded System Design Using Field Programmable Gate Arrays”, ©2009

http://www.eetimes.com/design/programmable-logic/4014808/How-to-take-advantage-of-partial-

reconfiguration-in-FPGA-designs/

http://www.vlsi-world.com/content/view/48/47/1/0/

Xilinx.com

Altera.com

http://www.eetimes.com/design/programmable-logic/4014808/How-to-take-advantage-of-partial-reconfiguration-in-FPGA-designs/


































Questions…

Just before you start asking…

If you are interested in doing research in these areas, get

a hold of me.

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