FPGA IMPLEMENTATION OF BASEBAND MODULATOR AND DEMODULATOR FOR SOFTWARE DEFINED RADIO (SDR)

8/7/2019 FPGA IMPLEMENTATION OF BASEBAND MODULATOR AND DEMODULATOR FOR SOFTWARE DEFINED RADIO (SDR)

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FPGA IMPLEMENTATION OF BASEBAND

MODULATOR AND DEMODULATOR FOR SOFTWARE

DEFINED RADIO (SDR)

UNDER THE GUIDANCE OF

PROF. SASWAT CHAKRABARTIH. O. D. of G. S. SANYAL SCHOOL OF TELECOMMUNICATION

INDIAN INSTITUTE OF TECHNOLOGY, KHARAGPUR

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Introduction

In the Project Baseband Modulator andDemodulator with different modulationschemes (BPSK, QPSK, 16 QAM, 64 QAM) on

same platform of FPGA is implemented. Spartan 3 FPGA kit of Xilinx is used as Logic

Design Environment.

The Xilinx ISE and ModelSim simulator is usedfor synthesis, implementation and simulation.

Programming is done in Verilog.

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What is SDR

SDR refers to the technology wherein software

modules running on a generic hardware

platform consisting of DSPs and general

purpose microprocessors are used toimplement radio functions such as generation

of transmitted signal (modulation) at

transmitter and tuning/detection of receivedradio signal (demodulation) at receiver.

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The main concept under the SDR philosophy is

to overcome the traditional communication

systems characterized by fixed functional

modules, by providing high flexible and

versatile hardware architectures which can be

easily reconfigured to support different

standards, multiple radio protocols, enhancedfeature and functional upgrades.

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Why SDR

Commercial wireless communication industry is currentlyfacing problems due to constant evolution of protocolstandards (2.5G, 3G, and 4G) ,therefore spending hugeamounts of money on waveform specific wireless

infrastructure that cannot be upgraded to new standardsand services is simply not a good business decision.

Thus the wireless market of the future will demandinexpensive hardware, expandability, interoperability, andthe implementation of advanced signal processingfunctionsi.e. a software radio. In his way SDR implementsfuture-proof infrastructure against continually evolvingstandards.

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FPGA

Configurable computing machines like Fieldprogrammable gate arrays (FPGAs) are idealsoftware radio platforms as they have high-

speed processing, while retaining the flexibilityand programmability of software radiotechnology.

The flexibility of having the ability to integrate

logic design with signal processing is pushingdesigners to replace traditional digital signalprocessors (DSPs) with FPGAs.

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Block Diagram of Transmitter

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Pulse Shaping Filter

Its purpose is to make the transmitted signal suit

better to the communication channel by limiting the

effective bandwidth of the transmission.

By filtering the transmitted pulses, the intersymbol

interference caused by the channel can be kept in

control.

Inverse sinc filter is use to equalize the frequencydistortion due to DAC.

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QPSK ModulatedWaveform

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16-QAM ModulatedWaveform

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Block Diagram of Receiver

Regenerated

Information

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Early Late Gate Clock Synchronizer

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Demodulated Output at Receiver by QPSK

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Demodulated Output at Receiver by 16-QAM

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FutureWorks

Software Defined Radio which is more robustand suitable for real time applications can beimplemented by extension of our current

project which till now included implementationof modulator and demodulator with variousmodulation schemes on FPGA.

Implementation of OFDM Technology

Standards related to communications likeWiFi,WiMax, ZigBee can be implemented.

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References

[1] Sudhakar Reddy.P, Ramachandra Reddy.G Design and FPGAImplementation of Channel Estimation, Vol.25 No.2 (2009), European

Journal of Scientific Research Method and Modulation Technique forMIMO System

[3] Ifeachor, E. C., Jervis, B.W., Digital Signal Processing: A PracticalApproachAddisson-Wesley Publishing Co., 1996.

[4] Emmanuel C. Ifeachor, et. al., Digital Signal Processing, Addison-Wesley,1993.

[5] APPLICATION NOTE 3853 Equalizing Techniques Flatten DACFrequency Response

[6] Practical FIR Filter Design in MATLAB, Ricardo A. Losada. TheMathWorks, Inc.

[7] Gary BreedAnalyzing Signals Using the Eye Diagram November 2005High Frequency Electronics

[8] Paolo Zicari, Pasquale Corsonello, Stefania PerriA high flexible Early-Late Gate Bit Synchronizer in FPGA-Based Software Defined Radios

[9] Nirmala Chamath Wijeratne IMPLEMENTATION OF THE EARLY-LATEGATE SYNCHRONIZER AS AN SOPC COMPONENT

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Thank You

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FPGA IMPLEMENTATION OF BASEBAND MODULATOR AND DEMODULATOR FOR SOFTWARE DEFINED RADIO (SDR)

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