FPGA Camp - National Instruments Presentation
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Transcript of FPGA Camp - National Instruments Presentation
Integrated Platforms
Agenda
• About National Instruments
• Integrated Software Platform
• Standardized Hardware Interfaces
– PXI
– cRIO– cRIO
• Direct Operations in 40 Countries
• More Than 1,000 Products, 3,900 Employees, and
600 Alliance Program Members
• Corporate Headquarters in Austin, Texas
National Instruments Overview
Distributors
Direct Sales Offices
• Established in the year 1998
• Headquartered in Bangalore
• Established R&D unit (Bangalore) in the year 2004
• Amongst the fastest growing NI branches, worldwide
National Instruments India
• Top brand recall in Test, Embedded & Measurement
space, in IndiaEFY Award twice for Design and Simulation Software for NI LabVIEW
Integrated Software Platforms
LabVIEW
Graphical Development Environment
• Compiled graphical development environment
• Similar to flowcharting
• Development time reduction of 4 to 10X
Customization but Made Easy
Application Development Environments
(LabVIEW, LabVIEW FPGA, Measurement Studio for VC++ & VB)
NI Toolkit
Integration
Custom IP (from 3rd –parties/ partners)
PXI Express Bus (4 GB/s + Timing and Synchronization)
Custom ModuleNI
Module
FPGA
Processor/s Host Processor
Conditioning Custom I/O
Customizable Off-the-Shelf Hardware with
LabVIEW FPGA and Reconfigurable I/O
•Create custom I/O without knowledge of hardware design or VHDL
•Easily integrate with other I/O
•Simple interface to existing VHDL or Verilog
Networked I/O
PC Boards
Handheld
Embedded
(FPGA)
Wireless
Sensor
LabVIEW Everywhere
Windows, Mac, Linux, Sun
PC Boards
Workstation
Industrial Computer (PXI)
Tektronix Open Windows
Oscilloscopes
`
Host Interface VI
NI LabVIEW FPGA Module
`
FPGA VI
Compiling G for a FPGA
VHDL
VI
Synthesis
Compilation
1001100011100110001110011
0001110011000111001100011
1001100011100110001110011
0001110011000111001100011
10011000111001100011 3
BitStream
Xilinx
LabVIEW FPGA
Synthesis
Component Level IP (CLIP)• Allows instantiation of any HDL IP on LabVIEW FPGA
targets
• No LabVIEW diagram dataflow restrictions
• HDL can run in multiple clock domains
• CLIP can interface to the LabVIEW FPGA code
• Exposes to the user the full capability of the underlying
FPGA technologyFPGA
FPGA technology
Custom HDL
Soft
Processors
Xilinx IP
Cores
FPGA
I/O
CLIP
CLIP
LabVIEW FPGA VI
Unified Environment for Multiple Platforms
Product Platforms
PXI
Hardware Customization
PXI Express
ControllerFlexRIO
Host Processor
NI Adapter
Module
Integrated IO
NI RF Up/
Downconverter
FPGA Processor
IFRIOPower
Amplifier
Low Noise
ADC/ DACRF InterfaceFront-end
Backplane
ControllerFlexRIO
Custom Adapter
Module
Integrated IO
Custom Up/
Downconverter
FPGA
Processor
.
.
.
Low Noise
Amplifier
Switching
Filters
PXI Express
Backplane
PXI Combines Standard Technologies
PXI backplane•Bus Technology
•Timing
•SynchronizationChassis
PXI controller•OS Technology
•ADEs
Peripheral Slots
NI FlexRIO System Architecture
PXI
Host PC
NI FlexRIO Adapter Module
• Synchronization
• Clocking/triggers
• Power/cooling
• Data streaming
NI FlexRIO FPGA Module PXI Platform
• Virtex-5 FPGA
• 132 digital I/O lines
• 128 MB of DDR2 DRAM
• Interchangeable I/O
• Customizable by users
• Adapter MDK
Custom I/O with Standardized Interfaces
• Third-party adapter modules
• Custom-design integration services
Module #1 of FlexRIO for Test
NI FlexRIO Adapter Module
• Defined Interface• Defined Interface
• Defined Driver support for FPGA lines
• Defines I/O for NI LabVIEW FPGA
• Self identification
• Custom connectivity
• Adapter Module Development Kit
Module #1 of FlexRIO for Test
Xilinx Virtex-5 FPGA
So
cke
ted
CLI
P
CLIP CLIP CLIP…
Custom Module Development
Socketed CLIP Socketed CLIP
LabVIEW FPGA VI
DRAM
Memory
DRAM
Memory
PXI Bus
So
cke
ted
CLI
P
Custom Front End
Module #1 of FlexRIO for Test
Product Platforms
Compact RIO
CompactRIO Reconfigurable Embedded System
Reconfigurable FPGA Circuitry
Custom hardware reliability, optimization
Flexible timing, triggering, synchronization
Extreme Durability
-40 to 70 °C temperature range
50 G shock, Industrial certifications
Real-Time OS
200 MHz Pentium Class
Reliable embedded control,
analysis, and logging
179.6 mm (7.07 in)
88.1 mm (3.47 in)
Small Size, Low Power Consumption
179.6 x 88.1 mm (7.07 x 3.47 in)
11 to 30 VDC power, 17 W max (7-10 W typ.)
Isolated Industrial I/O
Signal conditioning for ±80 mV to ±250 V
Junction box integrated into module
NI CompactRIO Embedded System Architecture
Real-Time Processor
RIO FPGAI/O I/O
I/O
I/OI/O
I/O
Rea
l-T
ime
Co
ntr
olle
r
I/O
Modules
I/OI/O
Connectivity ADCSignal Conditioning �
• DC power with redundant supply inputs
• 50 G shock
• -40 to 70 C temperature
CompactRIO Software Integration• Single development environment
• Now you can use the power of industry standard LabVIEW to design NI RIO™ FPGA hardware using intuitive graphical programming.
FPGA VI
Host VI
The Long Tail Opportunities
Thank YouThank You