FPGA-based Speed Control of Three-Phase Induction...

International Journal of Electronic Engineering Research ISSN 0975 - 6450 Volume 3 Number 2 (2011) pp. 265-277 © Research India Publications http://www.ripublication.com/ijeer.htm

FPGA-based Speed Control of Three-Phase Induction Motor

Farzad Nekoei1, Yousef S. Kavian1 and Otto Strobel2

1School of Engineering, Shahid Chamran University, Ahvaz, Iran 2Esslingen University of Applied Science, Germany

Abstract

The field programmable gate array (FPGA) technology provides programmable system-on-chip (PSoC) environments for designing modern digital ASIC controllers for specific applications. This paper presents a FPGA based speed control IC for three-phase induction motor drives. The sinusoidal PWM is realized on a single FPGA chip from Xilinx Inc. to provide controlling switching pulses for inverter block. In the experiment, the speed control is done by adjusting modulation index and frequency from the FPGA side. The performance of the proposed FPGA based drive is compared with soft drive approach in Electrical Machine Laboratory where variable voltage and frequency power supplies are used for motor speed control. Simulation and experimental results, given to verify the implemented SPWM control IC, demonstrate that FPGA-based solution for induction motor drive is flexible, low cost and high-performance.

Keywords: Induction motor drives, field-programmable gate arrays (FPGAs), sinusoidal PWM, speed control.

Introduction Nowadays FPGA technology received much attention by industrial researchers for designing and implementing high-performance ASIC digital controller with dedicated architecture for induction motor control [1,2]. The FPGAs provide programmable system-on-chip designing environments by incorporating the programmability of programmable logic devices and the architecture of gate arrays [3] which makes it an appreciate solution for drive applications. Unlike traditional solutions based on microprocessors [4] and digital signal processing (DSP) devices [5, 6], the FPGAs introduce hardware parallelism by breaking the paradigm of sequential execution. A field programmable gate array is a set of digital logic gates and configurable

266 Farzad Nekoei et al

logic blocks which can be reprogrammed to meet the desired motor-control features [7]. While the assembly and high level languages like C are used by microcontrollers and DSPs, the technology independent hardware description languages including VHDL [8] and Verilog [9] are used to program FPGAs. The digital FPGA-based solutions have been successfully employed for motor control applications. Lin-Shi et al. [10] presented a FPGA-based implementation of a hybrid control strategy applied to a permanent-magnet synchronous motor. In [11] a new space vector pulse width modulation algorithm for multilevel multiphase voltage source converters with switching state redundancy was introduced and implemented in a field-programmable gate array using a five-level five-phase inverter feeding a motor. Zhang and Li [12] applied stochastic theory to the design and implementation of field-oriented control of an induction motor drive using a single FPGA device and integrated neural network algorithms. A field-programmable gate array based adaptive back-stepping control system with radial basis function network observer was proposed to control the mover position of a linear induction motor by Lin et al. [13]. Parma and Dinavahi [14] presented a FPGA based realization of a real-time simulator for a complete induction machine drive. Lin et al. [15] presented a FPGA based position sensor less control scheme for four-switch three-phase brushless dc motor drives. A FPGA-based adaptive back-stepping sliding-mode controller was proposed by Lin et al. [16] to control the mover position of a linear induction motor drive to compensate for the uncertainties including the friction force. Three anti-windup algorithms were proposed for a digital PI-speed controller to improve the control performance of variable-speed motor drives by Zhang et al. [17]. The designs were implemented in a FPGA device and stochastic theory was employed to enhance the computational capability. Idkhajine et al. [18] presented a fully integrated solution for synchronous motor control based on Actel Fusion field-programmable gate array. A field-programmable gate array based robust radial basis function network control system was proposed to control the mover position of a linear induction motor by Lin et al. [19]. Sathyan et al. [20] developed a new low-cost IC for control of BLDC motors. Cirstea et al. [21] presented a sensor less neural network based induction motor control scheme using very-high-speed integrated circuits hardware description language. The primary contribution of this paper is to design and implement a FPGA-based digital controller for three-phase induction motor drives. The sinusoidal pulse width modulation method is realized on FPGA to generate controlling switching pulses for insulated-gate bipolar transistors (IGBTs) in drive system implementing a Verilog hardware description language (HDL) code. The rest of the paper is organized as follows. Section 2 presents the principals of induction motor control. The FPGA based motor drive system is presented in section 3. The motor parameters are identified in section 4. The experimental set up and practical results are described in section 5. Finally the paper is concluded in section 6. Principals of Induction Motor Control The steady-state model, shown in figure 1, is used for induction motor control [22].

FPGA-based Speed Control of Three-Phase Induction Motor 267

The parameters of model are described in Table 1. The motor slip, s, is defined as;

e

resωω−ω

= (1)

where eω and rω are excitation frequency and motor shaft speed, respectively. The power supplied to the shaft and the shaft torque can be expressed as;

222shaft iR

ss1P −

= (2)

])XX(s)RsR[(

sRV3T 2

2122

21e

22

ine +++ω=

(3)

Consequently, the motor torque could be controlled by varying the magnitude of the applied stator voltage and excitation frequency. The motor speed control is accomplished by adjusting the input voltage until the machine torque for a given slip matches the load torque. . Furthermore, with constant input voltage, the input current increases as the input frequency decreases.

Figure 1: Induction motor steady-state model.

Table 1: The induction machine steady-state model parameters.

Parameter Description

1R The stator series resistance

1X The stator leakage reactance

2R The rotor series resistance

2X The rotor leakage reactance

mX The magnetizing reactance

CR The shunt resistance due to the core losses


FPGA Technology for Induction Motor Drive The FPGA-based digital ac drive control structure is illustrated in figure 2 where the FPGA provide controlling signals for IGBTs. This architecture gives a brief description for 3-phase induction motor drives. In SPWM approach a sine wave is employed as reference signal which is compared to a triangular carrier signal to provide switching pulses [22]. The output signal is high when the amplitude of reference signal, RA , is greater than that for carrier signal , CA , otherwise is low. The

modulation index is defined asC

R

AA

m = . By changing modulation index from 0 to 1

the output voltage changes from 0 to spwmV which could be used for motor speed control.

H1 H2 H3

L3L2L1

FPGA based Digital Controller

Sinusoidal PWM

Figure 2: FPGA-based digital drive control The internal block diagram of the proposed programmable FPGA-based SPWM control IC is depicted in figure 3 which consists of six blocks for settings of the amplitude, frequency, and phase of stator voltage, the switching frequency of PWM, and the delay time for IGBTs. These parameters are adjusted by some external hardware, such as digital switches analog to digital converter (ADC), digital switches, and an AVR microcontroller. The blocks were implemented on FPGA using Verilog hardware description language.

a. Discrete Sine Wave. This module generates a discrete sine wave as reference signal by providing different samples from a continues sine wave, shown in figure 4(a). The frequency of sine wave varies between 20Hz to 60Hz which could be used for motor speed control.

b. Pulse Width Modulation. The PWM module consists of 8-bit up/down counter which makes a triangle wave used as carrier signal. As shown in figure 4(b),


the voltage of motor and consequently the speed of motor could be adjusted by modulation index (M).

c. Delay Time. Practically the IGBTs have delay times called dt for switching from high to low which is around s1μ [23]. The Delay Time module receives PWM outputs and provides s1μ delay time for turning IGBTs to protect the phase legs from short circuiting.

d. Phase Conrol. This module enables each phase when the previous one is in 120 degrees position, shown in figure 4(c).

e. Direction Module. This module changes the motor rotation direction, shown in figure 4(d).

f. Frequency Divider. This module provides the frequencies that are needed for discrete sine wave and PWM modules from oscillator signal. The motor speed could be controlled by changing the output frequency this module.

Figure 3: The internal block diagram of FPGA based digital controller.

Figure 4(a): Discrete sampling from continues sine wave.


Figure 4(b): The effect of modulation index on output voltage of SPWM.

Figure 4(c): The phase control.

Figure 4(d): The rotor direction control.

The Induction Motor Parameters Identification and estimation of motor parameters and dynamics are essential for analysis and control tasks. The parameters of proposed induction motor was identified


in Electrical Machine Laboratory (EML) using two commonly tests employing the equivalent circuit shown in figure 5.

Figure 5: The Induction Motor Equivalent Circuit. The no-load test This test is employed for calculation the magnetizing reactance mX and shunt resistor

CR . Here the three phase induction motor is derived under nominal frequency and voltage condition without any load. The results of this test are V220V alminno = ,

A1.1I loadnon =− , VAR420Q = and P=60 watt. Consequently:

66.806P

VR2

C == (4)

23.115QVX

2

m == (5)

The locked-rotor test In this test the three phase induction motor shaft is locked and input voltage of motor is increased until the motor current achieved to nominal current. The achieved results are A9.1I alminno = , A55V rotorlocked =− , VAR110Q = , and P=140 watt. According to these results:

78.38IPR 2eq ==

(6)

47.30IQX 2eq ==

(7)

The important curves including voltage-current and frequency-current curves of 3-phase induction motor are shown in figures 6(a) and 6(b). The three phase induction motor is derived by two different power supplies, called soft drive. The first one is a variable voltage power supply with a fixed 50HZ frequency and the second one is a variable frequency power supply with a fixed voltage.


Figure 6(a): Current vs. voltage behavior of induction motor .

20 25 30 35 40 45 50 55 600.25

0.3

0.35

0.4

0.45

0.5

Frequency(HZ)

Cur

rent

(mA

)

Figure 6(b): Current vs. frequency behavior of induction motor . Experimental Results The experimental set up is shown in figure 7. This setup consists of FPGA controlling board and power circuit board. The FPGA-Xilinx SPARTAN 3- XC3S400-5I-PQ208 is used to develop a full digital controller for 3-phase motor drive. In the experimental system, the SPWM switching frequency of the inverter can be adjusted and the dead time is 1μs. The control algorithms were implemented by Verilog-hardware description language codes. The power circuits consists of two smart power modules (SPMs) [23] where each SPM consists of six sets of IGBT-type power transistors for 3-phase induction motor drive. The collector-emitter voltage of the IGBT is 600 V, and the collector current in dc is 30A. The IGBTs are used in switching mode where the forward characteristic of the IGBT can be represented by a linear substitute characteristic, shown if figures 8(a) and 8(b).

20 40 60 80 100 120 140 160 180 200 2200.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

1.1

1.2

Voltage(volt)

Cur

rent

(mA

)


The block diagram of experimental set up is shown in figure 9. The power circuit converts single-phase or three-phase AC input signals to DC output signals which consist of two diode bridges, four electrolytic capacitors and four tantalum capacitors. The AVR microcontroller is programmed to control the speed of fans according to heat sink temperature, calculating discrete current of each phase and sending it to FPGA and calculating RPM of the motor using an opto-counter.

Figure 7: The experimental setup.

Figure 8(a): Turn-off switching mode.


Figure 8(b): Turn-on switching mode.

Figure 9: The block diagram of motor speed control by FPGA.

In the experiment, the speed control by voltage and frequency are used to evaluate the performance of the proposed drive system. First the motor speed control is done by variable voltage and frequency power supplies in Electrical Machine Laboratory called motor soft drive. Then FPGA is used for motor speed control as hard drive. The


motor speed control results achieved from both approaches are shown in figures 10 and 11. In frequency control approach, the frequency changes from 20Hz to 60Hz and for voltage based control, the voltage changes from 20V to 220V by adjusting modulation index (M) in sinusoidal PWM from 0.1 to 1. As shown, FPGA based control give a perfect tracking with the soft drive, for both low and high speeds. From the experimental results, it demonstrates that the proposed FPGA-based controller IC for motor drive is effective and correct.

Figure 10.: Voltage based motor speed control using soft drive and FPGA based solution.

Figure 11: Frequency based motor speed control using soft drive and FPGA based solution

500

1000

1500

2000

2500

3000

20 45 70 95 120 145 170 195 220 245Voltage(V)

Spee

d(R

PM)

Soft DriveFPGA based Drive

1000

1400

1800

2200

2600

3000

3400

20 40 60

Freqency (HZ)

Spee

d(RP

M) Soft Drive

FPGA based Drive


Conclusion FPGA-based design and implementation of digital drive controllers is a challenging issue to overcome the limitation of microcontroller and DSP based solutions for employing induction motors in industries. This paper has successfully demonstrated the design and implementation of an FPGA-based speed control for 3-phase induction motors drive. The sinusoidal PWM was realized on a single FPGA chip from Xilinx Inc. to provide flexible controlling switching pulses for IGBTs in inverter block. The performance of the proposed FPGA based drive was successfully compared with soft drive approach in machine laboratory where variable voltage and frequency power supplies are used for motor speed control. The FPGA based control gives a perfect tracking with the soft drive, for both low and high speeds. The major contributions of this paper are: first the successful FPGA based implementation of the sinusoidal PWM controller, then the successful application of the FPGA-based controller for 3-phase induction motor drive compared to soft drive done in Electrical Machine Laboratory. The proposed FPGA based solution could be reprogrammed for implementing future modern controllers for incorporating as part of the digital control loops for induction motor drive applications. References

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