Founder’s Day University of Portland School of Engineering.
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Transcript of Founder’s Day University of Portland School of Engineering.
Founder’s DayUniversity of Portland School of Engineering
CS-EE 481
Introduction Dan Allenby Background Dan Allenby Methods Ross Yamaguchi Results Kyle Yakubisin Conclusions Preston Boyd Demonstration Team Redwood
Founder’s DayUniversity of Portland School of Engineering
CS-EE 481
Founder’s DayUniversity of Portland School of Engineering
• Team Redwood’s Concept:– Chose to integrate electrical engineering with
human physiology.– In what manner to do this.– Heart health is significant in everyday life.
HRmax = 220 − Age
CS-EE 481
• The Idea:– Heart Rate Monitor
Founder’s DayUniversity of Portland School of Engineering
CS-EE 481
• The Goal:- Measure a user’s heart rate using advanced
technology commonly found in the industry.- Calculate heart rate and display accurate
values in an easily readable format.
- Analog input – Digital processing – Analog output.
Founder’s DayUniversity of Portland School of Engineering
CS-EE 481
Founder’s DayUniversity of Portland School of Engineering
Determine the scope of the projectBegan conceptualizing in May 2009
Determine the functionality of the projectConventional measurementAccurately calculate user’s heart rateEasily visible displayUpdates every second
How do we produce this functionality Choose to utilize MOSIS technology
CS-EE 481
Founder’s DayUniversity of Portland School of Engineering
Integration of all parts into a single unitMake analog circuitry compatible with MOSIS
Testing and De-buggingCheck and RecheckAdjust design for unforeseen complications
CS-EE 481
Founder’s DayUniversity of Portland School of Engineering
CS-EE 481
Sp02 Sensor Records the amount of hemoglobin in red blood cells
that pass through the user’s finger. The sensor generates a current that fluctuates with
each heartbeat.Analog Signal Processing Circuits
The information from the fingertip sensor must then be characterized and processed by analog circuitry consisting of several 741 op amps and a Schmitt Trigger.
Founder’s DayUniversity of Portland School of Engineering
CS-EE 481
Analog Signal Processing Circuits (cont’d) These components interface to characterize the
signal from the Sp02 sensor into a format that the MOSIS Chip can calculate.
MOSIS Calculates the user’s heart rate and outputs to
the LED drivers in a beats per minute format.LED
Used to display the user’s calculated heart rate.
Founder’s Day
University of Portland School of Engineering
CS-EE 481
Analog Circuit Schematic
Founder’s Day
University of Portland School of Engineering
CS-EE 481
CS-EE 481
Input is 1-bit signal from Analog Signal Processing Circuits
Calculates and Controls Desired Output Output is Three 4-bit BCD Digits that are
sent to the display
CS-EE 481
11-BitCounter
11-BitRegister
Z-1
Sampler
Divider Unit
Beat
ComparatorIf beats <= 230
12-Bit Register
10-Bit Counter
Heart Rate
Clock
Binary to BCD Converter
Sampler
CS-EE 481
BEAT
BEAT PULSE
Time
Time
CS-EE 481
11-BitCounter
11-BitRegister
Z-1
Sampler
Divider Unit
Beat
ComparatorIf beats <= 230
12-Bit Register
10-Bit Counter
Heart Rate
Clock
Binary to BCD Converter
CS-EE 481
32-Bit Divisor Register
32-Bit Remainder Register
32-BitSubtraction
32-Bit Multiplexer
16-BitQuotientRegister
8-BitOutputRegister
5-BitCounter
Beats
Clock
Reset
IF HR=0 IF HR=E
HeartRate
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BeatsBeats
fHeartrate
57600600
System Clock Frequency = 960 Hz
Beats = Clock cycles between pulses
CS-EE 481
CS-EE 481
TI Driver
TI Driver
TI Driver
8
8
8
HR0_(0-3)
HR1_(0-3)
HR2_(0-3)
7-Bit Signal
7-Bit Signal
7-Bit Signal
Drivers Displays
MOSIS Heart Rate Calculator and Output
Controller
CS-EE 481
Founder’s DayUniversity of Portland School of Engineering
CS-EE 481
Founder’s DayUniversity of Portland School of Engineering
CS-EE 481
University of Portland School of Engineering
Founder’s Day
System Results
CS-EE 481
Founder’s Day
University of Portland School of Engineering
CS-EE 481
Heart Rate MonitorWe have some error caused by noiseAll of the sections spoken about earlier came
together to create this prototype
Advice to juniors and sophomoresThe early and hard deadline of MOSIS was very
niceTry to get ahead whenever possiblePlan & allow for plenty of time to get tasks done
Founder’s DayUniversity of Portland School of Engineering
CS-EE 481
If we had more time:We would like to further clean up the signal Improve the accuracy of the system clockThus, improving the accuracy of the entire
system.
Possible continuation projects:Calculate & display the user’s %Sp02Wearable size and power source
Founder’s Day
University of Portland School of Engineering
CS-EE 481
Dr. Joseph Hoffbeck Dr. Peter Osterberg Andrew Owings of Nike Grant from the MOSIS Educational
Program (MEP) To everyone else that assisted us in
any way
Founder’s DayUniversity of Portland School of Engineering
CS-EE 481
Founder’s DayUniversity of Portland School of Engineering
Are there any questions?
Founder’s DayUniversity of Portland School of Engineering
CS-EE 481
CS-EE 481
11-BitCounter
11-BitRegister
Z-1
Sampler
Divider Unit
Beat
ComparatorIf beats <= 230
12-Bit Register
10-Bit Counter
Heart Rate
Clock
Binary to BCD Converter
CS-EE 481
Counts from 0 to 2047 then halts. If value is 2047 control signal is sent to
Output Register so output is set to zero. Beat Pulse loads current value of
counter to register then resets the counter to zero.
CS-EE 481
CS-EE 481
11-BitCounter
11-BitRegister
Z-1
Sampler
Divider Unit
Beat
ComparatorIf beats <= 230
12-Bit Register
10-Bit Counter
Heart Rate
Clock
Binary to BCD Converter
CS-EE 481
11-Bit Value representing the clock cycles from last count is inputed.
If input is less than 230 then control signal is set to logic high.
An input less than 230 represents an error.
CS-EE 481
Start
1. Subtract the Divisor register from the Remainder register and place the result in the Remainder register.
Test Remainder
2a. Shift the Quotient register to the left, setting the most significant bit to 1
2b. Restore the original value by adding the Divisor register to the Remainder register and place the sum in the Remainder register. Also shift the Quotient register to the left, setting the new least significant bit to 0
3. Shift the Divisor register right 1 bit
17th repetition?
Done
No: < 17 Repetitions
Yes: 17 repetitions
Remainder ≥ 0 Remainder < 0
CS-EE 481
11-BitCounter
11-BitRegister
Z-1
Sampler
Divider Unit
Beat
ComparatorIf beats <= 230
12-Bit Register
10-Bit Counter
Heart Rate
Clock
Binary to BCD Converter
CS-EE 481
Converts 8-Bit binary value to Binary Coded Decimal.
Each block is a conditional adder.
If input is >= 5 then 3 is added to value, else the input is copied to the output.
CS-EE 481
TI-SN74LS47N
12345678 9
10111213141516
A
B
C
D
+5V
LDS-AD16RI
+15V
1.5kΩ
Common Anode 7-Segment
Display
BCD to 7-Segment Decoder/Driver
12345679
10