Format-Major Project 2013

8/13/2019 Format-Major Project 2013

1/7

[i]

CERTIFICATE OF THE SUPERVISOR

This is to certify that thesis/Report entitled DESIGN OF A DIGITAL FILTER

USING FDATOOL AND SYNTHESIS IN XILINX which is submitted by

SONAL AGRAWAL AND TEJSHREE SENGARin partial fulfillment of the

requirement for the award of degree B.E. in Electronics & Telecommunication

Engineering to Chattisgarh Swami Vivekanand Technical University, Bhilai

as a record of the candidate own work carried out by them under my/our

supervision. The matter embodied in this thesis is original and has not beensubmitted for the award of any other degree.

SIGNATURE SIGNATURE

HEAD OF THE DEPARTMENT SUPERVISOR

Assistant Professor

Electronics & Telecommunication, Electronics & Telecommunication,

Bhilai Institute of Technology, Bhilai Institute of Technology,

Durg. Durg.


2/7

[ii]

CERTIFICATE BY THE EXAMINER

The thesis entitledDESIGN OF A DIGITAL FILTER USING FDATOOL AND

SYNTHESIS IN XILINX which is submitted by SONAL AGRAWAL AND

TEJSHREE SENGAR is hereby recommended for the award of the degree of

Bachelor of Engineering in the faculty of Electronics & Telecommunication

Engineering to Chattisgarh Swami Vivekanand Technical University, Bhilai

Internal Examiner External Examiner

Electronics & Telecommunication,

Bhilai Institute of Technology,

Durg.


3/7

[iii]

ACKNOWLEDGEMENT

It gives us immense pleasure to convey our heartfelt appreciation to the institution. We

sincerely thank the institution providing me with adequate knowledge to take on this but

interesting task.

We are grateful towards the management for providing us this opportunity to carry out

analysis of one of its ambitious projects. We would render our sincere thanks to our

project supervisor Mr. Atul Dwivedi who have been extremely helpful and co-operative

to share with us information and time..

Finally, We would not be able to finish our report without the support of our parents and

we thank them from the core of our heart.

Sonal Agrawal (3012809102)

Tejshree Sengar (3012809309)


4/7

[iv]

ABSTRACT

The field of very large circuit integrated (VLSI) signal processing concerns the design

and implementation of signal processing algorithms using application-specific VLSI

architecture including programmable digital signal processor and dedicated signal

processors implemented with VLSI technology. Digital filter plays an important role in

digital signal processing applications. Digital filter can also be applied in speech

processing applications, such as speech filtering, speech enhancement, noise reduction

and automatic speech recognition among others. The design of signal processing

algorithm is done using matlab FDA tool but it is implemented using VLSI .An interface

is created between matlab and Xilinx for algorithm design and design implementation.

This will lead to the real time implementation of many design algorithms. Using matlab

human speech filter will be designed, its GUI will be created and will be synthesized

using Xilinx. The filter will remove the noise from the input signal which can be heard.

In this paper Matlab program is used to implement a low-pass FIR filter using

rectangular window function. Designed low-pass FIR filter is used in the speech filtering

application. The filter is applied to a recorded speech signal to remove background noise

components of the speech signal. Signal comparison between filtered speech and original

speech shows that a noise signal of the original speech signal successively eliminates by

using this low pass filter.


5/7

[v]

LIST OF FIGURES

1.1 A basic filtering process Pg no. 1

1.2 Concept of digital filtering Pg no. 3

1.3 Response of non-ideal filter Pg no. 4

4.1 MATLAB window Pg no. 18

4.2 FDA tool Pg no. 19

4.3 Generating a GUI Pg no. 21

4.4 Blank GUI Pg no. 22

4.5 A simple GUI Pg no. 23

4.6 Project Navigator Pg no. 23

4.7 Direct-form realization of FIR filter Pg no. 28

5.1 Design flow Pg no. 31

6.1 Magnitude response Pg no. 36

6.2 Impulse response Pg no. 36

6.3 Step response Pg no. 36

6.4 GUI output of the signal hello hello hello Pg no. 38

6.5 Signal with noise Pg no. 38

6.6 Filtered signal Pg no. 39


6/7

[vi]

LIST OF TABLES

4.1 Analog versus Digital filtering Pg no. 27

5.1 FIR filter specifications Pg no.33

6.1 Variation of PSNR with order of filter Pg no. 37

6.2 Variation of PSNR with cut off frequency Pg no. 37


7/7

[vii]

LIST OF ABBREVATIONS

MATLAB MATrix LABoratory

DSP Digital Signal Processing

PSNR Peak Signal to Noise Ratio

VHDL Very High Speed Integrated Circuit Hardware Description

Language

IEEE Institute of Electrical and Electronics Engineers

FIR Finite Impulse Response

IIR Infinite Impulse Response

VLSI Very Large Scale Integration

FDA Filter Design and Analysis

GUIDE Graphic User Interface Design Equipment

IC Integrated Circuit

FPGA Field Programmable Gate Array

ASIC Application Specific Integrated Circuit

GUI Graphic User Interface

HDL Hardware Description Language

ADC Analog to Digital Converter

DAC Digital to Analog Converter

Format-Major Project 2013

Documents

Transcript of Format-Major Project 2013