FMA1125 Initialization and Register Description · FMA1125 Initialization and Register Description...

Fujitsu Microelectronics Europe MCU-AN-301002-E-V11 Application Note

TOUCH SENSOR CONTROLLER

FMA1125DC SERIES

INITIALIZATION AND REGISTER DESCRIPTION

APPLICATION NOTE

FMA1125 Initialization and Register Description Chapter 0 Revision History

Revision History

Date Issue

2009-09-28 V1.0, CHa First version

2010-05-12

V1.1, CHa Typos corrected, Control3 B3 behaviour corrected Added tuning hints Added raw data comment to Impedance Register description

This document contains 37 pages.

MCU-AN-301002-E-V11 - 2 - © Fujitsu Microelectronics Europe GmbH

FMA1125 Initialization and Register Description Chapter 0 Warranty and Disclaimer

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Please note that the deliverables are intended for and must only be used in an evaluation laboratory environment.

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Regarding hardware deliverables, FME warrants that they will be free from defects in material and workmanship under use and service as specified in the accompanying written materials for a duration of 1 year from the date of receipt by the customer.

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© Fujitsu Microelectronics Europe GmbH - 3 - MCU-AN-301002-E-V11

FMA1125 Initialization and Register Description Chapter 0 Contents

Contents

REVISION HISTORY.............................................................................................................. 2

WARRANTY AND DISCLAIMER........................................................................................... 3

CONTENTS ............................................................................................................................ 4

1 INTRODUCTION................................................................................................................ 7

2 INITIALIZATION OF THE TSC .......................................................................................... 8 2.1 I2C Host Interface and TSC connection to MCU ...................................................... 8 2.2 System Setup and Initialization................................................................................. 9

3 REGISTER MAP SUMMARY .......................................................................................... 11

4 REGISTER DESCRIPTIONS ........................................................................................... 12 4.1 PA0 – PA7 Alpha (0x00 – 0x07) ............................................................................. 12 4.2 Reference Delay (0x08) .......................................................................................... 12 4.3 Beta (0x09) ............................................................................................................. 13 4.4 AIC Wait Time (Wait before Calibration time, 0x0A) ............................................... 13 4.5 PA0 – PA7 Strength Threshold (0x0B – 0x12)........................................................ 13 4.6 Feature Select (0x13).............................................................................................. 14 4.7 Integration Time (0x14) ........................................................................................... 15 4.8 IDLE State Enter Time (0x15) ................................................................................. 15 4.9 Control 1 (0x16) ...................................................................................................... 15 4.10 Control 2 (0x17) ...................................................................................................... 16 4.11 PA Data Out (0x18)................................................................................................. 18 4.12 GPIO Data Out (0x19)............................................................................................. 18 4.13 PA Direction (0x1A)................................................................................................. 18 4.14 GPIO Direction (0x1B) ............................................................................................ 18 4.15 PA Configuration (0x1C) ......................................................................................... 19 4.16 GPIO Configuration (0x1D) ..................................................................................... 19 4.17 Calibration Interval (0x1E)....................................................................................... 19 4.18 GINT Interrupt Mask (0x1F) .................................................................................... 20 4.19 GINT Interrupt Pending Clear (0x20) ...................................................................... 20 4.20 PA EINT Enable (0x21)........................................................................................... 21 4.21 GPIO EINT Enable (0x22)....................................................................................... 21 4.22 Filter Period (0x23).................................................................................................. 21 4.23 Filter Threshold (0x24) ............................................................................................ 22 4.24 Control 3 (0x25) ...................................................................................................... 22



4.25 GPIO Interrupt Edge Enable (0x26) ........................................................................ 23 4.26 GPIO Input Bounce Cancelling Period (0x27)......................................................... 23 4.27 Register Check (0x28) ............................................................................................ 23 4.28 PA0_R_SEL~ PA3_R_SEL (0x29) ......................................................................... 24 4.29 PA4_R_SEL~ PA7_R_SEL (0x2A) ......................................................................... 24 4.30 REF_R_SEL (0x2B) ................................................................................................ 24 4.31 Beta Disable (0x2C) ................................................................................................ 24 4.32 GPIO0 - GPIO1 Dimming Unit Period (0x2D) ......................................................... 25 4.33 GPIO2 – GPIO3 Dimming Unit Period (0x2E)......................................................... 25 4.34 PA0 - PA1 Dimming Unit Period (0x2F) .................................................................. 25 4.35 PA2 – PA3 Dimming Unit Period (0x30) ................................................................. 25 4.36 GPIO0 Dimming Control (0x31) .............................................................................. 26 4.37 GPIO1 Dimming Control (0x32) .............................................................................. 26 4.38 GPIO2 Dimming Control (0x33) .............................................................................. 26 4.39 GPIO3 Dimming Control (0x34) .............................................................................. 26 4.40 PA0 Dimming Control (0x35) .................................................................................. 26 4.41 PA1 Dimming Control (0x36) .................................................................................. 27 4.42 PA2 Dimming Control (0x37) .................................................................................. 27 4.43 PA3 Dimming Control (0x38) .................................................................................. 27 4.44 GPIO0 - GPIO3 Dimming Mode (0x39)................................................................... 27 4.45 PA0 - PA3 Dimming Mode (0x3A)........................................................................... 27 4.46 Dimming Start (0x3B).............................................................................................. 28 4.47 Dimming Enable (0x3C) .......................................................................................... 28 4.48 PA0 – PA7 Strength (0x50 – 0x57) ......................................................................... 28 4.49 PA0 - PA7 Impedance (0x58 – 0x5F) ..................................................................... 29 4.50 PA0 - PA7 Reference Impedance (0x60 – 0x67) .................................................... 29 4.51 PA Touch Byte (0x68) ............................................................................................. 29 4.52 GINT Interrupt Pending (0x69)................................................................................ 29 4.53 PA Input Data (0x6A) .............................................................................................. 30 4.54 GPIO Input Data (0x6B) .......................................................................................... 30 4.55 PA Input BCU Data (0x6C) ..................................................................................... 30 4.56 GPIO Input BCU Data (0x6D) ................................................................................. 30 4.57 PA Input FIFO Data (0x6E) ..................................................................................... 31 4.58 GPIO Input FIFO Data (0x6F) ................................................................................. 31 4.59 Clock External (0xF7).............................................................................................. 31 4.60 Clock Internal (0xF8)............................................................................................... 31 4.61 BIAS OFF (0xF9) .................................................................................................... 32 4.62 BIAS ON (0xFA)...................................................................................................... 32



4.63 LTB Enable (0xFB).................................................................................................. 32 4.64 Wakeup SLEEP (0xFC) .......................................................................................... 32 4.65 Enter SLEEP (0xFD) ............................................................................................... 33 4.66 Cold Reset (0xFE)................................................................................................... 33 4.67 Warm Reset (0xFF)................................................................................................. 33

5 BASIC TUNING PROCESS............................................................................................. 34 5.1 Reference Delay ..................................................................................................... 34 5.2 Alpha....................................................................................................................... 35 5.3 Filter Period, Filter Threshold.................................................................................. 35 5.4 Impedance, Calibrated Impedance ......................................................................... 35

6 APPENDIX ....................................................................................................................... 37 6.1 Glossary.................................................................................................................. 37 6.2 Related Documents................................................................................................. 37


FMA1125 Initialization and Register Description Chapter 1 Introduction

1 Introduction The FMA1125 Touch Sensor Controller (TSC) offers a very effective and highly flexible way of implementing capacitive touch sensing for various applications. The TSC can be connected to virtually any host MCU by a two-wire I2C host interface, minimizing the number of connections needed.

The FMA1125 senses the touch by comparing the capacitance of the touch pad against an internal reference using the patented, purely digital technology of ATlab, Korea. This allows fast response to touch events, automatic calibration to environmental changes such as temperature or humidity using the hardware-implemented AIC™ (Automatic Impedance Calibration) as well as numerous parameters such as individual channel sensitivity to tune the sensing behaviour to fit the application’s needs. Because of the unique sensing method, the sensor is highly immune to disturbances caused e.g. by water drops.

The FMA1125 touch sensor controller is developed and owned by ATLab Inc., South Korea, and is distributed by Fujitsu Microelectronics Europe.


FMA1125 Initialization and Register Description Chapter 2 Initialization of the TSC

2 Initialization of the TSC

2.1 I2C Host Interface and TSC connection to MCU The FMA1125 uses a two-wire I2C interface for host connection. It operates at frequencies up to 400 kHz. By setting different chip IDs using the ID pin, two FMA1125 devices can be connected to one MCU I2C channel.

The recommended connection scheme is shown below (power and GND connections not shown):

SDASCLGPIO

INT

100R

100R

10pF10pF

3k3

3k3

SDASCLRESETTINT

VCC

3k3

3k3

VCC

10k

1µF

MCU TSC

MCU PCB TSC PCB

1k

10k

The I2C bus requires pull-up resistors between the bus lines and VCC. The value of the pull-up resistors is dependent of factors such as bus length, supply voltage, number of slaves, etc. usually values of some few kOhms are recommended. It can be beneficial to use one pull-up resistor of twice the desired value on every end of the bus instead of one resistor only (e.g. 2x 3k3). Additional series resistors and a small (some pF) filter capacitor close to the TSC IC are recommended to increase noise rejection and over-voltage protection of the I2C pins. This especially applies when the bus length exceeds ~15cm.

For more details about I2C timing, protocol and characteristics, please refer to the FMA1125 product data sheet and the I2C bus specification.

The TINT (Touch Interrupt) and GINT (General Purpose Interrupt) output pins of the TSC optionally can be connected to external interrupt input pins of the MCU in order to avoid software polling of the touch status. Interrupt polarity can be configured.

The TSC reset input pin should be made controllable by the host MCU circuit, either by connecting it to a GPIO pin of the MCU so that the host application can reset the TSC at startup, or by connecting it to the MCU reset circuit or power watchdog IC (if present). Please refer to the FMA1125 data sheet for power-up timing and voltage levels.



2.2 System Setup and Initialization

Figure 1: TSC System Setup

After system startup, the TSC configuration registers are pre-loaded with the factory default settings as shown in the register description. Therefore, the host MCU has to configure the TSC registers according to the application needs (sensitivity, APIS modes, etc.) after reset. This is done by the I2C communication bus, either by single write accesses to the relevant registers, or by a bulk transfer of all configuration registers. For details about communication timing, used I2C device address, please refer to the product data sheet.

For the following examples, the default device ID (0x68) of the FMA1125 will be used.

As mentioned, single or bulk read and write operations are supported. For single operations, the host MCU sends the register address for each register, followed by the data payload (write) or a repeated start condition with read command. So there is a full I2C sequence (START, ID, DATA, STOP) for every register access. The FMA1125 also supports bulk transfer of multiple registers with subsequent addresses. Hereby, only the first register address has to be transferred, and after every byte of transferred data, the internal address for the next transfer is incremented automatically. This is especially useful for initialization during startup or to read e.g. all strength registers. Burst mode allows higher data payload rates, because there is no additional addressing between the data byte transfers.

The initialization sequence during startup should look as follows:

1. Power up the system. Disable ext. interrupt for TINT/GINT on host MCU (if used) until initialization is completed

2. Wait ~300ms for system to stabilize

3. Initialize TSC configuration registers using the I2C interface

4. Issue a ‘Warm Reset’ command by writing arbitrary data to the Warm Reset Register. This activates the written configuration data.

5. Wait for ~10ms until the TSC reset and initial calibration is completed

6. Enable interrupts (if used)



Example for single write operation:

void I2C_Set_Register(unsigned char i2c_address, unsigned char register_address, unsigned char value)

{ I2C_Start(i2c_address, WRITE); // I2C Device address, WRITE (for address + data) I2C_Write(register_address); // Register Address I2C_Write(value); I2C_Stop(); }

Single read operation:

unsigned char I2C_Read_Register(unsigned char i2c_address, unsigned char register_address)

{ unsigned char result; I2C_Start(i2c_address, WRITE); // I2C Device address, WRITE for address I2C_Write(register_address); // Register Address I2C_Continue(i2c_address, READ); // swith to READ result = I2C_LastRead(); // read data from I2C I2C_Stop(); return result; }

Bulk read operation:

void I2C_BurstRead(unsigned char i2c_address, unsigned char start_reg_address, unsigned char count, unsigned char * buffer) { I2C_Start(i2c_address, WRITE); I2C_Write(start_reg_address); // send register address to be read I2C_Continue(i2c_address, READ); // Restart, with READ comand while (--count > 0) { *(buffer++) = I2C_Read(); // read register and write to buffer } *buffer = I2C_LastRead(); // read register (last read) I2C_Stop(); }

An example for device initialization (here using single transfers) could be as follows: const unsigned char tsc_init_data[] = { // This only contains the writable TSC registers. 5, // 0x01: ALPHA0 5, // 0x02: ALPHA1 5, // 0x03: ALPHA2 ... ...remaining configuration registers… ... 5, // 0x3B: DIMMING_START 4 // 0x3C: DIMMING_ENABLE } void wait(unsigned long int i) { while (i--) __wait_nop(); // wait loop } void TSC_Init(void) { unsigned char i; for (i=0; i<0x3c; i++) { // set TSC registers I2C_Set_Register(TSC_ID, i, tsc_init_data[i]);

} wait(1000); I2C_Set_Register(TSC_ID, TSC_WARM_RESET, 0x00); // issue warm reset, wait(50000); }


FMA1125 Initialization and Register Description Chapter 3 Register Map Summary

3 Register Map Summary Generally, there are three different register types in the FMA1125:

0x00 – 0x3C: Read/Writeable (Sensitivity/alpha, reference delay, …)

0x50 – 0x6F: Read-only (Touch strength, …)

0xF7 – 0xFF: Write-only (e.g. warm reset)

Please note, that after writing to a write-only register (e.g. warm reset), no ACK is generated by the FMA1127DA, so that the host SW should not wait for the ACK signal after issuing a warm reset by writing to address 0xFF.

Addr. (HEX) Register Name Addr.

(HEX) Register Name Addr. (HEX) Register Name

00 PA0 Alpha 26 GINT Interrupt Edge En. 5E PA6 Impedance 01 PA1 Alpha 27 GPIO Input Bounce Period 5F PA7 Impedance 02 PA2 Alpha 28 Register Check 60 PA0 Ref. Impedance 03 PA3 Alpha 29 PA0-3 Resistor Select 61 PA1 Ref. Impedance 04 PA4 Alpha 2A PA4-7 Resistor Select 62 PA2 Ref. Impedance 05 PA5 Alpha 2B Reference Resistor Select 63 PA3 Ref. Impedance 06 PA6 Alpha 2C Beta Disable 64 PA4 Ref. Impedance 07 PA7 Alpha 2D GPIO0-1 Dim. Unit Period 65 PA5 Ref. Impedance 08 Reference Delay 2E GPIO2-3 Dim. Unit Period 66 PA6 Ref. Impedance 09 Beta 2F PA0-1 Dim. Unit Period 67 PA7 Ref. Impedance 0A AIC Wait Time 30 PA2-3 Dim. Unit Period 68 PA Touch Byte 0B PA0 Strength Threshold 31 GPIO0 Dimming Control 69 GINT Interrupt Pending 0C PA1 Strength Threshold 32 GPIO1 Dimming Control 6A PA Input Data 0D PA2 Strength Threshold 33 GPIO2 Dimming Control 6B GPIO Input Data 0E PA3 Strength Threshold 34 GPIO3 Dimming Control 6C PA Input BCU Data 0F PA4 Strength Threshold 35 PA0 Dimming Control 6D GPIO Input BCU Data 10 PA5 Strength Threshold 36 PA1 Dimming Control 6E PA Input FIFO Data 11 PA6 Strength Threshold 37 PA2 Dimming Control 6F GPIO Input FIFO Data 12 PA7 Strength Threshold 38 PA3 Dimming Control 13 Feature Select (APIS, …) 39 GPIO0-3 Dimming Mode F7 CLK External 14 Integration Time 3A PA0-3 Dimming Mode F8 CLK Internal 15 IDLE State Enter Time 3B Dimming Start F9 BIAS Off 16 Control 1 3C Dimming Enable FA BIAS On 17 Control 2 FB LTB Enable 18 PA Data Out 50 PA0 Strength FC Wakeup SLEEP 19 GPIO Data Out 51 PA1 Strength FD Enter SLEEP 1A PA Direction 52 PA2 Strength FE Cold Reset 1B GPIO Direction 53 PA3 Strength FF Warm Reset 1C PA Configuration 54 PA4 Strength 1D GPIO Configuration 55 PA5 Strength 1E Calibration Interval 56 PA6 Strength 1F GINT Interrupt Mask 57 PA7 Strength 20 GINT Interrupt Clear 58 PA0 Impedance 21 PA EINT Enable 59 PA1 Impedance 22 GPIO EINT Enable 5A PA2 Impedance 23 Filter Period 5B PA3 Impedance 24 Filter Threshold 5C PA4 Impedance 25 Control 3 5D PA5 Impedance

Figure 2: Register Map Summary


FMA1125 Initialization and Register Description Chapter 4 Register Descriptions

4 Register Descriptions The FMA1125 has three types of registers, Read-write registers, Read-only registers and Write-only registers. Read-Write registers start at 0x00, Read-only registers start at 0x50 and Write-only registers start at 0xF7. The notation has 4 lines: first, second, third and fourth lines show bit positions, bit names, register type and default values when the FMA1125 receives hard reset or cold reset, respectively.

4.1 PA0 – PA7 Alpha (0x00 – 0x07) B7 B6 B5 B4 B3 B2 B1 B0

ALPHA Register

R/W R/W R/W R/W R/W R/W R/W

0 0 0 0 1 0 0 0

These registers set the sensitivity of each sensor input.

Sensitivity of PA0 through PA7 can be set individually with different values.

To assign bigger value will decrease the sensitivity and to assign smaller value will increase the sensitivity.

One step of ALPHA is equal to 0.045pF - 0.078pF, depending on the R_SEL registers (0x29-0x2A). If e.g. ALPHA is set to 5 with default R_SEL (‘10b’), 0.25pF or greater capacitance has to be induced by the finger to activate touch output.

Default value is 8.

The minimum value of ALPHA is 4 and the recommended maximum is 31. For proximity application, you can use smaller value than minimum ALPHA but be cautious to check if AIC works correctly.

4.2 Reference Delay (0x08) B7 B6 B5 B4 B3 B2 B1 B0

Reference Delay Register


0 0 0 0 0 0 0 0

This register changes the value of Reference Delay Chain located in the chip which can adjust parasitic

capacitance mismatch existing on all twelve sensor inputs.

Reference Delay Chain consists of 128 unit cells whose time delay depends on the value of R_SEL register. Increasing one step of Reference Delay value is the same as attaching 0.078pF of capacitor at the reference input pin denoted as PAREF and the maximum value of Reference delay is equal to attaching 10pF of capacitor at PAREF when R_SEL is set to 0x00. Please refer to the R_SEL register (0x29-0x2B) description for detailed values.

If parasitic mismatch existing on sensor inputs is greater than 10pF, you still can adjust it by attaching external tuning capacitor to the PAREF pin.

Its maximum range is 0 through 127. Nevertheless, its recommended range is 20 through 80 to cope with mass production variation.

Warm reset is mandatory when this value is changed.



4.3 Beta (0x09) B7 B6 B5 B4 B3 B2 B1 B0

BETA Register

R/W R/W R/W R/W

0 0 0 0 0 1 0 0

This register sets AIC (Automatic Impedance Calibration) entering threshold value called BETA. It

detects non-touch conditions of all eight sensor inputs.

The current impedances and previous impedances of all eight sensor inputs are compared before starting AIC operation. If differences of them are all lower than BETA, AIC can start. Otherwise, the reference values of the sensor inputs are not updated.

Recommended minimum value of Beta is 4 and maximum is 15. Default value is 4.

To increase this value will have more chances to perform AIC.

If reference impedances of input channels do not move within the scope of BETA in the none-touch status when monitoring the target device, it means that AIC is not performed. In this case, you can increase the value of BETA slightly or need to investigate which channels are susceptible by external noise sources and eliminate them by hardware modification.

4.4 AIC Wait Time (Wait before Calibration time, 0x0A) B7 B6 B5 B4 B3 B2 B1 B0

AIC Wait Register

R/W R/W R/W R/W R/W R/W R/W R/W

0 0 1 0 0 1 1 1

This register sets AIC waiting time to stabilize AIC operation with BETA. It can eliminate false

calibration when you remove the finger from the touch pads very slowly.

AIC keeps blocked during AIC_WAIT time after all twelve sensor inputs become non-touch condition.

If at least one input is touched during AIC_WAIT time, AIC_WAIT time is reloaded.

If you assign bigger value of AIC_WAIT time, AIC needs longer time to start.

Default value is 0x27 and it blocks AIC about 124.8msec under the equation below where Sensor Clock is 20KHz (0.05msec).

AIC Wait time = AIC_WAIT Register Value x 64 x Sensor Clock Period

4.5 PA0 – PA7 Strength Threshold (0x0B – 0x12) B7 B6 B5 B4 B3 B2 B1 B0

Strength Threshold Register


0 0 0 0 0 0 0 1

These registers set Strength Threshold values of PA0-PA7. Strength values can be read at Strength

Registers which are Read-only registers (0x50~0x57).

These registers are used for APIS mode to select touch outputs greater than Strength Threshold values in the given integration time defined by the Integration Time Register (0x14).



CAUTION: The Strength Threshold value must be lower than or equal to the value in Integration Time Register (0x14). Otherwise, no touch output is generated.

Default value is 1. However, this threshold value should be between approximately 1/10 and 2/10 of Integration Time. For example, if Integration Time is 100, then assign all these threshold values to between 10 and 20.

Recommended minimum value of Strength Threshold is 5 regardless of the value of Integration Time. (Recommended minimum value of Integration Time is 10.)

To assign higher threshold value will decrease sensitivity but increase filtering capability to screen out weekly touched sensor inputs.

4.6 Feature Select (0x13) B7 B6 B5 B4 B3 B2 B1 B0

APIS3 APIS2 APIS1 FILTER_EN

R/W R/W R/W R/W

0 0 0 0 0 1 0 0

This register selects APIS mode output and the additional filtering set by the FILTER PERIOD and

FILTER THRESHOLD registers (0x23 – 0x24)

Only B3 – B0 are used. The rest are reserved.

Caution: Just set only one bit among B3, B2 and B1 to ‘H’.

In order to activate APIS mode properly, Integration Time Register (0x14) and Strength Threshold Registers (0x0B~0x12) also should be initialized. Please refer to the description of these registers.

In order to active FILTER properly, FILTER PERIOD register (0x23) and FILTER THRESHOLD register (0x24) also should be initialized. Please refer to the description of these registers too.

B0 This is 2nd Filter of APIS. If this bit is set to ‘H’, APIS output is more delayed about the given FILTER PERIOD time and more stable against noise. In order to activate this bit, one of APIS mode selection bits among B1 through B3 must be set. If Integration Time is about 10msec and FILTER PERIOD is set to 10, the touch output is available every 100msec.

B1: If this bit is set to ‘H’, APIS mode I is activated. In APIS mode I, the strongest sensor output is available among twelve Strength Registers (0x50~0x57) in the given integration period defined at Integration Time Register (0x14). This mode is suitable for the button application to screen out weakly touched buttons.

B2: If this bit is set to ‘H’, APIS mode II is enabled. If current strength values stored in Strength Registers (0x50 ~ 0x57) are greater than pre-defined values of Strength Threshold Registers (0x0B~0x12), all corresponding sensor outputs are available.

B3: If this bit is set to ‘H’, two strongest sensor outputs are available among twelve Strength Registers (0x50~0x57) in the given integration period defined at Integration Time Register (0x14). This is called APIS mode III. It is suitable for multi-touch applications such as a game console.



4.7 Integration Time (0x14) B7 B6 B5 B4 B3 B2 B1 B0

Integration Time Register


0 0 0 0 1 1 1 1

This register is to set Integration Time for APIS mode. Integration Time means the number of

accumulation of touch output synchronized by Sensor Clock speed whose default value is 20KHz.

Update Period of touch output in APIS mode is varied by the equation below:

Update Period of Touch Output = Sensor Clock Period x (Integration Time Register Value)

The maximum value of Strength Registers (0x50~0x57) is equal to Integration Time.

The Integration Time must be greater than or equal to all values of Strength Threshold registers.

The smaller this value is, the worse APIS filtering capability is. On the other hand, the bigger this value is set, the longer the response time of touch output is. For example, if sensor clock is set to be 20KHz, and integration time is set to be 100, the update period of touch output and Strength register is every 5msec.

Default value is 15.

The range of Integration Time is 1 through 255, but its recommended minimum value is 10 for proper APIS filtering capability.

4.8 IDLE State Enter Time (0x15) B7 B6 B5 B4 B3 B2 B1 B0

IDLE Time Register


0 0 0 0 1 1 1 1

The register determines entering time to IDLE mode after all inputs are in non-touch status.

If sensor clock is 20kHz, for example, IDLE time will be 14sec.

IDLE Time = Register value x 2 x 5000 x Sensor Clock Period

4.9 Control 1 (0x16) B7 B6 B5 B4 B3 B2 B1 B0

DIM_EN SYNC_RST F2A NS[1] NS[0] HDC_U HDC_C HOLD_C


0 0 0 0 0 0 0 0

B0: If B0 is set to ‘L’, device is in auto calibration mode. Otherwise, initial calibration is done during the boot-up and AIC is waiting until HDC_C (B1) or HDC_U(B2) is asserted.

B1: If the status of B0 is ‘H’, conditional host driven calibration is performed by HDC_C bit. When it is written with 1 by the host, calibration is executed only once



then B1 becomes ‘L’ automatically. In other words, whenever B1 becomes ‘H’, calibration is done once. Performing calibration once by conditional host driven method does not guarantee the update of reference impedance values of sensor channels. The update of reference impedance values in conditional host driven calibration is the same as that of automatic impedance calibration. Host controls the start point of calibration only.

B2: If B2 is set to ‘H’, unconditional host driven calibration is performed once. The reference impedance values of sensor channels are always updated with the impedance values measured by unconditional host calibration regardless of the condition of calibration. It means that host always should be cautious to perform unconditional calibration. For example, it will result in false calibration to perform unconditional calibration when human finger is put on the touch electrodes. This bit is also automatically cleared after calibration is performed.

B3,B4: Changes Sensor Clock Frequency. Typical Analog Clock Frequency is 1.6MHz.

B[4:3] == 00: Sensor Clock Frequency = Internal Analog Clock Frequency / 80 = 20KHz

B[4:3] == 01: Sensor Clock Frequency = Internal Analog Clock Frequency / 160 = 10KHZ

B[4:3] == 10: Sensor Clock Frequency = Internal Analog Clock Frequency / 320 = 5KHz

B[4:3] == 11: Sensor Clock Frequency = Internal Analog Clock Frequency / 640 = 2.5KHz

B5: If this bit is set to be “H”, power state is always in ACTIVE mode. If power state is in IDLE mode, it becomes ACTIVE mode.

B6: When two FMA1125 chips are used in the application, sensor lines of each chip act like noise sources to the other. It will badly affect the performance of AIC and touch decision. In order to improve the performance of two chip application, external clock is used to supply synchronized clock signal to both chips. When this bit is set to H, GPIO_0 port is configured to Sync Reset input port. Therefore, sensor clock frequencies of both chips can be synchronized when receiving Sync RESET signal through GPIO_0 port. Register values are not changed by this RESET signal.

B7: If this bit is set to ‘H’ and GPIO ports and PA ports are configured to GPIO output port, LED dimming function (either auto or manual dimming) is enabled.

4.10 Control 2 (0x17)

B7 B6 B5 B4 B3 B2 B1 B0

ECE EIDS EIS ORCE LDO_OFF TCLK INT Pol


1 0 0 0 0 0 0 0

B0: This bit sets Interrupt Polarity.

If ‘H’, GINT and TINT become falling edge, otherwise they become rising edge (Default).

B2: This bit selects the main oscillator either from the internal oscillator or the external oscillator. The default is the internal oscillator. If this bit is set to 1, an external oscillator has to be connected to the TCLK pin. The recommended clock speed of



the external oscillator is 2MHz.

B3: LDO Disable:

This is an internal LDO On/Off bit. Default is ‘L’ and internal LDO is On. Internal LDO generates 2.5V power for the core of the chip. If this bit is set to 1, external 2.5V power must be applied to VLDO pin. In this case VLDO pin becomes a power input pin. If using an external LDO, current consumption can be further reduced. In order to switch the internal LDO off, two registers below should be handled sequentially.

1. Set B2 in Control2 register to 1. 2. Send LTB_EN (0xFB) command.

B4: I2C address out of range check enable:

By enabling this bit, MCU will be informed by I2C ‘NACK’ when it attempts to access an invalid address area. If it is not enabled as default, ACK is always reported even if the host attempts to access invalid address areas.

B5: External Interrupt Select

‘L’: real-time edge trigger (default), ‘H’: buffered level trigger

This bit determines EINT generation method as either real-time edge trigger or buffered level trigger.

‘L’: The host can detect interrupts at both falling and rising edge of GPIO status changes. If host clock speed is too slow to handle GPIO status changes, the host can lose GPIO input data since the FMA1125 does not store GPIO data into FIFO memory.

‘H’: The change of GPIO input data will be stored to FIFO memory, and the host will be informed with an interrupt signal until FIFO is entirely empty. When interrupt triggers, the host can empty the FIFO by reading FIFO data. To get FIFO data, B3 of ‘GPIO Interrupt Edge Enable’ register (0x26) should be set to ‘L’. Refer to ‘PA Input FIFO Data’ register (0x6E) and ‘GPIO Input FIFO Data’ register (0x6F) to get more information.

B6: External Input Data Select

‘L’: Direct GPIO input data, ‘H’: De-bounced GPIO input data

When this bit is set, noise in GPIO input data is filtered. The noise cancelling period is adjustable by the value of ‘GPIO Input Bouncing Cancelling Period’ register (0x27).

B7: External Interrupt Clock Enable

‘L’: Disable ‘H’: Enable(Default),

In order to use EINT after setting GPIO ports and Sensor Input ports to GPIO input ports, you should always enable this bit. If EINT is not used, this bit can be disabled to reduce power consumption in active mode.



4.11 PA Data Out (0x18) B7 B6 B5 B4 B3 B2 B1 B0

PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0


0 0 0 0 0 0 0 0

If PA pins (Sensor Input pins) are configured to GPIO output ports by ‘PA Configuration’ register

(0x1C) and ‘PA Direction’ register (0x1A), the value stored in this register is transmitted to PA ports.

4.12 GPIO Data Out (0x19) B7 B6 B5 B4 B3 B2 B1 B0

GPIO 3 GPIO 2 GPIO 1 GPIO 0

R/W R/W R/W R/W

0 0 0 0 0 0 0 0

If GPIO pins are configured to GPIO output ports by ‘GPIO Configuration’ register (0x1D) and ‘GPIO

Direction’ register (0x1B), the value stored in this register is transmitted to GPIO ports.

4.13 PA Direction (0x1A) B7 B6 B5 B4 B3 B2 B1 B0



0 0 0 0 0 0 0 0

If PA pins are configured to GPIO ports not Sensor Input ports by PA Configuration register (0x1C),

this register selects the direction of PA ports whether input or output ports. Default is ‘0’ for output port.

4.14 GPIO Direction (0x1B) B7 B6 B5 B4 B3 B2 B1 B0


R/W R/W R/W R/W

0 0 0 0 0 0 0 0

If GPIO pins are configured to GPIO ports not Direct Sensor Output ports by GPIO Configuration

register (0x1D), this register selects the direction of GPIO ports whether input or output ports. Default is ‘0’ for output port.



4.15 PA Configuration (0x1C) B7 B6 B5 B4 B3 B2 B1 B0



1 1 1 1 1 1 1 1

This register configures PA pins as either sensor input pins or MCU’s extended GPIO ports. Default is

HIGH as GPIO ports. In order to make them sensor input pins, the corresponding bits in this register should be set to 0.

4.16 GPIO Configuration (0x1D) B7 B6 B5 B4 B3 B2 B1 B0


R/W R/W R/W R/W

0 0 0 0 1 1 1 1

This register configures GPIO pins as either GPIO ports or Direct Sensor Output ports. Default is

HIGH as GPIO ports. In order to make them touch output pins, the corresponding bits in this register should be set to 0.

4.17 Calibration Interval (0x1E) B7 B6 B5 B4 B3 B2 B1 B0

Calibration Interval Register


0 0 1 1 0 0 0 0

This register sets the Auto Calibration Interval.

The calculation equation is:

Calibration Interval = Integration Period x Calibration Interval Register Value

where Integration Period = Sensor CLK Period x Integration Time Register Value

For example, if Sensor Clock is 20KHz, Integration Time register is 0x64 and this register is 0x30, calibration is done every 250 msec.

Auto Calibration is done only in active mode.

The Reference Impedance registers are updated after every calibration



4.18 GINT Interrupt Mask (0x1F) B7 B6 B5 B4 B3 B2 B1 B0

I2C_ERR EOC IOR IUP EINT Idle2Active Active2Idle Touch


0 1 1 1 1 1 1 0

This is the Interrupt Source Masking Register when using GINT.

Each bit specifies a type of interrupt.

The bits with 1 mask corresponding interrupts and GINT is not generated even if events occur.

User can activate necessary interrupts by unmasking corresponding bits among eight interrupt sources below.

B0: Touch Interrupt Source Mask Bit

B1: Active-to-Idle Power State Change Indication Interrupt Source Mask Bit

B2: Idle-to-Active Power State Change Indication Interrupt Source Mask Bit

B3: External GPIO Input Data Change Detection Source Mask Bit

B4: Impedance Update Source Mask Bit

B5: I2C Out of Range Source Mask Bit

B6: Calibrated Impedance (End of Calibration) Source Mask Bit

B7: I2C Error Source Mask Bit

4.19 GINT Interrupt Pending Clear (0x20) B7 B6 B5 B4 B3 B2 B1 B0



0 0 0 0 0 0 0 0

This is the Interrupt Clear Register when using GINT.

After GINT occurred, host can read Interrupt Pending register (0x69) to know which interrupt generates GINT.

This register is used to clear interrupt after completing interrupt service when GINT occurred.

By assigning ‘H’ into the bit, the corresponding interrupt is cleared.

It is automatically recovered to ‘L’ to generate next interrupt hence host MCU does not need to set it back to ‘L’.

In the case of touch interrupt, host must clear B0 to write 1 after read the value of PA Touch register (0x68). If host clears B0 without reading the value of PA Touch register, the interrupt is generated again by setting H in the bit of Interrupt Pending register.

B0: Touch Interrupt Source Clear Bit

B1: Active-to-Idle Power State Change Indication Interrupt Source Clear Bit



B2: Idle-to-Active Power State Change Indication Interrupt Source Clear Bit

B3: External GPIO Input Data Change Detection Source Clear Bit

B4: Impedance Update Source Clear Bit

B5: I2C Out of Range Source Clear Bit

B6: Calibrated Impedance (End of Calibration) Source Clear Bit

B7: I2C Error Source Clear Bit

4.20 PA EINT Enable (0x21) B7 B6 B5 B4 B3 B2 B1 B0



1 1 1 1 1 1 1 1

This register activates interrupts when detecting data changes in PA pins if PA pins are configured to

extended GPIO input ports.

The interrupt becomes active when the corresponding bit is ‘H’. Otherwise, it is disabled (Default).

4.21 GPIO EINT Enable (0x22) B7 B6 B5 B4 B3 B2 B1 B0


R/W R/W R/W R/W

0 0 0 0 1 1 1 1

This register activates interrupts when detecting data changes in GPIO pins if GPIO pins are configured

to extended GPIO input ports.

The interrupt becomes active when the corresponding bit is ‘H’. Otherwise, it is disabled (Default).

4.22 Filter Period (0x23) B7 B6 B5 B4 B3 B2 B1 B0

FILTER Period Register

R/W R/W R/W R/W

0 0 0 0 0 0 0 0

This Filter is the 2nd filter running with APIS. Filter should be enabled first by B0 of Feature register

(0x13).

This register sets an additional filter period like Integration Time in APIS to ensure more stable touch output by using APIS outputs as filter inputs.

It also can make additional delay of touch output when using high-speed sensor clock. For example, if this register is set to 10 and APIS touch output is generated every 5msec, the final touch output will be updated every 50msec.



4.23 Filter Threshold (0x24) B7 B6 B5 B4 B3 B2 B1 B0

FILTER Threshold Register

R/W R/W R/W R/W

0 0 0 0 0 0 0 0

This register determines threshold level of filtered touch output.

Touch output is available only when accumulated value of APIS outputs during Filter Period is greater than or equal to FILTER Threshold value. Its operation is similar with APIS mode 2.

The recommended Filter Threshold value is greater than 50% of Filter Period. For example, if Filter Period is set to 10 or 11, the recommended value of Filter Threshold is 6.

4.24 Control 3 (0x25) B7 B6 B5 B4 B3 B2 B1 B0

GF_I2C DTO_P DTO_S

R/W R/W R/W

0 0 0 0 0 0 0 0

B0: Direct Touch Output Port Select:

‘L’: Touch data of PA0~PA3 pins which are configured to Sensor input ports are transmitted to GPIO0~GPIO3 pins directly (Default). ‘H’: Touch data of PA4~PA7 pins which are configured to Sensor input ports are transmitted to GPIO0~GPIO3 pins directly.

B1: Direct Touch Output Polarity:

‘L’: Touched PA pins generate Low signal and none touched PA pins generate High signal through GPIO pins (Default, e.g. for active-low LED connection).

‘H’: Touched PA pins generate High signal and none touched PA pins generate Low signal through GPIO pins.

B2: Glitch Filter in I2C:

There is a glitch filter circuit in SCL/SDA lines of I2C. If this bit is set to 1, the glitch filter is disabled. By default, the glitch filter is enabled.



4.25 GPIO Interrupt Edge Enable (0x26) B7 B6 B5 B4 B3 B2 B1 B0



0 1 1 1 1 1 1 0

This register specifies how to detect interrupt by level triggered or edge triggered. L is level triggered

and H is edge triggered.

All bits except EINT should be set to default. In the case of EINT, B3 of this register depends on the value of B5 in Control2 register (0x17). If B5 of

Control 2 register is set to Low, B3 of this register should be set to High. Otherwise, it should be set to Low for FIFO EINT interrupt.

4.26 GPIO Input Bounce Cancelling Period (0x27) B7 B6 B5 B4 B3 B2 B1 B0

GPIO Input Bouncing Cancelling Period Register


0 0 0 0 0 0 0 0

When GPIO pins are configured to GPIO input ports, the mechanical button inputs through these pins

can generate data transition noise. This register is to set bounce canceling period for GPIO input data.

Bouncing Canceling Period = (1/100KHz) x 2 x GPIO Input Bouncing Canceling Period Value With the above equation, the shorter pulse than bouncing canceling period will be eliminated.

4.27 Register Check (0x28) B7 B6 B5 B4 B3 B2 B1 B0

Register Check


0 0 0 0 0 0 0 0

Register values are stored in RAM of the FMA1125. So, Strong ESD or sudden power off can cause

change of register values which are different from the values the host initialized.

Before the host writes this register with 0xFF, TINT and GINT are continuously generated. Therefore, the host must initialize this register with 0xFF first and initialize the rest of registers you need.

If GINT is used and this register is not initialized with 0xFF, B7 of Interrupt Pending register (0x69) is set to High and informs the host of error of the FMA1125.

Or, if its value is changed during the normal operation, TINT and GINT can be generated to inform the host of error of the FMA1125.



4.28 PA0_R_SEL~ PA3_R_SEL (0x29) B7 B6 B5 B4 B3 B2 B1 B0

PA3_R_SEL PA2_R_SEL PA1_R_SEL PA0_R_SEL


1 0 1 0 1 0 1 0

This register determines internal resistor values in PA0~PA3 pins which can change the sensitivity of

sensor input channels.

There are 4 options with the configuration of 2 bits for each PA port. To assign bigger value in these two bits increases the sensitivity but decreases AIC dynamic range. Please refer to the table below in detail.

R_SEL[1:0] Register Value Resolution of capacitance value

Maximum capacitance value

00 0.078pF 10pF

01 0.063pF 8pF

10 0.050pF 6.5pF

11 0.045pF 5.8pF

4.29 PA4_R_SEL~ PA7_R_SEL (0x2A) B7 B6 B5 B4 B3 B2 B1 B0

PA7_R_SEL PA6_R_SEL PA5_R_SEL PA4_R_SEL


1 0 1 0 1 0 1 0

This register determines internal resistor values in PA4~PA7 pins which can change the sensitivity of

sensor input channels. Please see the table above in detail.

4.30 REF_R_SEL (0x2B) B7 B6 B5 B4 B3 B2 B1 B0

REF_R_SEL

R/W R/W

0 0 0 0 0 0 1 0

This register determines internal resistor values in PA_REF pin which can change the sensitivity of the

reference channel. Please see the table above in detail.

4.31 Beta Disable (0x2C) B7 B6 B5 B4 B3 B2 B1 B0



0 0 0 0 0 0 0 0

The sensor input channels (PA port) whose bits are set to 1 are not considered for the condition of



reference impedance update while automatic calibration is done and also do not produce touch output. It will help to get more chance to update reference impedance values during automatic calibration.

The application which needs big touch electrodes and only impedance values can use this function such as proximity sensing.

4.32 GPIO0 - GPIO1 Dimming Unit Period (0x2D) B7 B6 B5 B4 B3 B2 B1 B0

GPIO 1 Dimming Unit Period GPIO 0 Dimming Unit Period


0 0 0 0 0 0 0 0

4.33 GPIO2 – GPIO3 Dimming Unit Period (0x2E) B7 B6 B5 B4 B3 B2 B1 B0

GPIO 3 Dimming Unit Period GPIO 2 Dimming Unit Period


0 0 0 0 0 0 0 0

4.34 PA0 - PA1 Dimming Unit Period (0x2F) B7 B6 B5 B4 B3 B2 B1 B0

PA 1 Dimming Unit Period PA 0 Dimming Unit Period


0 0 0 0 0 0 0 0

4.35 PA2 – PA3 Dimming Unit Period (0x30) B7 B6 B5 B4 B3 B2 B1 B0

PA 3 Dimming Unit Period PA 2 Dimming Unit Period


0 0 0 0 0 0 0 0

These registers determine the period which maintains same LED brightness when the ramp is up or

down by one step.

These registers are valid when PA0-PA3 and/or GPIO0-GPIO3 are configured to control LED dimming.

Each port has 4 bits to control the period of brightness. Please refer to the equation below to calculate the dimming period.

Step Wait Period (ms) = 6.4ms x (Dimming Unit Period Value + 1)

Total Dimming Up/Down Period = 25.6ms x Step Wait Period x (Ramp_Dim_Max – Ramp_Dim_Min + 1)



4.36 GPIO0 Dimming Control (0x31) B7 B6 B5 B4 B3 B2 B1 B0

Ramp Dimming GPIO 0 Max. Value Ramp Dimming GPIO 0 Min. Value

Fixed Mode Dimming GPIO 0 Value


0 0 0 0 0 0 0 0





0 0 0 0 0 0 0 0





0 0 0 0 0 0 0 0





0 0 0 0 0 0 0 0

4.40 PA0 Dimming Control (0x35) B7 B6 B5 B4 B3 B2 B1 B0

Ramp Dimming PA 0 Max. Value Ramp Dimming PA 0 Min. Value

Fixed Mode Dimming PA 0 Value


0 0 0 0 0 0 0 0







0 0 0 0 0 0 0 0





0 0 0 0 0 0 0 0





0 0 0 0 0 0 0 0

If Dimming mode is set to Fixed Output mode, only 6 LSBs are used to determine LED brightness. 64

steps are available to control LED brightness.

If Dimming mode is set to Ramp Up/Down mode, 4 MSBs are used to set maximum LED brightness and 4 LSBs are used to set minimum LED brightness. In Ramp Up/Down mode, the maximum/minimum values are multiplied by 4 internally.

4.44 GPIO0 - GPIO3 Dimming Mode (0x39) B7 B6 B5 B4 B3 B2 B1 B0

GPIO 3 Dimming Mode GPIO 2 Dimming Mode GPIO 1 Dimming Mode GPIO 0 Dimming Mode


0 0 0 0 0 0 0 0

4.45 PA0 - PA3 Dimming Mode (0x3A) B7 B6 B5 B4 B3 B2 B1 B0

PA 3 Dimming Mode PA 2 Dimming Mode PA 1 Dimming Mode PA 0 Dimming Mode


0 0 0 0 0 0 0 0

These registers determine LED dimming mode.



Each port has 2 bits to get 4 options below.

“11”: Fixed Dimming Mode

“10”: Ramp Down Dimming Mode

“01”: Ramp Up Dimming Mode

“00”: Disable

4.46 Dimming Start (0x3B) B7 B6 B5 B4 B3 B2 B1 B0

PA3 PA2 PA1 PA0 GPIO3 GPIO2 GPIO1 GPIO0


0 0 0 0 0 0 0 0

Before starting dimming control, all dimming related registers must be initialized.

This register should be written with 1 to start dimming control.

Whenever executing dimming up/down, Dimming Start register must be rewritten.

After this register is set to ‘1’, rewrite ‘0’ again to create clear the bit.

4.47 Dimming Enable (0x3C) B7 B6 B5 B4 B3 B2 B1 B0

PA3 PA2 PA1 PA0 GPIO3 GPIO2 GPIO1 GPIO0


0 0 0 0 0 0 0 0

This register enables each port to use dimming control when each port is set to GPIO output mode.

Default is ‘0’ and dimming is disabled.

4.48 PA0 – PA7 Strength (0x50 – 0x57) B7 B6 B5 B4 B3 B2 B1 B0

Strength Register

R R R R R R R R

These registers store Strength values of PA0 ~ PA7 during every Integration Time in APIS mode.

These are applicable only in APIS mode.

The maximum value of Strength Register depends on Integration Time Register (0x14). For example, if Integration Time is 10, the maximum value of Strength is also 10.

To enlarge Strength range, you need to change Integration Time first.



4.49 PA0 - PA7 Impedance (0x58 – 0x5F) B7 B6 B5 B4 B3 B2 B1 B0

Impedance Register

R R R R R R R R

These registers store current sensor impedances of PA0~PA7.

The range of Sensor Impedance of PA0~PA7 is 0~127.

You can monitor capacitance variation by Touch On and Off.

The values read from these registers are noted in the tuning view program as ‘127-Register value’.

The Impedance register values are only influenced (shifted) by the Reference Delay Parameter, they are not affected by AIC operation. Therefore, they can be used to monitor the raw sensor data on all channels individually for advanced processing.

4.50 PA0 - PA7 Reference Impedance (0x60 – 0x67) B7 B6 B5 B4 B3 B2 B1 B0

Reference Impedance Register

R R R R R R R R

These registers store reference impedance of each touch input after AIC.

The range of Reference Impedance of PA0~PA7 is 0~127.

Reference Impedances are available when all touch inputs become non-touch status.

The value is equivalent to ‘Impedance Value + ALPHA’ in the time of Touch OFF.

The values read from these registers are noted in the tuning view program as ‘127-Regiser value’.

4.51 PA Touch Byte (0x68) B7 B6 B5 B4 B3 B2 B1 B0


R R R R R R R R

This register stores the status of sensor inputs (PA0~PA7) when PA pins are configured to sensor input

ports. When touched, the corresponding bit in the Touch Byte Register is ‘1’ depending on the selected APIS mode.

Host MCU can read this register only when TINT occurs. Or, it can read this register at any time or periodically if not using TINT.

TINT is automatically cleared when this register is read.

4.52 GINT Interrupt Pending (0x69) B7 B6 B5 B4 B3 B2 B1 B0


R R R R R R R R



This register determines which interrupt should be handled among eight interrupt sources of GINT.

You can check the interrupts only having unmasked bits with ‘L’ in Interrupt Mask register (0x34).

Among unmasked interrupts, the bits with ‘H’ in this register are currently pending and need to be serviced by host MCU.

B0: Touch Interrupt Source Pending Bit

B1: Active-to-Idle Power State Change Indication Interrupt Source Pending Bit

B2: Idle-to-Active Power State Change Indication Interrupt Source Pending Bit

B3: External GPIO Input Data Change Detection Source Pending Bit

B4: Impedance Update Source Pending Bit

B5: I2C Out of Range Source Pending Bit

B6: Calibrated Impedance (End of Calibration) Source Pending Bit

B7: I2C Error Source Pending Bit

4.53 PA Input Data (0x6A) B7 B6 B5 B4 B3 B2 B1 B0


R R R R R R R R

This register stores data to read current status of PA0~PA7 pins only when corresponding bits in PA

Configuration register (0x1C) are configured to extended GPIOs by assigning ‘H’ and corresponding bits in PA Direction register (0x1A) are configured to Input by assigning ‘H’.

4.54 GPIO Input Data (0x6B) B7 B6 B5 B4 B3 B2 B1 B0

GPIO3 GPIO2 GPIO1 GPIO0

R R R R R R R R

This register stores data to read current status of GPIO0~GPIO4 pins only when corresponding bits in

GPIO Configuration register (0x1D) are configured to extended GPIOs by assigning ‘H’ and corresponding bits in GPIO Direction register (0x1B) are configured to Input by assigning ‘H’.

4.55 PA Input BCU Data (0x6C) B7 B6 B5 B4 B3 B2 B1 B0


R R R R R R R R

When B6 of Control2 register (EIDS) is ‘H’ and PA0~PA7 pins are configured to extended GPIO input

ports, De-bounced PA port input data is stored to this register.

4.56 GPIO Input BCU Data (0x6D) B7 B6 B5 B4 B3 B2 B1 B0




R R R R R R R R

When B6 of Control2 register (EIDS) is set to ‘H’ and GPIO0~GPIO4 pins are configured to extended

GPIO input ports, De-bounced GPIO port input data is stored to this register.

4.57 PA Input FIFO Data (0x6E) B7 B6 B5 B4 B3 B2 B1 B0


R R R R R R R R

4.58 GPIO Input FIFO Data (0x6F) B7 B6 B5 B4 B3 B2 B1 B0


R R R R R R R R

When B5 of Control2 register (0x17) is set to ‘H’ and B3 of GPIO Interrupt Edge Enable register

(0x26) is set to ‘L’, FIFO memory is activated.

FIFO memory consists of 8 steps of 12-bit wide to store PA0~PA7 input ports (LSB) and GPIO0~GPIO3 input ports (MSB) sequentially.

By activating FIFO memory, PA0~PA7 and GPIO0~GPIO3 input data are stored at FIFO memory when they are configured to extended GPIO input ports.

Therefore, host MCU should read these two registers sequentially when EINT is pending in GINT Interrupt Pending register (0x69).

4.59 Clock External (0xF7) B7 B6 B5 B4 B3 B2 B1 B0

Clock External Register

W W W W W W W W

X X X X X X X X

This is a write-only register and data field is required, but value is ignored.

Host MCU needs to send this command to change the clock source from the internal oscillator to an external oscillator applied to TCLK pin.

4.60 Clock Internal (0xF8) B7 B6 B5 B4 B3 B2 B1 B0

Clock Internal Register

W W W W W W W W

X X X X X X X X


Host MCU needs to send this command to change the clock source from the external oscillator to the internal oscillator.



4.61 BIAS OFF (0xF9) B7 B6 B5 B4 B3 B2 B1 B0

BIAS OFF Register

W W W W W W W W

X X X X X X X X


It is Analog BIAS Block Power Off Control Register.

BIAS OFF is used to reduce power consumption when external core power source is used and Power status is in Sleep mode because internal LDO drives some current by itself.

4.62 BIAS ON (0xFA) B7 B6 B5 B4 B3 B2 B1 B0

BIAS ON Register

W W W W W W W W

X X X X X X X X

This is a write-only register and data field is required but value is ignored.

This is the Analog BIAS Block Power On Control Register.

When using external core power, power consumption can be minimized by turning off BIAS in sleep mode. On the other hand, to wake up from sleep mode BIAS block should be turned on by executing BIAS ON register.

4.63 LTB Enable (0xFB) B7 B6 B5 B4 B3 B2 B1 B0

LTB enable Register

W W W W W W W W

X X X X X X X X


This command must be issued after sending BIAS ON/OFF commands or LDO Enable/Disable commands to apply them to the FMA1125.

4.64 Wakeup SLEEP (0xFC) B7 B6 B5 B4 B3 B2 B1 B0

Wakeup SLEEP Register

W W W W W W W W

X X X X X X X X




The device wakes up from Sleep mode by writing any value to this register.

4.65 Enter SLEEP (0xFD) B7 B6 B5 B4 B3 B2 B1 B0

Enter SLEEP Register

W W W W W W W W

X X X X X X X X


The device enters Sleep mode by writing any value to this register.

4.66 Cold Reset (0xFE) B7 B6 B5 B4 B3 B2 B1 B0

Cold Reset Register

W W W W W W W W

X X X X X X X X


Cold Reset initializes all blocks of the FMA1125 including register block. Thus, all register values are reset to default by writing an arbitrary value to this register.

4.67 Warm Reset (0xFF) B7 B6 B5 B4 B3 B2 B1 B0

Warm Reset Register

W W W W W W W W

X X X X X X X X


Warm Reset initializes all blocks of FMA1125 except register block. Therefore, the current register values remain unchanged after a Warm Reset.

Warm Reset must be performed after changing some of the configuration parameters, such as

Reference Delay.


FMA1125 Initialization and Register Description Chapter 5 Basic Tuning Process

5 Basic Tuning Process Following some basic rules during the tuning process of an FMA1125 touch application can help to get the application running quickly.

The steps below show the tuning process using the example Firmware for the SK-16FX-EUROSCOPE, which can be downloaded from the following address:

http://www.fujitsu.com/emea/services/microelectronics/tsc/starterkit/starterkit1125.html

Note: Please keep in mind that the tuning firmware shows the Impedance and Reference

Impedance values as ‘127-Register Value’ in order to have a more intuitive behaviour.

5.1 Reference Delay The first Parameter to adjust is the Reference Delay. This parameter is used to globally compensate parasitic capacitance present on all tracks. It can be set in the example Firmware using the ‘srd’ command, followed by a blank the desired value. The influence on the Impedance and Reference Impedance values can be seen below:

RefDelay = 99

(Too high for this layout,

inputs are too small)

RefDelay = 50

(ideal for this layout)

RefDelay = 0

(Too low for this layout,

inputs are saturated)

The average value of the Impedance and Reference registers should be around the middle of the scale, and a reserve of about 20-30 counts should be kept to zero and full-scale in order to enable correct AIC operation.

In case the difference between biggest and smallest values is too big (some values close to zero, others close to max.), tuning capacitors can be used to roughly match the capacitances. Every count of the Impedance Register corresponds to a value of 0.078pF (default settings of FMA1125) on the input pin, so that e.g. attaching a 4.7pF capacitor between GND and the input pin with the smallest value will increase the bar by about 60 counts.


http://www.fujitsu.com/emea/services/microelectronics/tsc/starterkit/starterkit1125.html


In case some values are close to the maximum even though Reference Delay is already set to the maximum value (127), an additional capacitor can be connected to the PAREF pin. Also here, one step of Reference Delay register corresponds to 0.078pF, so that attaching a 4.7pF capacitor to the PAREF pin will move all bars about 60 counts to the left.

The maximum value for the reference tuning capacitor can be found in the device data sheet.

The resolution of the above registers can be set using the R_SEL options. Please refer to the register description above for details.

5.2 Alpha The Alpha parameter is used to control the sensitivity of every channel individually. In idle state (no touch), the AIC will set the Reference Impedance value for every channel to be (Impedance + Alpha). This means, the signal introduced by a finger in order to be recognized as a touch has to increase the Impedance value by at least ‘Alpha’ counts. In other words, increasing the Alpha for a channel makes it less sensitive, a smaller Alpha will make the channel more sensitive.

The Alpha values can be set using the following commands:

• sa channel value – Set a single channel‘s alpha

• sax value – Set alpha of all slider elements

• a-value – decrement all alpha by value

• a+value – increment all alpha by value

Typical values for Alpha are in the range of 4…30, depending on electrode size, front cover thickness, etc. For proximity applications, also smaller values of Alpha can be used, but care must be taken that AIC is still operating correctly. Also, the Filter Period and Filter Threshold should be used to filter out short pulses and increase stability.

5.3 Filter Period, Filter Threshold The Filter Period and Filter Threshold registers can be used to apply a kind of low-pass filter to the touch output. A touch will only be signalled, when at least ‘Filter Threshold’ samples of ‘Filter Period’ samples are active. This can be used to increase stability, ot to filter out short touches. It should usually be kept active, e.g. with Period = 5 and Threshold = 4. The filter function has to be enabled by setting the FILTER_EN bit in the Feature Select register (0x13).

5.4 Impedance, Calibrated Impedance In addition to reading out the digital APIS on/off information for every touch channel, the TSC offers access to the sensor reference and input impedance values. This can be used e.g. for slider, scroll wheel or touch pad applications.

The Impedance register contains the value of the measured input impedance, whereas the Reference Impedance register contains the corresponding reference value for each channel. The difference between both in idle state is equal to the corresponding Alpha value, which is handled by the AIC by setting the Reference Impedance value accordingly.



This means that the Alpha parameter and also AIC operation (calibration) do not affect the value in the Impedance register. The Impedance register always reflects the input impedance, only shifted by the Reference Delay Parameter, which is usually constant during the application runtime and set only during initial tuning. Therefore, it can be used to monitor the raw sensor data of every channel individually for advanced sensing applications. The Impedance and Reference Impedance register values are updated once per AIC interval.

For Slider and similar applications, the (positive) difference between Impedance and Reference Impedance can be used as strength value for each channel, and using an interpolation algorithm, high-resolution poison information can be calculated. Please refer to the SK-TSC-1127-SB example software for implementation details.


FMA1125 Initialization and Register Description Chapter 6 Appendix

6 Appendix

6.1 Glossary

MCU Microcontroller Unit

TSC Touch Sensor Controller

6.2 Related Documents

More information to the FMA1125 Touch Sensor Controller can be found on the web at:

http://www.fujitsu.com/emea/services/microelectronics/tsc/

Additional information to other Fujitsu products can be found at:

http://www.fujitsu.com/emea/


http://www.fujitsu.com/emea/services/microelectronics/tsc/

http://www.fujitsu.com/emea/

FMA1125 Initialization and Register Description · FMA1125 Initialization and Register Description...

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