FLEX 10KE PCI Development Board Data Sheet - Altera · e_sdone M3 P5 p4_io39 T22 V24 ... FLEX 10KE...

®

FLEX 10KEPCI Development Board

August 1999, ver. 1 Data Sheet

Features Universal 64-bit, 66-MHz peripheral component interconnect (PCI) expansion card

Includes the FLEX® 10KE EPF10K100EFC-1 device On-board 144-pin small outline DIMM 32-Mbyte SDRAM module On-board standard PCI Mezzanine card (PMC) connector I/O prototype area RS-232 port On-board voltage regulator automatically generates 2.5 V and 3.3 V

from a 5.0-V power supply Flexible clocking options for the local-side logic, including PCI clock,

on-board crystal oscillator, or external clock input Supports in-circuit reconfigurability (ICR) with an EPC2

configuration device and a MasterBlasterTM, ByteBlasterMVTM, ByteBlasterTM, or BitBlasterTM download cable. (The ByteBlaster cable is obsolete and is replaced by the ByteBlasterMV cable.)

Designed to accept the following devices:– EPF10K30EFC484– EPF10K50EFC484– EPF10K50SFC484– EPF10K100EFC484– EPF10K130EFC484– EPF10K130EFC672– EPF10K200EFC672– EPF10K200SFC672

General Description

The PCI development board works with all Altera® PCI MegaCoreTM functions, including pci_a , pci_b , pci_c , and pcit1 (a back-end reference design for each megafunction is required). Users can implement custom local-side functions to interface the Altera PCI MegaCore function with the on-board SDRAM socket, the on-board PMC connector, the RS-232 port, or any custom logic implemented in the prototype area or PMC. The PCI development board provides a flexible clock network distribution and in-circuit configuration options. It supports a wide range of FLEX 10KE devices so users can tailor the development board to meet I/O pin and area requirements. This data sheet provides information on FLEX 10KE pin assignments, programming and configuration settings, clock network selection, supported components, board options, and schematics for the Altera FLEX 10KE PCI development board.

Altera Corporation 1

A-DS-PCI-C-01

FLEX 10KE PCI Development Boar d Data Sheet

2 Altera Corporation

Functional Description

Figure 1 shows the FLEX 10KE PCI development board.

Figure 1. FLEX 10KE PCI Development Board

FLEX 10KE Pin Assignments

Pin assignments to FLEX 10KE devices ensure that its I/O pins are properly connected to the defined signals on the board. Table 1 shows the definitions for the pin assignments.

LED1

+

+

+

+ +

+ +

JP5

C6

C14

U10

C12 C13

C15 C7

U9

U6

JP4

S2

U4

JP3

JP2

JP1

JN1

JN3JN4

JN2C3

L2

D2

U2C2

C5

+

+

C1

C4

U1D

1L1

SDRAM SOCKETS1

C10

P1

EPF10K100EFC484-1

®

®

®

U7U8

U3

C8 +

+

C9

+

C11

+

+

+®

U5

Local-Side Clock Input

External PowerInput

General PurposeLEDs

PS Header

JTAG Header

EPC2

PM

C C

onne

ctor

Oscillator

RS-232Header

PCI Interface

Program Switch

Clock

DedicatedInput 1-3

+5.0 V+3.3 V+2.5 VGND

Proto 1-20

I/O 1-64

FLEX 10KE PCI Development Board Data Sheet


Before compiling the FLEX 10KE design for the PCI development board, pin assignments must be made to all defined pins. See Table 2.

Table 1. Pin Assignment Reference Definitions

Pin Name Board Components Definition

e_<pci_signal> JN1, JN2, JN3 Standard PMC connectors.

p4_io<n> JN4 Additional PMC I/O pins.

p5_io<n> I/O 1-64 User prototype area I/O pins.

p_<pci_signal> P1 64-bit universal board PCI connector.

a_<name> U5 Altera FLEX 10KE I/O.

s_<name> S1 SDRAM module.

proto<n> Proto 1-20 Prototype outputs from the FLEX 10KE device.

rs232_<name> U10 RS-232 interface signals.

led<n> LED1 Input signals to general- purpose LEDs.

sw<n> S2 Switch connected to the FLEX 10KE I/O.

Table 2. FLEX 10KE PCI Development Board Pin Assignments (Part 1 of 7)

Signal Name 484-PinFineLine BGA

672-PinFineLine BGA


672-PinFineLine BGA

e_ack64n C18 E20 e_ad4 D3 F5

e_ad0 D1 F3 e_ad40 L17 N19

e_ad1 E2 G4 e_ad41 K21 M23

e_ad10 B9 D11 e_ad42 K22 M24

e_ad11 C10 E12 e_ad43 L18 N20

e_ad12 A11 C13 e_ad44 L22 N24

e_ad13 A12 C14 e_ad45 L20 N22

e_ad14 B12 D14 e_ad46 L21 N23

e_ad15 C12 E14 e_ad47 L19 N21

e_ad16 C13 E15 e_ad48 M22 P24

e_ad17 A14 C16 e_ad49 M21 P23

e_ad18 C14 E16 e_ad5 D2 F4

e_ad19 E20 G22 e_ad50 L16 N18

e_ad2 C1 E3 e_ad51 M19 P21

e_ad20 D21 F23 e_ad52 N22 R24


e_ad21 D22 F24 e_ad53 M18 P20

e_ad22 F20 H22 e_ad54 N21 R23

e_ad23 H16 K18 e_ad55 M17 P19

e_ad24 E22 G24 e_ad56 P21 T23

e_ad25 F21 H23 e_ad57 R21 U23

e_ad26 G20 J22 e_ad58 U22 W24

e_ad27 J16 L18 e_ad59 U21 W23

e_ad28 G22 J24 e_ad6 C6 E8

e_ad29 J18 L20 e_ad60 Y20 AB22

e_ad3 E3 G5 e_ad61 AB21 AD23

e_ad30 J17 L19 e_ad62 AB22 AD24

e_ad31 J19 L21 e_ad63 Y19 AB21

e_ad32 H22 K24 e_ad7 A7 C9

e_ad33 K15 M17 e_ad8 C9 E11

e_ad34 K16 M18 e_ad9 A9 C11

e_ad35 J21 L23 e_bm1 W2 AA4

e_ad36 K17 M19 e_bm2 V2 Y4

e_ad37 J22 L24 e_bm3 U2 W4

e_ad38 K18 M20 e_bm4 U3 W5

e_ad39 K19 M21 e_cben0 B19 D21

e_cben1 F17 H19 p4_io17 H26

e_cben2 A21 C23 p4_io18 J25

e_cben3 E17 G19 p4_io19 J26

e_cben4 B20 D22 p4_io2 B15

e_cben5 D18 F20 p4_io20 K25

e_cben6 C19 E21 p4_io21 K26

e_cben7 D19 F21 p4_io22 L25

e_devseln B18 D20 p4_io23 L26

e_framen D17 F19 p4_io24 M26

e_gntn E15 G17 p4_io25 N25

e_idsel AA21 AC23 p4_io26 N26

e_intan W1 AA3 p4_io27 P25

e_intbn T2 V4 p4_io28 P26

e_intcn R2 U4 p4_io29 R26

e_intdn P3 T5 p4_io3 B17

e_irdyn C16 E18 p4_io30 R25



672-PinFineLine BGA


672-PinFineLine BGA




e_lockn V20 Y22 p4_io31 P20 T22

e_par D20 F22 p4_io32 P22 T24

e_par64 C20 E22 p4_io33 T26

e_perrn G18 J20 p4_io34 U25

e_req64n A20 C22 p4_io35 U26

e_reqn A15 C17 p4_io36 T20 V22

e_rstn U20 W22 p4_io37 T21 V23

e_sbo N2 R4 p4_io38 V26

e_sdone M3 P5 p4_io39 T22 V24

e_serrn C22 E24 p4_io4 B18

e_stopn A19 C21 p4_io40 W25

e_trdyn A18 C20 p4_io41 W26

p4_io1 B14 p4_io42 Y25

p4_io10 D26 p4_io43 AA25

p4_io11 E25 p4_io44 Y26

p4_io12 E26 p4_io45 AB26

p4_io13 F25 p4_io46 W22 AA24

p4_io14 G25 p4_io47 AC25

p4_io15 F26 p4_io48 AB25

p4_io16 G26 p4_io49 AC26

p4_io5 C17 E19 p5_io24 J2

p4_io50 AD25 p5_io25 J1

p4_io51 AE24 p5_io26 K2

p4_io52 AF22 p5_io27 K1

p4_io53 AD26 p5_io28 L2

p4_io54 AE26 p5_io29 J3 L5

p4_io55 AB20 AD22 p5_io3 A8

p4_io56 AB19 AD21 p5_io30 J1 L3

p4_io57 AB18 AD20 p5_io31 J2 L4

p4_io58 AF19 p5_io32 L1

p4_io59 AB17 AD19 p5_io33 M1

p4_io6 B26 p5_io34 N2

p4_io60 Y16 AB18 p5_io35 N1

p4_io61 AE18 p5_io36 L1 N3

p4_io62 AA15 AC17 p5_io37 P2

p4_io63 AF17 p5_io38 P1



672-PinFineLine BGA


672-PinFineLine BGA


p4_io64 AB15 AD17 p5_io39 M2 P4

p4_io7 C26 p5_io4 A7

p4_io8 D25 p5_io40 R1

p4_io9 C25 p5_io41 R2

p5_io1 B10 D12 p5_io42 U1

p5_io10 B3 D5 p5_io43 U2

p5_io11 A3 p5_io44 V1

p5_io12 A4 C6 p5_io45 V2

p5_io13 C2 p5_io46 W1

p5_io14 B1 p5_io47 U1 W3

p5_io15 D2 p5_io48 W2

p5_io16 D1 p5_io49 Y1

p5_io17 E1 p5_io5 A5 C7

p5_io18 E2 p5_io50 AA2

p5_io19 F2 p5_io51 AA1

p5_io2 A9 p5_io52 AB2

p5_io20 F1 p5_io53 AB1

p5_io21 G2 p5_io54 R3 U5

p5_io22 G1 p5_io55 AC1

p5_io23 F2 H4 p5_io56 AC2

p5_io57 AD2 p_ad24 T4 V6

p5_io58 AD1 p_ad25 T6 V8

p5_io59 AB5 AD7 p_ad26 R6 U8

p5_io6 A3 C5 p_ad27 R5 U7

p5_io60 AB3 AD5 p_ad28 R7 U9

p5_io61 Y9 AB11 p_ad29 R4 U6

p5_io62 AA9 AC11 p_ad3 AA7 AC9

p5_io63 AF11 p_ad30 P4 T6

p5_io64 AB9 AD11 p_ad31 P6 T8

p5_io7 A2 C4 p_ad32 W16 AA18

p5_io8 B4 D6 p_ad33 AA18 AC20

p5_io9 B3 p_ad34 U16 W18

a_clk2 D12 F14 p_ad35 AA17 AC19

a_clkout D15 F17 p_ad36 T16 V18

led1 E16 G18 p_ad37 W15 AA17

led2 D16 F18 p_ad38 AA16 AC18



672-PinFineLine BGA


672-PinFineLine BGA



led3 A17 C19 p_ad39 U15 W17

led4 A16 C18 p_ad4 W8 AA10

p_ack64n Y10 AB12 p_ad40 V15 Y17

p_ad0 U9 W11 p_ad41 Y15 AB17

p_ad1 AA8 AC10 p_ad42 V14 Y16

p_ad10 V7 Y9 p_ad43 W14 AA16

p_ad11 Y7 AB9 p_ad44 U14 W16

p_ad12 AB6 AD8 p_ad45 T14 V16

p_ad13 U7 W9 p_ad46 R13 U15

p_ad14 U6 W8 p_ad47 Y14 AB16

p_ad15 AA5 AC7 p_ad48 T13 V15

p_ad16 V6 Y8 p_ad49 AA14 AC16

p_ad17 Y5 AB7 p_ad5 V8 Y10

p_ad18 W6 AA8 p_ad50 U13 W15

p_ad19 W5 AA7 p_ad51 AB14 AD16

p_ad2 T9 V11 p_ad52 W13 AA15

p_ad20 W4 AA6 p_ad53 V13 Y15

p_ad21 W3 AA5 p_ad54 T12 V14

p_ad22 U5 W7 p_ad55 U12 W14

p_ad23 T5 V7 p_ad56 V12 Y14

p_ad57 W12 AA14 p_stopn U10 W12

p_ad58 U11 W13 p_stopn_in H11 K13

p_ad59 Y11 AB13 p_trdyn T10 V12

p_ad6 U8 W10 p_trdyn_in R12 U14

p_ad60 T11 V13 Proto1 H13 K15

p_ad61 AB10 AD12 Proto10 R17 U19

p_ad62 R11 U13 Proto11 R19 U21

p_ad63 AA10 AC12 Proto12 R20 U22

p_ad7 Y6 AB8 Proto13 N19 R21

p_ad8 T8 V10 Proto14 G2 J4

p_ad9 W7 AA9 Proto15 Y4 AB6

p_cben0 Y17 AB19 Proto16 AB2 AD4

p_cben1 V16 Y18 Proto17 AA4 AC6

p_cben2 R16 U18 Proto18 AA3 AC5

p_cben3 AA19 AC21 Proto19 AA2 AC4

p_cben4 W17 AA19 Proto2 G13 J15



672-PinFineLine BGA


672-PinFineLine BGA



p_cben5 W18 AA20 Proto20 AB1 AD3

p_cben6 V17 Y19 Proto3 P16 T18

p_cben7 V18 Y20 Proto4 N15 R17

a_clk1 P11 T13 Proto5 P17 T19

p_devseln V10 Y12 Proto6 N16 R18

p_framen W9 AA11 Proto7 V1 Y3

p_gntn W10 AA12 Proto8 T18 V20

p_idsel N8 R10 Proto9 V21 Y23

p_intan T17 V19 rs232_cd L15 N17

p_irdyn R10 U12 rs232_cts N17 R19

p_irdyn_in V11 Y13 rs232_DTR P18 T20

p_lockn R18 U20 rs232_ri N18 R20

p_M66EN N5 R7 rs232_RTS M16 P18

p_par Y18 AB20 rs232_rx M15 P17

p_par64 AA20 AC22 rs232_tx P19 T21

p_perrn U19 W21 s_A0 G6 J8

p_req64n V9 Y11 s_A1 F4 H6

p_reqn T19 V21 s_A10 C7 E9

p_rstn E12 G14 s_A11 D5 F7

p_serrn U17 W19 s_A12 F6 H8

s_A13 E7 G9 s_dq29 D9 F11

s_A2 G4 J6 s_dq3 K6 M8

s_A3 G5 J7 s_dq30 H10 K12

s_A4 C3 E5 s_dq31 E9 G11

s_A5 H7 K9 s_dq32 F10 H12

s_A6 B6 D8 s_dq33 D10 F12

s_A7 F3 H5 s_dq34 E10 G12

s_A8 F8 H10 s_dq35 A10 C12

s_A9 E6 G8 s_dq36 F11 H13

s_ba0 P5 T7 s_dq37 G10 J12

s_ba1 P1 T3 s_dq38 E11 G13

s_casn M5 P7 s_dq39 D11 F13

s_cke0 N7 R9 s_dq4 K7 M9

s_cke1 M4 P6 s_dq40 B11 D13

s_dq0 K4 M6 s_dq41 G11 J13

s_dq1 K1 M3 s_dq42 F12 H14



672-PinFineLine BGA


672-PinFineLine BGA



s_dq10 J6 L8 s_dq43 G12 J14

s_dq11 H3 K5 s_dq44 H12 K14

s_dq12 H5 K7 s_dq45 B13 D15

s_dq13 J7 L9 s_dq46 D13 F15

s_dq14 H6 K8 s_dq47 F13 H15

s_dq15 F7 H9 s_dq48 E13 G15

s_dq16 C5 E7 s_dq49 D14 F16

s_dq17 D6 F8 s_dq5 K8 M10

s_dq18 C4 E6 s_dq50 B14 D16

s_dq19 B7 D9 s_dq51 E14 G16

s_dq2 K5 M7 s_dq52 B15 D17

s_dq20 D7 F9 s_dq53 F14 H16

s_dq21 D8 F10 s_dq54 G19 J21

s_dq22 G7 J9 s_dq55 F16 H18

s_dq23 C8 E10 s_dq56 F22 H24

s_dq24 E8 G10 s_dq57 G17 J19

s_dq25 B8 D10 s_dq58 F15 H17

s_dq26 G9 J11 s_dq59 H19 K21

s_dq27 F9 H11 s_dq6 H1 K3

s_dq28 G8 J10 s_dq60 G16 J18

s_dq61 H18 K20 s_dqmb5 L3 N5



s_dq7 J5 L7 s_rasn M6 P8

s_dq8 J4 L6 s_s0n P7 T9

s_dq9 H4 K6 s_s1n N6 R8

s_dqmb0 M1 P3 s_scl P2 T4

s_dqmb1 M7 P9 s_sda N4 R6

s_dqmb2 M8 P10 s_wen L5 N7

s_dqmb3 L4 N6 sw9 G14 J16

s_dqmb4 L6 N8 – – –



672-PinFineLine BGA


672-PinFineLine BGA



Dedicated Input Selection

The FLEX 10KE PCI development board provides a dedicated input selection circuitry, and performs the following functions:

Sets split-pin configuration for high fan-out PCI signals (trdyn , irdyn , and stopn ).

Drives available dedicated inputs with external signals. Provides pull-up resistors to dedicated inputs.

Dedicated input configuration can be selected by installing or removing various 0 Ω resistors. Figure 2 shows a schematic of the board’s dedicated input selectors.

Figure 2. Dedicated Input Selectors

1 The PCI development board is shipped with R42, R43, and R44 installed. This configuration provides a pull-up resistor for each of the three available dedicated inputs.

PU1

PU3

p_trdyn_in

p_trdyn

proto23

p_stopn

p_stopn_in

p_irdyn_in

proto22

p_irdyn

proto21

+3.3V

R26 1K

R29 1K

R28 1K

R52 0

R48 0

R44 0

R50 0

R46 0

R42 0

R51 0

R47 0

R43 0



Programming & Configuration Settings/Defaults

The PCI development board supports on-board configuration device programming and in-circuit configuration for FLEX devices (via JP3) for Joint Test Action Group (JTAG) or passive serial (PS) mode (via JP4) with the MasterBlaster or ByteBlasterMV download cable. Table 3 shows the programming and configuration options available and their settings.

Note:(1) The DIP switch setting is indicated with a 10-bit binary number where bit 0 refers to switch 1, and bit 9 refers to

switch 10 on S2. A value of 1 indicates that the corresponding switch is in the on position, and a value of 0 indicates that the corresponding switch is in the off position. Switch 9 is not a part of the programming and configuration circuit. It is connected to an input of the FLEX 10KE device.

Clock Network Selection/Default

The clock signal on the PCI development board can arrive from various clocking sources including system clock, external clock, and on-board crystal oscillator. The zero-delay buffers provide zero-delay clock signal distribution throughout the board to minimize clock skew within the same clock network. Clocking options on the board can be selected by installing or removing various 0 Ω resistors. Figure 3 shows a schematic of the board’s clock distribution circuit.

Table 3. Programming & Configuration Options

Mode/Device(s)

MasterBlaster/ByteBlaster/

DIP Switch Settings (1)

Description

JTAG EPC2 Connected to JTAG header

0000000001 Programs the EPC2 device in JTAG mode using the MAX+PLUS® II software. This setting is the default for the board.

JTAG EPC2, FLEX

Connected to JTAG header

0000000110 Places the EPC2 device and FLEX device in the JTAG chain (where the EPC2 device is device 0 and the FLEX device is device 1) and configures FLEX devices using the MAX+PLUS II software.

JTAG EPC2,FLEX, PMC

Connected to JTAG header

0001111010 Places the EPC2 device, FLEX device, and the PMC connector in the JTAG chain (where the EPC2 device is device 0, the FLEX device is device 1, and the PMC is device 2) and configures the device connected to the PMC connector using the MAX+PLUS II software.

PS Connected to BitBlaster header

0000000000 Configures the FLEX device in PS mode using the MAX+PLUS II software.

Configuration with EPC2

Removed 1000000000 Configures the FLEX device with the programmed EPC2 device.



Figure 3. Clock Distribution Circuit

The SDRAM, PMC, prototype area, and FLEX 10KE local-side clock inputs can be connected from the system clock (PCI_CLK), external clock input, on-board crystal oscillator, or FLEX clock output by installing the appropriate resistors. The FLEX 10KE clock input (A_CLK1) can be driven directly from the system clock or the output of PLL1. For example, to select the system clock to drive the FLEX 10KE clock input directly, R49 is installed; to select the external clock as the clocking source for the SDRAM socket, PMC connector, and prototype area, R39 is installed.

1 The PCI development board is shipped with R41, R45, and R36 installed. These resistors select the system clock (PCI_CLK) as the clocking source for the FLEX 10KE device, the SDRAM socket, the prototype area, and the PMC connector.

Voltage Supply Circuit

The FLEX 10KE PCI development board has special voltage regulator circuitry, which allows the necessary 2.5-V and 3.3-V power supply to be generated from a 5.0-V input. The board can accept the 5.0-V input from either the PCI connector or an external power supply (via JP2).

1 Using the external power supply input while the board is plugged into the PCI connector slot may result in severe board damage and possibly system damage.

R41

R49

R45

R36

R32

R39

R35

A_CLKOUT

EXT_CLK

PCI_CLK

SEL_CLK

PCI_REF

A_CLK2

S_CK0S_CK1E_CLKPROTO_CLK

CLKOUT

CLK1

CLK4

CLK2CLK3

CLKOUT

CLK1

CLK4

CLK2CLK3

A_CLK1

C5510PF

C5610PF

C5310PF

PLL2

PLL1

Oscillator



Supported Components

Table 4 lists all components supported by the PCI development board; however, not all components are shipped with the board. See “Board Options” on page 15 for more information.

Table 4. Supported Components (Part 1 of 2)

Component Manufacturer Part Number Quantity Schematic Reference

CAPACITOR, 0.01UF, 0805

AVX:08055E104ZAT 46 C16, C18, C20, C21, C23, C24, C27, C28, C30, C31, C32, C33, C34,C35, C36, C37, C38, C39, C40, C41, C42, C43, C44, C45, C46, C47, C48, C49, C50, C51, C52, C54, C57, C58, C59, C60, C61, C62, C63, C64, C65, C66, C67, C68, C69, C70

CAPACITOR, 10PF, 0805 AVX:08055A100KAT 3 C53, C55, C56

CAPACITOR, 330PF, 0805

AVX:08055A331KAT 2 C19, C25


AVX:08055E103ZAT 2 C26, C29


AVX:12063G105ZAT 2 C17, C22

CAPACITOR, 10UF, TAN, B-SIZE

AVX:TAJB107M016 7 C9, C10, C11, C12, C13, C14, C15

CAPACITOR, 47UF, TAN, D-SIZE

AVX:TAJC477M010 8 C1, C2, C3, C4, C5, C6, C7, C8

RESISTOR, 0 Ω, 0805 AVX:CR21-000 22 R8, R9, R10, R11, R16, R18, R32, R35, R36, R39, R41, R42, R43, R44, R45, R46, R47, R48, R49, R50, R51, R52

RESISTOR, 150 Ω, 0805 AVX:CR21-151J 1 R40

RESISTOR, 510 Ω, 0805 AVX:CR21-511J 2 R3, R4

RESISTOR, 1 KΩ, 0805 AVX:CR21-102J 22 R12, R13, R14, R15, R17, R19, R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, R30, R31, R33, R34, R37, R38

RESISTOR, 13.0 KΩ, 1%, 0805

AVX:CR21-1302F 2 R1, R6

RESISTOR, 22.1 KΩ, 1%, 0805

AVX:CR21-2212F 2 R2, R5

RESISTOR, 37.5 KΩ, 1%, 0805

AVX:CR21-3572F 1 R7

DIODE, SCHOTTKY,30 V, 1.0 A, SMT

MOTOROLA:MBRS130LT3 2 D1, D2



LED, 4-DIODE_PACK, SMT

DIALIGHT:555-4003 1 LED1

INDUCTOR, 50 UH, 1.0 A COILTRONICS:CTX50-2P 2 L1, L2

IC, PWM-VOLTAGE-REGULATOR, S08

MAXIM:MAX750ACSA 2 U1, U2

IC, RS232-INTERFACE, S024W

MAXIM:MAX208CWG 1 U10

IC, HEX-INVERTER, HCT, S014

TI:SN74HCT04D 1 U4

IC, QUAD3-STATE_BUF, HCT, S014

TI:SN74HCT125D 1 U6

IC, FLEX 10KE, 484/672-PIN_BGA

ALTERA 1 U5

IC, SERIAL_EPROM, PLCC20

ALTERA 1 U9

IC, ZERO-DELAY_BUFFER, S08

CYPRESS:CY2305-1H 2 U7, U8

SOCKET, 8-PIN_DIP SAMTEC:ICO-308-SST 1 U3

SOCKET, 20-PIN, PLCC SAMTEC:PLCC-020-F-N 1 Z2

CONNECTOR, DB-9, MALE

AMP:747250-4 1 JP5

CONNECTOR, 4-PIN, LOCK, RA

AMP:176153-4 1 JP2

SOCKET, 144-PIN, SO-DIMM, RA

AMP:390114-1 1 S1

CONNECTOR, PMC, RECEPTACLE

AMP:120521-1 4 Jn1, Jn2, Jn3, Jn4

CONNECTOR, SMB AMP:414026-3 1 JP1

HEADER, 5 × 2-PIN, SHROUDED

SAMTEC:TST-105-07-S-D 2 JP3, JP4

SWITCH, DECADE, SMT CTS:218-10LPST 1 S2

Table 4. Supported Components (Part 2 of 2)

Component Manufacturer Part Number Quantity Schematic Reference



Board Options

Tables 5 through 7 show clock, SDRAM, and FLEX 10KE device options for the PCI development board.

References Refer to the following Altera documents for more information:

PCI Master/Target MegaCore Function with DMA Data Sheet Application Note 116 (Configuring APEX 20K, FLEX 10K & FLEX 6000

Devices) FLEX 10KE Embedded Programmable Logic Family Data Sheet MasterBlaster Serial/USB Communications Cable Data Sheet ByteBlasterMV Parallel Port Download Cable Data Sheet BitBlaster Serial Download Cable Data Sheet

Table 5. On-Board Oscillator Options

Options Part Number Description

User-defined clock device Other frequency

Suggested clock device EPSON SG-531PH-66.000MC Suggested 66-MHz clock device

Table 6. SDRAM Options

Part Number Configuration Maximum Access Time (ns)

Maximum Operating Current (mA)

MT4LSDT464HG-662 4 Mbytes × 64 9 420

MT4LSDT464HG-662 8 Mbytes × 64 9 840

Table 7. FLEX 10KE Device Options

Part Number Number of Pins Package Type

EFP10K30EFC484-1 484 FineLine BGATM

EFP10K50EFC484-1 484 FineLine BGA

EFP10K50SFC484-1 484 FineLine BGA





EFP10K200SFC672-1 672 FineLine BGA



Altera, EPF10K30E, EPF10K50E, EPF10K50S, EPF10K100E, EPF10K130E, EPF10K200E, EPF10K200S, FineLine BGA, FLEX, FLEX 10KE, BitBlaster, ByteBlaster, ByteBlasterMV, EPC2, MasterBlaster, MAX+PLUS,MAX+PLUS II, and MegaCore are trademarks and/or service marks of Altera Corporation in the United Statesand other countries. Altera acknowledges the trademarks of other organizations for their respective productsor services mentioned in this document. Altera products are protected under numerous U.S. and foreignpatents and pending applications, maskwork rights, and copyrights. Altera warrants performance of itssemiconductor products to current specifications in accordance with Altera’s standard warranty, but reservesthe right to make changes to any products and services at any time without notice. Alteraassumes no responsibility or liability arising out of the application or use of any information,product, or service described herein except as expressly agreed to in writing by AlteraCorporation. Altera customers are advised to obtain the latest version of device specificationsbefore relying on any published information and before placing orders for products orservices.

Copyright 1999 Altera Corporation. All rights reserved.

101 Innovation DriveSan Jose, CA 95134(408) 544-7000http://www.altera.comApplications Hotline:(800) 800-EPLDCustomer Marketing:(408) 544-7104Literature Services:(888) [email protected]

®

Other references include:

PCI-SIG. PCI Local Bus Specification, Revision 2.2, Portland, Oregon: PCI Special Interest Group, December 1998.

Micron Technology, inc. Small-Outline SDRAM Module MT4LSDT464H, MT4LSDT864H Data Sheet. http://www.micron.com.

Schematics The following schematic foldouts are shown on sheets 1 through 9.

1 P5_IO[64:1] signals on the schematics correspond to the I/O 1-64 on the board. PROTO[23:21] signals on the schematics correspond to the dedicated input 1-3 on the board.


Printed on Recycled Paper.

A A

B B

C C

D D

E E

44

33

22

11

SHEET INDEX

1. Cover Sheet

2. PCI Connector

MECHANICAL

SPARES

5. Expansion Connector

6. Configuration Logic

3. FLEX 10K PCI Controller

4. 144-Pin SO-DIMM Socket for SDRAM

7. Clock Sources and Buffers

8. Power Supplies

ZONE

REV

DESCRIPTION

ECN

DRAFTR

DATE

CHECKR

APPVL

INITIAL RELEASE

A00

12/21/98

UNLESS OTHERWISE SPECIFIED:

1. ALL RESISTORS ARE: CHIP RESISTORS - 0805 PACKAGE

.10 WATT, 5%, 200PPM/C

2. ALL .1uF CAPS ARE: CHIP CAPS - 0805 PACKAGE

Z5U DIELECTRIC, 20%, 50V

A-D

S-P

CI-

C-0

1A

C

19

Mon

day,

Jul

y 26

, 199

9

Titl

e

Siz

eD

ocum

ent N

umbe

rR

ev

Dat

e:S

heet

of

BR

1

BR

AC

KE

T

1

PM

C1

PM

C

1MH

2

PC

I_M

H

1MH

1

PC

I_M

H

1

Z1

PC

B

1Z2

SO

CK

ET-

PLC

C20

1

PC

I Dem

onst

ratio

n B

oard

Alte

ra C

orpo

ratio

n -

FLE

X 1

0KE

PC

I Dev

elop

men

t Boa

rd D

ata

She

et

A A

B B

C C

D D

E E

44

33

22

11

PCI CONNECTOR

AC

29

Mon

day,

Jul

y 26

, 199

9

Titl

e

Siz

eD

ocum

ent N

umbe

rR

ev

Dat

e:S

heet

of

TR

DY

#T

RD

Y#

TR

DY

#IN

TA#

INTA

#IN

TA#

INTA

#

RS

T#

RS

T#

CLK

GN

T#

GN

T#

RE

Q#

RE

Q#

AD

31A

D30

AD

29A

D28

AD

27A

D26

AD

25A

D24

C/B

E/3

IDS

EL

AD

23ID

SE

LA

D22

AD

21A

D20

AD

19A

D18

AD

17A

D16

C/B

E/2

FR

AM

E#

FR

AM

E#

IRD

Y#

IRD

Y#

TR

DY

#D

EV

SE

L#D

EV

SE

L#S

TO

P#

ST

OP

#LO

CK

#LO

CK

#P

ER

R#

PE

RR

#

SE

RR

#S

ER

R#

PAR

PAR

C/B

E/1

AD

15A

D14

AD

13A

D12

AD

11A

D10

AD

9

AD

8C

/BE

/0A

D7

AD

6A

D5

AD

4A

D3

AD

2A

D1

AD

0

CLK

CLK

CLK

AD

60A

D58

AD

56A

D54

AD

52A

D50

AD

48A

D46

AD

44A

D42

AD

40A

D38

AD

36A

D34

AD

32

AD

62A

D63

AD

61

AD

59A

D57

AD

55A

D53

AD

51A

D49

AD

47A

D45

AD

43A

D41

AD

39A

D37

AD

35A

D33

C/B

E/7

C/B

E/5

C/B

E/4

C/B

E/6

RE

Q64

#R

EQ

64#

PAR

64PA

R64

AC

K64

#A

CK

64#

M66

EN

M66

EN

AD

[63.

.0]

AD

[63.

.0]

AD

[63.

.0]

C/B

E/[7

..0]

C/B

E/[7

..0]

C/B

E/[7

..0]

JTA

G_D

ATA

P_A

D[6

3..0

]

P_I

DS

EL

P_P

AR

P_R

ST

#

P_G

NT

#

P_S

TO

P#

P_F

RA

ME

#

P_C

/BE

#[7.

.0]

P_T

DO

PC

I_C

LK

P_D

EV

SE

L#

P_L

OC

K#

P_P

ER

R#

P_S

ER

R#

P_I

RD

Y#

P_R

EQ

#

P_T

RD

Y#

P_I

NTA

#

P_R

EQ

64#

P_P

AR

64

P_A

CK

64#

P_M

66E

N

+5.

0V+

5.0V

-12V

+12

VP

1

PC

I_U

NIV

B1

B2

B3

B4

B5

B6

B7

B8

B9

B10

B11

B14

B15

B16

B17

B18

B19

B20

B21

B22

B23

B24

B25

B26

B27

B28

B29

B30

B31

B33

B34

B35

B36

B37

B38

B39

B40

B41

B42

B43

B44

B45

B46

B47

B48

B49

B52

B53

B54

B55

B56

B57

B58

B59

B60

B61

B62

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A14

A15

A16

A17

A18

A19

A20

A21

A22

A23

A24

A25

A26

A27

A28

A29

A30

A31

A32

A33

A34

A35

A36

A37

A38

A39

A40

A41

A42

A43

A44

A45

A46

A47

A48

A49

A52

A53

A54

A55

A56

A57

A58

A59

A60

A61

A62

B32

B63

B64

B65

B66

B67

B68

B69

B70

B71

B72

B73

B74

B75

B76

B77

B78

B79

B80

B81

B82

B83

B84

B85

B86

B87

B88

B89

B90

B91

B92

B93

B94

A63

A64

A65

A66

A67

A68

A69

A70

A71

A72

A73

A74

A75

A76

A77

A78

A79

A80

A81

A82

A83

A84

A85

A86

A87

A88

A89

A90

A91

A92

A93

A94

-12V

TC

KG

ND

TD

O+

5V+

5VIN

TB

#IN

TD

#P

RS

NT

1#R

ES

ER

VE

DP

RS

NT

2#

RE

SE

RV

ED

GN

DC

LKG

ND

RE

Q#

VIO

AD

31A

D29

GN

DA

D27

AD

25+

3.3V

C/B

E3#

AD

23G

ND

AD

21A

D19

+3.

3V

C/B

E2#

GN

DIR

DY

#+

3.3V

DE

VS

EL#

GN

DLO

CK

#P

ER

R#

+3.

3VS

ER

R#

+3.

3VC

/BE

1#A

D14

GN

DA

D12

AD

10M

66E

N

AD

8A

D7

+3.

3VA

D5

AD

3G

ND

AD

1V

IOA

CK

64#

+5V

+5V

TR

ST

#+

12V

TM

ST

DI

+5V

INTA

#IN

TC

#+

5VR

ES

ER

VE

DV

IOR

ES

ER

VE

D

RE

SE

RV

ED

RS

T#

VIO

GN

T#

GN

DR

ES

ER

VE

DA

D30

+3.

3VA

D28

AD

26G

ND

AD

24ID

SE

L+

3.3V

AD

22A

D20

GN

DA

D18

AD

16+

3.3V

FR

AM

E#

GN

DT

RD

Y#

GN

DS

TO

P#

+3.

3VS

DO

NE

SB

O#

GN

DPA

RA

D15

+3.

3VA

D13

AD

11G

ND

AD

9

C/B

E0#

+3.

3VA

D6

AD

4G

ND

AD

2A

D0

VIO

RE

Q64

#+

5V+

5V

AD

17

RE

SE

RV

ED

GN

DC

/BE

6#C

/BE

4#G

ND

AD

63A

D61

VIO

AD

59A

D57

GN

DA

D55

AD

53G

ND

AD

51A

D49

VIO

AD

47A

D45

GN

DA

D43

AD

41G

ND

AD

39A

D37

VIO

AD

35A

D33

GN

DR

ES

ER

VE

DR

ES

ER

VE

DG

ND

GN

DC

/BE

7#C

/BE

5#V

IOPA

R64

AD

62G

ND

AD

60A

D58

GN

DA

D56

AD

54V

IOA

D52

AD

50G

ND

AD

48A

D46

GN

DA

D44

AD

42V

IOA

D40

AD

38G

ND

AD

36A

D34

GN

DA

D32

RE

SE

RV

ED

GN

DR

ES

ER

VE

D

PC

I Con

nect

or

A-D

S-P

CI-

C-0

1

Alte

ra C

orpo

ratio

n -

FLE

X 1

0KE

PC

I Dev

elop

men

t Boa

rd D

ata

She

et

A A

B B

C C

D D

E E

44

33

22

11

Dedicated Input Selectors

A

FLE

X 1

0KE

C

39

Mon

day,

Jul

y 26

, 199

9

Bea

vert

on, O

rego

n 97

006

1905

NW

169

th P

lace

, Sui

te 1

21N

orth

wes

t Log

ic D

esig

n

Titl

e

Siz

eD

ocum

ent N

umbe

rR

ev

Dat

e:S

heet

of

PU

1

PU

3

P_A

D0

P_A

D1

P_A

D2

P_A

D3

P_A

D4

P_A

D5

P_A

D6

P_A

D7

P_A

D8

P_A

D9

P_A

D10

P_A

D11

P_A

D12

P_A

D13

P_A

D14

P_A

D15

P_A

D16

P_A

D17

P_A

D18

P_A

D19

P_A

D20

P_A

D21

P_A

D22

P_A

D23

P_A

D24

P_A

D25

P_A

D26

P_A

D27

P_A

D28

P_A

D29

P_A

D30

P_A

D31

P_C

BE

N0

P_C

BE

N1

P_C

BE

N2

P_C

BE

N3

P_A

D32

P_A

D33

P_A

D34

P_A

D35

P_A

D36

P_A

D37

P_A

D38

P_A

D39

P_A

D40

P_A

D41

P_A

D42

P_A

D43

P_A

D44

P_A

D45

P_A

D46

P_A

D47

P_A

D48

P_A

D49

P_A

D50

P_A

D51

P_A

D52

P_A

D53

P_A

D54

P_A

D55

P_A

D56

P_A

D57

P_A

D58

P_A

D59

P_A

D60

P_A

D61

P_A

D62

P_A

D63

P_C

BE

N4

P_C

BE

N6

P_C

BE

N5

P_C

BE

N7

S_D

Q32

S_D

Q33

S_D

Q34

S_D

Q35

S_D

Q36

S_D

Q37

S_D

Q38

S_D

Q39

S_D

Q40

S_D

Q41

S_D

Q42

S_D

Q43

S_D

Q45

S_D

Q47

S_D

Q44

S_D

Q46

S_D

Q48

S_D

Q49

S_D

Q50

S_D

Q51

S_D

Q53

S_D

Q55

S_D

Q52

S_D

Q54

S_D

Q63

S_D

Q60

S_D

Q57

S_D

Q62

S_D

Q61

S_D

Q59

S_D

Q58

S_D

Q56

P5_

IO1

P5_

IO2

P5_

IO3

P5_

IO4

P5_

IO6

P5_

IO8

P5_

IO5

P5_

IO7

P5_

IO16

P5_

IO13

P5_

IO10

P5_

IO15

P5_

IO14

P5_

IO12

P5_

IO11

P5_

IO9

P5_

IO23

P5_

IO21

P5_

IO20

P5_

IO17

P5_

IO19

P5_

IO27

P5_

IO28

P5_

IO32

P5_

IO25

P5_

IO31

P5_

IO26

P5_

IO18

P5_

IO24

P5_

IO29

P5_

IO30

P5_

IO22

P5_

IO33

P5_

IO34

P5_

IO35

P5_

IO36

P5_

IO38

P5_

IO40

P5_

IO37

P5_

IO39

P5_

IO48

P5_

IO45

P5_

IO42

P5_

IO47

P5_

IO46

P5_

IO44

P5_

IO43

P5_

IO41

P5_

IO55

P5_

IO53

P5_

IO52

P5_

IO49

P5_

IO51

P5_

IO59

P5_

IO60

P5_

IO64

P5_

IO57

P5_

IO63

P5_

IO58

P5_

IO50

P5_

IO56

P5_

IO61

P5_

IO62

P5_

IO54

E_A

D32

E_A

D33

E_A

D34

E_A

D35

E_A

D37

E_A

D39

E_A

D36

E_A

D38

E_A

D47

E_A

D44

E_A

D41

E_A

D46

E_A

D45

E_A

D43

E_A

D42

E_A

D40

E_A

D54

E_A

D52

E_A

D51

E_A

D48

E_A

D50

E_A

D58

E_A

D59

E_A

D63

E_A

D56

E_A

D62

E_A

D57

E_A

D49

E_A

D55

E_A

D60

E_A

D61

E_A

D53

S_D

Q0

S_D

Q1

S_D

Q2

S_D

Q3

S_D

Q4

S_D

Q5

S_D

Q7

S_D

Q6

S_D

Q8

S_D

Q9

S_D

Q11

S_D

Q10

S_D

Q14

S_D

Q12

S_D

Q15

S_D

Q13

S_D

Q16

S_D

Q17

S_D

Q19

S_D

Q18

S_D

Q22

S_D

Q20

S_D

Q23

S_D

Q21

S_D

Q29

S_D

Q26

S_D

Q24

S_D

Q28

S_D

Q27

S_D

Q31

S_D

Q30

S_D

Q25

E_A

D0

E_A

D1

E_A

D3

E_A

D2

E_A

D6

E_A

D4

E_A

D7

E_A

D5

E_A

D13

E_A

D10

E_A

D8

E_A

D12

E_A

D11

E_A

D15

E_A

D14

E_A

D9

E_A

D21

E_A

D29

E_A

D19

E_A

D20

E_A

D16

E_A

D24

E_A

D18

E_A

D31

E_A

D27

E_A

D23

E_A

D25

E_A

D26

E_A

D22

E_A

D30

E_A

D17

E_A

D28

P4_

IO1

P4_

IO2

P4_

IO4

P4_

IO3

P4_

IO7

P4_

IO5

P4_

IO8

P4_

IO6

P4_

IO14

P4_

IO11

P4_

IO9

P4_

IO13

P4_

IO12

P4_

IO16

P4_

IO15

P4_

IO10

P4_

IO22

P4_

IO30

P4_

IO20

P4_

IO21

P4_

IO17

P4_

IO25

P4_

IO19

P4_

IO32

P4_

IO28

P4_

IO24

P4_

IO26

P4_

IO27

P4_

IO23

P4_

IO31

P4_

IO18

P4_

IO29

P4_

IO33

P4_

IO34

P4_

IO36

P4_

IO35

P4_

IO39

P4_

IO37

P4_

IO40

P4_

IO38

P4_

IO46

P4_

IO43

P4_

IO41

P4_

IO45

P4_

IO44

P4_

IO48

P4_

IO47

P4_

IO42

P4_

IO54

P4_

IO62

P4_

IO52

P4_

IO53

P4_

IO49

P4_

IO57

P4_

IO51

P4_

IO64

P4_

IO60

P4_

IO56

P4_

IO58

P4_

IO59

P4_

IO55

P4_

IO63

P4_

IO50

P4_

IO61

S_D

QM

B7

S_D

QM

B6

S_D

QM

B5

S_D

QM

B4

E_C

BE

7E

_CB

E6

E_C

BE

4E

_CB

E5

S_D

QM

B3

S_D

QM

B2

S_D

QM

B1

S_D

QM

B0

E_C

BE

3E

_CB

E2

E_C

BE

0E

_CB

E1

S_A

13S

_A12

S_A

11S

_A10

S_A

9S

_A8

S_A

7S

_A6

S_A

5S

_A4

S_A

3S

_A2

S_A

1S

_A0

IN_P

CI_

IRD

Y#

IN_P

CI_

TR

DY

#

IN_P

CI_

ST

OP

#

LED

4LE

D3

LED

2LE

D1

PR

OT

O20

PR

OT

O19

PR

OT

O18

PR

OT

O17

PR

OT

O16

PR

OT

O15

PR

OT

O14

PR

OT

O12

PR

OT

O13

PR

OT

O11

PR

OT

O10

PR

OT

O8

PR

OT

O9

PR

OT

O4

PR

OT

O5

PR

OT

O7

PR

OT

O6

PR

OT

O1

PR

OT

O3

PR

OT

O2

MS

EL1

MS

EL0

nCE

P_A

D[6

3..0

]S

_DQ

[63.

.0]

S_D

QM

B[7

..0]

MS

EL[

1..0

]

P_C

BE

N[7

..0]

E_A

D[6

3..0

]

E_C

BE

[7..0

]

S_A

[13.

.0]

PR

OT

O[2

3..1

]

P5_

IO[6

4..1

]

P4_

IO[6

4..1

]

LED

[4..1

]

PU

2

IN_P

CI_

TR

DY

#

P_T

RD

Y#

PR

OT

O23

P_S

TO

P#

IN_P

CI_

ST

OP

#

IN_P

CI_

IRD

Y#

PR

OT

O22

P_I

RD

Y#

PR

OT

O21

P_A

D[6

3..0

]

P_C

/BE

#[7.

.0]

P_R

EQ

64#

P_P

AR

64

P_A

CK

64#

S_S

CL

S_C

AS

#

S_C

KE

0

S_A

[13.

.0]

S_D

Q[6

3..0

]

S_D

QM

B[7

..0]

S_R

AS

#

S_W

E#

S_S

DA

P_M

66E

N

E_S

BO

#

E_R

EQ

64#

E_C

BE

[7..0

]

E_A

D[6

3..0

]

E_S

DO

NE

E_P

AR

64

E_A

CK

64#

LED

[4..1

]

P_I

DS

EL

P_D

EV

SE

L#P

_PA

RP

_FR

AM

E#

P_I

RD

Y#

P_T

RD

Y#

P_L

OC

K#

P_S

TO

P#

P_R

ST

#P

_RE

Q#

P_G

NT

#P

_IN

TA#

P_P

ER

R#

P_S

ER

R#

E_B

M1

E_B

M3

E_B

M2

E_B

M4

E_I

DS

EL

E_D

EV

SE

L#E

_PA

RE

_FR

AM

E#

E_I

RD

Y#

E_T

RD

Y#

E_L

OC

K#

E_S

TO

P#

E_R

ST

#E

_RE

Q#

E_G

NT

#E

_IN

TA#

E_I

NT

B#

E_I

NT

C#

E_I

NT

D#

E_P

ER

R#

E_S

ER

R#

S_B

A0

S_B

A1

S_S

0#S

_S1#

A_C

LK1

P4_

IO[6

4..1

]

P5_

IO[6

4..1

]

PR

OT

O[2

3..1

]

MS

EL[

1..0

]

A_C

LKO

UT

A_C

LK2

DAT

AD

CLK

nSTA

TU

SnC

ON

FIG

CO

NF

DO

NE

RS

232_

RX

RS

232_

TX

RS

232_

CD

RS

232_

CT

SR

S23

2_D

TR

RS

232_

RT

SR

S23

2_R

I

A_T

DI

A_T

DO

A_T

CK

A_T

MS

A_T

RS

T#

S_C

KE

1

EX

TR

A_S

WIT

CH

+3.

3V

VC

CIN

TV

CC

IO

U5A FLE

X10

KE

-672K

15J1

5T

18R

17T

19R

18Y

3V

20Y

23U

19U

21U

22R

21J4 A

B6

AD

4A

C6

AC

5A

C4

AD

3

P17

T21

N17

R20

R19

P18

T20

G18

F18

C19

C18

F14

F17

E13

E17 H2

H25

K16

L10

L12

L14

L17

M2

M25

N11

N12

N15

P12

P15

P16

R14 T2

T10

T12

T14

T17

T25

U16 Y7

AA

23A

B10

AC

14A

D15

AA

26Y

24Y

2V

24V

17V

5U

11U

3T

15R

22R

16R

13R

11R

5P

11N

16M

22M

16M

13M

11L1

5L1

3K

22K

11J1

7J3G

3D

7C

15C

8

A2

A25 B

2B

25 C3

C10

C24 D3

D4

D19

D23

D24 E

4E

23G

23 J5 J23

K4

K10

K17

L11

L16

L22

M5

M12

M14

M15

N13

N14

P13

P14

P22

R12

R15

T11

T16

U10

U17

U24

V3

Y5

AA

13A

A22

AB

3A

B4

AB

5A

B23

AB

24A

C3

AC

8A

C24

AD

13A

D18

AE

2A

E25

AF

2A

F25

H7

H21

G20

W20

Y21 F

6G

7A

A21 V

9G

6G

21H

20 W6

Y6

J16

PR

OT

O1

PR

OT

O2

PR

OT

O3

PR

OT

O4

PR

OT

O5

PR

OT

O6

PR

OT

O7

PR

OT

O8

PR

OT

O9

PR

OT

O10

PR

OT

O11

PR

OT

O12

PR

OT

O13

PR

OT

O14

PR

OT

O15

PR

OT

O16

PR

OT

O17

PR

OT

O18

PR

OT

O19

PR

OT

O20

RS

232_

RX

RS

232_

TX

RS

232_

CD

RS

232_

RI

RS

232_

CT

S

RS

232_

RT

SR

S23

2_D

TR

LED

1LE

D2

LED

3LE

D4

CLK

2_IN

CLK

2_O

UT

VC

CIN

TV

CC

INT

VC

CIN

TV

CC

INT

VC

CIN

TV

CC

INT

VC

CIN

TV

CC

INT

VC

CIN

TV

CC

INT

VC

CIN

TV

CC

INT

VC

CIN

TV

CC

INT

VC

CIN

TV

CC

INT

VC

CIN

TV

CC

INT

VC

CIN

TV

CC

INT

VC

CIN

TV

CC

INT

VC

CIN

TV

CC

INT

VC

CIN

TV

CC

INT

VC

CIN

TV

CC

INT

VC

CIN

TV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IOV

CC

IO

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

D

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

TD

IT

DO

TC

KT

MS

TR

ST

DAT

A0

DC

LKnS

TAT

US

nCO

NF

IGnC

EnC

EO

CO

NF

_DO

NE

MS

EL0

MS

EL1

SW

ITC

H

R17

1K

R26

1K

R29

1K

R28

1KU

5B FLE

X10

KE

-672

W11

AC

10V

11A

C9

AA

10Y

10W

10A

B8

V10

AA

9Y

9A

B9

AD

8W

9W

8A

C7

Y8

AB

7A

A8

AA

7A

A6

AA

5W

7V

7V

6V

8U

8U

7U

9U

6T

6T

8

AA

18A

C20

W18

AC

19V

18A

A17

AC

18W

17Y

17A

B17

Y16

AA

16W

16V

16U

15A

B16

V15

AC

16W

15A

D16

AA

15Y

15V

14W

14Y

14A

A14

W13

AB

13V

13A

D12

U13

AC

12A

B19

Y18

U18

AC

21

AA

19A

A20

Y19

Y20

T13

R10

Y12

AB

20A

C22

AA

11 U12

V12

U20

W12

G14

V21

AA

12V

19

R7

W21

W19

Y11

AB

12

Y13

U14

K13

PC

I_A

D0

PC

I_A

D1

PC

I_A

D2

PC

I_A

D3

PC

I_A

D4

PC

I_A

D5

PC

I_A

D6

PC

I_A

D7

PC

I_A

D8

PC

I_A

D9

PC

I_A

D10

PC

I_A

D11

PC

I_A

D12

PC

I_A

D13

PC

I_A

D14

PC

I_A

D15

PC

I_A

D16

PC

I_A

D17

PC

I_A

D18

PC

I_A

D19

PC

I_A

D20

PC

I_A

D21

PC

I_A

D22

PC

I_A

D23

PC

I_A

D24

PC

I_A

D25

PC

I_A

D26

PC

I_A

D27

PC

I_A

D28

PC

I_A

D29

PC

I_A

D30

PC

I_A

D31

PC

I_A

D32

PC

I_A

D33

PC

I_A

D34

PC

I_A

D35

PC

I_A

D36

PC

I_A

D37

PC

I_A

D38

PC

I_A

D39

PC

I_A

D40

PC

I_A

D41

PC

I_A

D42

PC

I_A

D43

PC

I_A

D44

PC

I_A

D45

PC

I_A

D46

PC

I_A

D47

PC

I_A

D48

PC

I_A

D49

PC

I_A

D50

PC

I_A

D51

PC

I_A

D52

PC

I_A

D53

PC

I_A

D54

PC

I_A

D55

PC

I_A

D56

PC

I_A

D57

PC

I_A

D58

PC

I_A

D59

PC

I_A

D60

PC

I_A

D61

PC

I_A

D62

PC

I_A

D63

PC

I_C

BE

N0

PC

I_C

BE

N1

PC

I_C

BE

N2

PC

I_C

BE

N3

PC

I_C

BE

N4

PC

I_C

BE

N5

PC

I_C

BE

N6

PC

I_C

BE

N7

PC

I_C

LKP

CI_

IDS

EL

PC

I_D

EV

SE

L#P

CI_

PAR

PC

I_PA

R64

PC

I_F

RA

ME

#P

CI_

IRD

Y#

PC

I_T

RD

Y#

PC

I_LO

CK

#P

CI_

ST

OP

#P

CI_

RS

T#

PC

I_R

EQ

#P

CI_

GN

T#

PC

I_IN

TA#

PC

I_M

66E

NP

CI_

PE

RR

#P

CI_

SE

RR

#

PC

I_R

EQ

64#

PC

I_A

CK

64#

IN_P

CI_

IRD

Y#

IN_P

CI_

TR

DY

#

IN_P

CI_

ST

OP

#

U5E FLE

X10

KE

-672

F3

G4

E3

G5

F5

F4

E8

C9

E11

C11

D11

E12

C13

C14

D14

E14

E15

C16

E16

G22

F23

F24

H22

K18

G24

H23 J22

L18

J24

L20

L19

L21

K24

M17

M18

L23

M19

L24

M20

M21

N19

M23

M24

N20

N24

N22

N23

N21

P24

P23

N18

P21

R24

P20

R23

P19

T23

U23

W24

W23

AB

22A

D23

AD

24A

B21

D21

H19

C23

G19

D22

F20

E21

F21

AC

23D

20F

22F

19E

18C

20Y

22C

21W

22

E22

C17

G17

AA

3V

4U

4T

5

C22

J20

E24

R4

P5

AA

4Y

4W

4W

5

E20

PM

C_A

D0

PM

C_A

D1

PM

C_A

D2

PM

C_A

D3

PM

C_A

D4

PM

C_A

D5

PM

C_A

D6

PM

C_A

D7

PM

C_A

D8

PM

C_A

D9

PM

C_A

D10

PM

C_A

D11

PM

C_A

D12

PM

C_A

D13

PM

C_A

D14

PM

C_A

D15

PM

C_A

D16

PM

C_A

D17

PM

C_A

D18

PM

C_A

D19

PM

C_A

D20

PM

C_A

D21

PM

C_A

D22

PM

C_A

D23

PM

C_A

D24

PM

C_A

D25

PM

C_A

D26

PM

C_A

D27

PM

C_A

D28

PM

C_A

D29

PM

C_A

D30

PM

C_A

D31

PM

C_A

D32

PM

C_A

D33

PM

C_A

D34

PM

C_A

D35

PM

C_A

D36

PM

C_A

D37

PM

C_A

D38

PM

C_A

D39

PM

C_A

D40

PM

C_A

D41

PM

C_A

D42

PM

C_A

D43

PM

C_A

D44

PM

C_A

D45

PM

C_A

D46

PM

C_A

D47

PM

C_A

D48

PM

C_A

D49

PM

C_A

D50

PM

C_A

D51

PM

C_A

D52

PM

C_A

D53

PM

C_A

D54

PM

C_A

D55

PM

C_A

D56

PM

C_A

D57

PM

C_A

D58

PM

C_A

D59

PM

C_A

D60

PM

C_A

D61

PM

C_A

D62

PM

C_A

D63

PM

C_C

BE

N0

PM

C_C

BE

N1

PM

C_C

BE

N2

PM

C_C

BE

N3

PM

C_C

BE

N4

PM

C_C

BE

N5

PM

C_C

BE

N6

PM

C_C

BE

N7

PM

C_I

DS

EL

PM

C_D

EV

SE

L#P

MC

_PA

RP

MC

_FR

AM

E#

PM

C_I

RD

Y#

PM

C_T

RD

Y#

PM

C_L

OC

K#

PM

C_S

TO

P#

PM

C_R

ST

#

PM

C_P

AR

64

PM

C_R

EQ

#P

MC

_GN

T#

PM

C_I

NTA

#P

MC

_IN

TB

#P

MC

_IN

TC

#P

MC

_IN

TD

#

PM

C_R

EQ

64#

PM

C_P

ER

R#

PM

C_S

ER

R#

PM

C_S

BO

PM

C_S

DO

NE

PM

C_B

M1

PM

C_B

M2

PM

C_B

M3

PM

C_B

M4

PM

C_A

CK

64#

R52

0

R48

0

R44

0

R50

0

R46

0

R42

0

R51

0

R47

0

R43

0

U5D FLE

X10

KE

-672

B14

B15

B17

B18

E19

B26

C26

D25

C25

D26

E25

E26

F25

G25

F26

G26

H26 J25

J26

K25

K26

L25

L26

M26

N25

N26

P25

P26

R26

R25

T22

T24

T26

U25

U26

V22

V23

V26

V25

W25

W26

Y25

AA

25Y

26A

B26

AA

24A

C25

AB

25A

C26

AD

25A

E24

AF

22A

D26

AE

26A

D22

AD

21A

D20

AF

19A

D19

AB

18A

E18

AC

17A

F17

AD

17

D12

A9

A8

A7

C7

C5

C4

D6

B3

D5

A3

C6

C2

B1

D2

D1

E1

E2

F2

F1

G2

G1

H4

J2 J1 K2

K1

L2 L5 L3 L4 L1 M1

N2

N1

N3

P2

P1

P4

R1

R2

U1

U2

V1

V2

W1

W3

W2

Y1

AA

2A

A1

AB

2A

B1

U5

AC

1A

C2

AD

2A

D1

AD

7A

D5

AB

11A

C11

AF

11A

D11

PM

C4_

IO1

PM

C4_

IO2

PM

C4_

IO3

PM

C4_

IO4

PM

C4_

IO5

PM

C4_

IO6

PM

C4_

IO7

PM

C4_

IO8

PM

C4_

IO9

PM

C4_

IO10

PM

C4_

IO11

PM

C4_

IO12

PM

C4_

IO13

PM

C4_

IO14

PM

C4_

IO15

PM

C4_

IO16

PM

C4_

IO17

PM

C4_

IO18

PM

C4_

IO19

PM

C4_

IO20

PM

C4_

IO21

PM

C4_

IO22

PM

C4_

IO23

PM

C4_

IO24

PM

C4_

IO25

PM

C4_

IO26

PM

C4_

IO27

PM

C4_

IO28

PM

C4_

IO29

PM

C4_

IO30

PM

C4_

IO31

PM

C4_

IO32

PM

C4_

IO33

PM

C4_

IO34

PM

C4_

IO35

PM

C4_

IO36

PM

C4_

IO37

PM

C4_

IO38

PM

C4_

IO39

PM

C4_

IO40

PM

C4_

IO41

PM

C4_

IO42

PM

C4_

IO43

PM

C4_

IO44

PM

C4_

IO45

PM

C4_

IO46

PM

C4_

IO47

PM

C4_

IO48

PM

C4_

IO49

PM

C4_

IO50

PM

C4_

IO51

PM

C4_

IO52

PM

C4_

IO53

PM

C4_

IO54

PM

C4_

IO55

PM

C4_

IO56

PM

C4_

IO57

PM

C4_

IO58

PM

C4_

IO59

PM

C4_

IO60

PM

C4_

IO61

PM

C4_

IO62

PM

C4_

IO63

PM

C4_

IO64

PM

C5_

IO1

PM

C5_

IO2

PM

C5_

IO3

PM

C5_

IO4

PM

C5_

IO5

PM

C5_

IO6

PM

C5_

IO7

PM

C5_

IO8

PM

C5_

IO9

PM

C5_

IO10

PM

C5_

IO11

PM

C5_

IO12

PM

C5_

IO13

PM

C5_

IO14

PM

C5_

IO15

PM

C5_

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BitBlaster

JTAG

DOWNLOAD PROM

CONFIGURATION LOGIC AND JTAG

A

Con

figur

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n an

d P

rogr

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ing

C

69

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day,

Jul

y 26

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TU

SnS

TAT

US

nCO

NF

IGnC

ON

FIG

nCO

NF

IGnS

TAT

US

DAT

AD

ATA

DAT

A

MS

EL1

DC

LKD

CLK

DC

LKC

ON

FD

ON

EnC

ON

FIG

nSTA

TU

SD

ATA

nSTA

TU

SnC

ON

FIG

TM

S

MS

EL0

TC

K

MS

EL[

1..0

]M

SE

L[1.

.0]

TD

I

TD

O

PR

OM

_DC

LK

PR

OM

_DAT

A

PR

OM

_CS

PR

OM

_SE

LEC

T

PR

OM

_TD

O

UN

US

ED

UN

US

ED

_TR

I

DAT

A

nCO

NF

IG

DC

LK

MS

EL[

1..0

]

A_T

MS

nSTA

TU

S

CO

NF

DO

NE

A_T

CK

E_T

MS

E_T

CK

A_T

RS

T#

E_T

RS

T#

A_T

DO

A_T

DI

E_T

DO

E_T

DI

EX

TR

A_S

WIT

CH

+3.

3V

+5.

0V

+3.

3V

+3.

3V

+3.

3V

+5.

0V

+3.

3V

+3.

3V

+3.

3V

+3.

3V

+3.

3V

+3.

3V

JP3

HE

AD

ER

5X2

12

34

56

78

910

R24

1K

U6D

74H

CT

125

1211

13

U6C

74H

CT

125

98

10

U6B

74H

CT

125

56

4

U6A

74H

CT

125

23

1S

2

SW

_DIP

-10

1 2 3 4 5 6 7 8 9

20 19 18 17 16 15 14 13 1210

11

R37

1K

JP4

HE

AD

ER

5X2

12

34

56

78

910

R25

1K

R18

0R

160

R21

1KR

221K

R27

1K

R23

1KR

121K

R31

1K

R13

1K

R30

1K

R15

1KR

201K

U9

EP

C2

2 12 4

9 8

20 18

10145 13111

19 3

DAT

AC

AS

C

DC

LK

CS

OE

VC

CV

PP

GN

D

VP

PS

EL

VC

CS

EL

INIT

_CO

NF

TD

IT

DO

TM

ST

CK

R33

1K

R38

1KR

341K

A-D

S-P

CI-

C-0

1

Alte

ra C

orpo

ratio

n -

FLE

X 1

0KE

PC

I Dev

elop

men

t Boa

rd D

ata

She

et

TM

A A

B B

C C

D D

E E

44

33

22

11

EXTRA

GATES

A

RS

-232

, LE

Ds,

and

Pro

to A

rea

C

79

Mon

day,

Jul

y 26

, 199

9

Titl

e

Siz

eD

ocum

ent N

umbe

rR

ev

Dat

e:S

heet

of

LED

[4..1

]

PR

OT

O[2

3..1

]

nLE

D3

nLE

D2

nLE

D1

nLE

D4

LED

1

LED

2

LED

3

LED

4

TX

DT

RR

TS

RX

CT

SC

DR

I

PR

OT

O1

PR

OT

O2

PR

OT

O3

PR

OT

O4

PR

OT

O5

PR

OT

O6

PR

OT

O7

PR

OT

O8

PR

OT

O9

PR

OT

O10

PR

OT

O11

PR

OT

O12

PR

OT

O13

PR

OT

O14

PR

OT

O15

PR

OT

O16

PR

OT

O17

PR

OT

O18

PR

OT

O19

PR

OT

O20

VP

OS

VN

EG

C1P

OS

C2P

OS

C1N

EG

C2N

EG

GN

D

PR

OT

O_C

LK

PR

OT

O21

PR

OT

O22

PR

OT

O23

UN

US

ED

2

UN

US

ED

1

P5_

IO1

P5_

IO2

P5_

IO3

P5_

IO4

P5_

IO5

P5_

IO6

P5_

IO7

P5_

IO8

P5_

IO9

P5_

IO10

P5_

IO11

P5_

IO12

P5_

IO13

P5_

IO14

P5_

IO15

P5_

IO16

P5_

IO17

P5_

IO18

P5_

IO19

P5_

IO20

P5_

IO21

P5_

IO22

P5_

IO23

P5_

IO24

P5_

IO30

P5_

IO26

P5_

IO32

P5_

IO28

P5_

IO27

P5_

IO31

P5_

IO29

P5_

IO25

P5_

IO33

P5_

IO34

P5_

IO35

P5_

IO36

P5_

IO37

P5_

IO38

P5_

IO39

P5_

IO40

P5_

IO46

P5_

IO42

P5_

IO48

P5_

IO44

P5_

IO43

P5_

IO47

P5_

IO45

P5_

IO41

P5_

IO62

P5_

IO64

P5_

IO56

P5_

IO63

P5_

IO51

P5_

IO61

P5_

IO54

P5_

IO49

P5_

IO53

P5_

IO50

P5_

IO52

P5_

IO57

P5_

IO58

P5_

IO59

P5_

IO60

P5_

IO55

P5_

IO[6

4:1]

R_C

D

R_R

X

R_T

XR

_DT

RR

_RT

S

R_C

TS

R_R

I

LED

[4..1

]

RS

232_

TX

RS

232_

DT

RR

S23

2_R

TS

RS

232_

RX

RS

232_

CT

SR

S23

2_C

DR

S23

2_R

I

PR

OT

O[2

3..1

]

PR

OT

O_C

LK

P5_

IO[6

4:1]

+5.

0VV

CC

+5.

0V

+5.

0V+

3.3V

VC

CIN

T

J35

CO

N1

1

J34

CO

N1

1

J33

CO

N1

1

J39

CO

N1

1

LED

1

LED

-QU

AD

4

1 2 3 45678

J36

CO

N1

1

U10

MA

X20

8

9 865 18 19 21 4 17 22

72 1 24 20 3 2316

10 12 13 14

11 15

VC

C

GN

D

R_O

UT

T_I

NT

_IN

T_I

NT

_IN

R_O

UT

R_O

UT

R_O

UT

R_I

N

T_O

UT

T_O

UT

T_O

UT

T_O

UT

R_I

N

R_I

NR

_IN

C1+

C1-

C2+

C2-

V+ V-

JP5

DB

9-M

ALE

594837261

J13

CO

N1

1 J17

CO

N1

1 J21

CO

N1

1

+C

690.

1uF

+

C67

0.1u

F

+C

660.

1uF

+C

700.

1uF

U4D

74H

CT

04

98

U4C

74H

CT

04

56

U4B

74H

CT

04

34

U4A

74H

CT

04

12

J25

CO

N1

1

TP

1

CO

N1

1

J29

CO

N1

1

TP

7

CO

N1

1TP

5

CO

N1

1TP

3

CO

N1

1

J18

CO

N1

1J14

CO

N1

1

TP

13

CO

N1

1 TP

15

CO

N1

1TP

11

CO

N1

1TP

9

CO

N1

1

J30

CO

N1

1J26

CO

N1

1J22

CO

N1

1

TP

25

CO

N1

1 TP

29

CO

N1

1TP

21

CO

N1

1 TP

23

CO

N1

1TP

19

CO

N1

1TP

17

CO

N1

1 TP

27

CO

N1

1 TP

31

CO

N1

1 TP

35

CO

N1

1TP

33

CO

N1

1 TP

63

CO

N1

1TP

55

CO

N1

1TP

43

CO

N1

1 TP

47

CO

N1

1TP

41

CO

N1

1 TP

45

CO

N1

1TP

37

CO

N1

1 TP

39

CO

N1

1 TP

59

CO

N1

1 TP

61

CO

N1

1TP

57

CO

N1

1TP

49

CO

N1

1 TP

51

CO

N1

1 TP

53

CO

N1

1

J12

CO

N1

1

TP

4

CO

N1

1TP

2

CO

N1

1 TP

32

CO

N1

1TP

24

CO

N1

1TP

12

CO

N1

1 TP

16

CO

N1

1TP

10

CO

N1

1 TP

14

CO

N1

1TP

6

CO

N1

1 TP

8

CO

N1

1 TP

40

CO

N1

1 TP

46

CO

N1

1TP

28

CO

N1

1 TP

30

CO

N1

1TP

26

CO

N1

1TP

18

CO

N1

1 TP

20

CO

N1

1 TP

22

CO

N1

1 TP

54

CO

N1

1TP

36

CO

N1

1 TP

50

CO

N1

1TP

48

CO

N1

1 TP

62

CO

N1

1TP

60

CO

N1

1TP

38

CO

N1

1 TP

56

CO

N1

1TP

42

CO

N1

1 TP

52

CO

N1

1 TP

58

CO

N1

1TP

44

CO

N1

1 TP

64

CO

N1

1TP

34

CO

N1

1

J16

CO

N1

1

U4E

74H

CT

04

1110

U4F

74H

CT

04

1312

R14

1KR

191K

J31

CO

N1

1J27

CO

N1

1J23

CO

N1

1J19

CO

N1

1J15

CO

N1

1

J20

CO

N1

1

J37

CO

N1

1

J24

CO

N1

1 J28

CO

N1

1

J38

CO

N1

1

J32

CO

N1

1

A-D

S-P

CI-

C-0

1

Alte

ra C

orpo

ratio

n -

FLE

X 1

0KE

PC

I Dev

elop

men

t Boa

rd D

ata

She

et

A A

B B

C C

D D

E E

44

33

22

11

EXTERNAL CLOCK INPUT

CLOCK SELECT

RESISTORS

A

Clo

ck D

istr

ibut

ion

C

89

Mon

day,

Jul

y 26

, 199

9

Titl

e

Siz

eD

ocum

ent N

umbe

rR

ev

Dat

e:S

heet

of

SE

L_C

LK

OS

C_C

LK

EX

T_C

LK

PC

I_C

LK0

PC

I_C

LK3

PC

I_C

LK4

CLK

2_0

CLK

2_1

CLK

2_2

CLK

2_3

CLK

2_4

PC

I_C

LK1

PC

I_C

LK2

PC

I_R

EF

PC

I_C

LK

A_C

LKO

UT

A_C

LK1

A_C

LK2

S_C

K0

S_C

K1

E_C

LKP

RO

TO

_CLK

+3.

3V

+3.

3V

+5.

0V

U7

CY

2305

8 3 7

6 1 4

2 5

CLK

OU

T

CLK

1

CLK

4

Vdd

RE

F

GN

D

CLK

2C

LK3

U8

CY

2305

8 3 7

6 1 4

2 5

CLK

OU

T

CLK

1

CLK

4

Vdd

RE

F

GN

D

CLK

2C

LK3

U3

HA

LFS

IZE

_OS

C

58 1 4

OU

TP

UT

VC

C

OE

GN

D

R40

150

R41

0

R49

0

R45

0

JP1

SM

B_C

ON

N1

2

34

5

R36

0

R32

0

R39

0

R35

0

C55

10P

FC

5310

PF

C56

10P

F

A-D

S-P

CI-

C-0

1

Alte

ra C

orpo

ratio

n -

FLE

X 1

0KE

PC

I Dev

elop

men

t Boa

rd D

ata

She

et

A A

B B

C C

D D

E E

44

33

22

11

POWER SUPPLY

A

Pow

er S

uppl

ies

C

99

Mon

day,

Jul

y 26

, 199

9

Titl

e

Siz

eD

ocum

ent N

umbe

rR

ev

Dat

e:S

heet

of

CC

_1S

S_1

RE

F_1

LX_1

CC

_2S

S_2

RE

F_2

LX_2

+5.

0V

+3.

3V

+5.

0V

VC

CIN

TV

CC

IO

+5.

0V

+5.

0V+

3.3V

VC

CIN

T

+5.

0V

+3.

3V

VC

CIN

T

+2.

5V

C20

0.1U

F

+C

347

UF

U2

MA

X75

0A

8 7 5

1 3 64

2

V+

LX

N.C

.

SH

DN

SS

GN

DC

C

RE

F

D2

MB

RS

130L

T3

12

D1

MB

RS

130L

T3

12

U1

MA

X75

0A

8 7 5

1 3 64

2

V+

LX

N.C

.

SH

DN

SS

GN

DC

C

RE

F

R6

13.0

K

R5

22.1

K

R4

510

C26

0.01

uF

C22

1uF

C18

0.1u

F

C19

330p

F+

C5

47U

F

JP2

HE

AD

ER

4

1 2 3 4

+C

247

UF

+C

447

UF

C35

0.1U

F

C29

0.01

uF

C17

1uF

C16

0.1u

F

C25

330p

F

C68

0.1U

FC

240.

1UF

R3

510

+C

747

UF

R7

35.7

K

C32

0.1U

F

L150

UH

12

43

R1

13.0

K

R2

22.1

K

C30

0.1U

FC

380.

1UF

+C

147

UF

C52

0.1U

F

C21

0.1U

F

C14

10U

F

C62

0.1U

FC

400.

1UF

C61

0.1U

FC

410.

1UF

C44

0.1U

FC

460.

1UF

C65

0.1U

FC

340.

1UF

C11

10U

FC

1310

UF

C10

10U

FC

1510

UF

C39

0.1U

F

L250

UH

12

43

+C

847

UF

C28

0.1U

F

C60

0.1U

FC

370.

1UF

C23

0.1U

FC

640.

1UF

C45

0.1U

FC

540.

1UF

C50

0.1U

FC

630.

1UF

C58

0.1U

FC

490.

1UF

C12

10U

F

C36

0.1U

FC

570.

1UF

+C

647

UF

C48

0.1U

FC

590.

1UF

C31

0.1U

F

A-D

S-P

CI-

C-0

1

Alte

ra C

orpo

ratio

n -

FLE

X 1

0KE

PC

I Dev

elop

men

t Boa

rd D

ata

She

et

FLEX 10KE PCI Development Board Data Sheet - Altera · e_sdone M3 P5 p4_io39 T22 V24 ... FLEX 10KE...

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Transcript of FLEX 10KE PCI Development Board Data Sheet - Altera · e_sdone M3 P5 p4_io39 T22 V24 ... FLEX 10KE...