First Look at AMD Vega GPU Architecture

CONFIDENTIAL | UNDER NDA UNTIL JANUARY 5, 2017, 9AM EST

VegaAMD’s Next-Generation GPU Architecture


CONFIDENTIAL | UNDER NDA UNTIL JANUARY 5, 2017, 9AM ESTCONFIDENTIAL | UNDER NDA UNTIL JANUARY 5, 2017, 9AM EST

We want rich, lavish virtual worlds.



We want to create with limitless detail, in real time.



We want to make decisionsbased on exabytes of datain an instant.



GPUs are taking on more diverse workloads

WORKSTATIONPhysically Based Rendering

Physics ModelingLoom (VR)

Hi-Res HDR Content Creation

GAMING4K VR

ConsolesNew Rendering Pipelines

New APIseSports

COMPUTEMachine Learning

Image Recognition / Computer VisionNatural Data Processing

GPU



Conventional architectures are not scaling to meet needs



Game install sizes are expanding exponentiallyGi

gaby

tes

Rela

tive

Data

Size

Deus Ex Series Install Disk Size (source: Steam)CONFIDENTIAL | UNDER NDA UNTIL JANUARY 5, 2017, 9AM EST

Chart for illustrative purposes2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016


2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016

The Lord of the Rings

Fellowship of the Ring

The HobbitAn Unexpected

Journey

Pro graphics data sets are well into the petabytesPe

taby

tes

Rela

tive

Asse

t Size


Avatar

The HobbitThe Desolation of

SmaugThe HobbitBattle of the Five

Armies

The BFG

See endnote for details


Compute workloads have shot into the exabytes

Character Recognition Object DetectionImage Recognition

Image/Video Recognition

1995 1997 1999 2001 2003 2005 2007 2009 2011 2013 2015 2017

See endnote for details

Data Point Too Big to Illustrate

Exab

ytes

Rela

tive

Trai

ning

Set

Size



Growth in processing power is outpacing growth in memory capacity

2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017

Relative GPU Compute (GFLOPS)

Relative GPU Storage Capacity

CONFIDENTIAL | UNDER NDA UNTIL JANUARY 5, 2017, 9AM EST See endnote for details


Introducing the world’s most scalable GPU memory architecture



High-Bandwidth Cache




bandwidth per pin*

2XHBM2

*vs HBM


HBM2

Over 50% smaller footprintHBM2 vs. GDDR5

8X Capacity/stack*

*vs HBM


High-Bandwidth Cache Controller


HBCC

NV RAM

Netw

orkStorage

System DRAM



virtual address space

512 TBHigh-BandwidthCache Controller


Adaptive, fine-grained data movement

High-BandwidthCache Controller


Total Allocations Accessed

(Ultra 4K)

Time

(Ultra 4K)

See endnotes for details

Time

Grap

hics

Mem

ory

Grap

hics

Mem

ory

CONFIDENTIAL | UNDER NDA UNTIL JANUARY 5, 2017, 9AM ESTCONFIDENTIAL | UNDER NDA UNTIL JANUARY 5, 2017, 9AM ESTImage from Deus Ex: Mankind Divided™ courtesy of Eidos Montreal

CONFIDENTIAL | UNDER NDA UNTIL JANUARY 5, 2017, 9AM ESTCONFIDENTIAL | UNDER NDA UNTIL JANUARY 5, 2017, 9AM EST Image from Deus Ex: Mankind Divided™ courtesy of Eidos Montreal


New ProgrammableGeometry Pipeline


HBCC

NV RAM

Netw

orkStorage

System DRAM

GeometryPipeline



peak throughputper clock2XOver

New ProgrammableGeometry Pipeline

See endnotes for details


Primitive Shaders


Improved Load Balancing


Next-Generation Compute Engine


HBCC

NV RAM

Netw

orkStorage

System DRAM

GeometryPipeline

ComputeEngine



I N T R O D U C I N G

Vega NCUNext-Generation Compute Unit

5128-bit opsper clock



Double Precision Rate is Configurable

*See endnotes for details


Rapid Packed MathSupercharges performance of emerging workloads


NCU is optimized for higher clock speeds and higher IPC

CU*

NCU

*See endnotes for details


We’ve been working on reducing memory bandwidth consumption for many years

Texture & Color CompressionFastZ ClearHiZ


Next GenerationPixel Engine


HBCC

NV RAM

Netw

orkStorage

System DRAM

GeometryPipeline

ComputeEngine

PixelEngine



Fetch once enabled by smart primitive rasterization with on-chip bin cache

Shade once enabled by culling of pixels invisible to final scene

Draw Stream Binning RasterizerDesigned to improve performance and saves power


L1

Compute

Engine

Pixel

Engine

Geometry

Engine

L1

L1

L2

Memory Controller

GDDR

5

GDDR

5

GDDR

5

GDDR

5

GDDR5

GDDR5

GDDR5

GDDR5

Legacy Architecture –Non-coherent Pixel and Texture Memory Access



Render back-ends are now clients of the L2 cache.


HBCC

NV RAM

Netw

orkStorage

System DRAM

GeometryPipeline

ComputeEngine

PixelEngine L1

L1

L1L2



Helps improve performance with applications that use deferred shading.


HBCC

NV RAM

Netw

orkStorage

System DRAM

GeometryPipeline

ComputeEngine

PixelEngine L1

L1

L1L2



L1

Compute Engine

Pixel Engine

Geometry Pipeline

L1

L1

L2

High BandwidthCache Controller

High-BandwidthCache

NVRAM

Network Storage

System DRAM

CPU MM Display XDMA PCIe®



New Programmable Geometry Pipeline

RevolutionaryHigh Bandwidth Cache

AdvancedPixel Engine

VegaGPU Architecture for the Immersive and Instinctive Computing Era

Next-Gen Compute Unit


ENDNOTES

Pro graphics data set slide: Data provided by a third party studio and not verified by AMD. Data is historic - cinema asset data sizes for Lord of the Rings (2001) @.15PB, Avatar (2009) @ 1 PB, The Hobbit –Part1 (2012) @ 1.4 PB, The Hobbit –Part2 (2013) @ 1.8 PB, The Hobbit –Part3 (2014) @ 2.3 PB, and The BFG (2016) @ 3 PB. VG-6

Compute workload data set slide: Typical word character recognition data set defined as 18.3 MB (http://wordnet.princeton.edu/wordnet/download/old-versions/ ). Object Identification datasets defined as 490MB (http://host.robots.ox.ac.uk/pascal/VOC/databases.html#VOC2005_1). Image recognition defined as 144 GB (http://www.image-net.org/challenges/LSVRC/2010/download-all-nonpub). Image and video recognition datasets defined as 144 GB (http://image-net.org/challenges/LSVRC/2015/) Natural Data Analysis datasets defined as 2.5QB(http://www.vcloudnews.com/every-day-big-data-statistics-2-5-quintillion-bytes-of-data-created-daily/). VG-7

Growth in processing power slide: Data based on historic product specs; GPU relative frame buffer size vs relative TFLOP capability. The ATI Radeon 9700 Pro was 0.026 TFLOPs with 128 MB framebuffer. The ATI Radeon X950 XT was 0.08 TFLOPs with 256 MB framebuffer. The ATI Radeon X1900 XT was 0.375 TFLOPs with 512 MB framebuffer. The ATI Radeon HD 2900 XT was 0.4755 TFLOPs with 512 MB framebuffer. The ATI Radeon HD 4870 XT was 1.2 TFLOPs with 512 MB framebuffer. The ATI Radeon HD 5870 was 1.2 TFLOPs with 512 MB framebuffer. The AMD Radeon HD 7970 was 3.79 TFLOPs with 3 GB framebuffer. The AMD Radeon R9 290X was 5.63 TFLOPs with 4 GB framebuffer. The AMD Radeon R9 Fury X was 8.6 TFLOPs with 4 GB framebuffer. VG-5

Witcher 3 and Fallout 4 data slide: Data based on AMD Internal testing of an early Vega sample using an AMD Summit Ridge pre-release CPU with 8GB DDR4 RAM, Vega GPU, Windows 10 64 bit, AMD test driver as of Dec 5, 2016. Results may vary for final product, and performance may vary based on use of latest available drivers. VG-4

Geometry throughput slide: Data based on AMD Engineering design of Vega. Radeon R9 Fury X has 4 geometry engines and a peak of 4 polygons per clock. Vega is designed to handle up to 11 polygons per clock with 4 geometry engines. This represents an increase of 2.6x. VG-3

CU vs Vega NCU slide: Discrete AMD Radeon™ and FirePro™ GPUs based on the Graphics Core Next architecture consist of multiple discrete execution engines known as a Compute Unit (“CU”). Each CU contains 64 shaders (“Stream Processors”) working together. GD-78


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First Look at AMD Vega GPU Architecture

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