Final Ppt by Sajid

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    PRESENTATIONON

    CAPSTONE PROJECT

    TOPIC: Simulation of 16 bit microprocessorusing VHDL

    Presented By:-

    SAJID QAMAR(10906981)

    SHANI PRATAP(10905591)

    MOHD. WASIF(1090)

    SANJEEV KAMAL(1090)

    JYOTIKA

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    CONTENTS

    Objective

    VLSI Technology Scaling

    HDL

    What is VHDL ? Describing in Design

    Structure of Entity

    Design methodologies of digital design

    Block diagram of Microprocessor

    Advantage

    Future Aspects

    Conclusion

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    Objective

    To develop a 16 bit microprocessor using VHDL

    Use of xilinx and modesim simulator

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    VLSI TECHNOLOGY..

    SCALING

    Digital logic is implemented using transistors in integrated circuits

    containing many gates.

    Small scale integrated circuits(SSI) contain 10 gates or less.

    Medium scale integrated circuits(MSI) contain 10-100 gates. Large-scale integrated circuits(LSI) contain upto 104 gates.

    Very large-scale integrated circuits(VLSI) contain

    >104 gates.

    Improvement in manufacturing lead to ever smaller transistors

    allowing more per chip.

    >107 gates/chip now possible;doubles every 18 months or so

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    HARDWAREDESCRIPTIONLANGUAGE (HDL)

    There are two popular HDLs:-

    VHDL(Very High Speed Integrated Circuits

    Hardware Description Languages)Developed by DOD from 1983

    IEEE Standard 1076-1987/1993/200x

    Based on the ADA language

    Verilog

    IEEE Standard 1364-1995/2001/2005

    Based on the C Language

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    WHATIS VHDL

    VHDL is an acronym for VHSIC Hardware Description Language (VHSIC is anacronym for Very High Speed Integrated Circuits).

    Itis a hardware description language used in electronic design automation todescribe digital and mixed-signal systems such as fieldprogrammable gate

    arrays and integrated circuits.

    The language has constructs that enable to express the concurrent or sequential

    behavior of a digital system with or without timing.

    This language not only defines the syntax but also define very clear simulation

    semantics for each language construct.

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    DESCRIBINGADESIGN

    In VHDL, a design consists at a minimum of an

    entitywhich describes the interface and an

    architecturewhich contains the actual

    implementation

    An entity can be described using,

    1. Entity declaration.

    2. Architecture.3. Configuration

    4. Package declaration.

    5. Package body.

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    Entity declaration:

    It defines the names, input output signals and modes of a

    hardware module.

    Architecture:

    It describes the internal description of design or it tells what is

    there inside design.

    Configuration:If an entity contains many architectures and any one of the

    possible architecture binding with its entity is done using

    configuration.

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    CONTINUE..

    Package declaration:

    Package declaration is used to declare components,

    types constants, functions and so on

    Package body:

    A package body is used to declare the definitions

    and procedures that are declared in corresponding

    package. Values can be assigned to constantsdeclared in package in package body.

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    STRUCTUREOFANENTITY

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    BEHAVIORALMODELINGINVHDL

    entity MUX_4 is

    port(IN 1,IN2,IN3,IN4,S1,S0:IN BIT:ZOUT:OUT

    BIT);

    End MUX_4;Architecture BEH of MUX_4 is

    begin

    process (IN 1,IN2,IN3,IN4,S0,S1)

    begin

    If (S1=0 and S0=0) then

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    CONTINUE

    Zout

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    BLOCKDIAGRAMOFMICROPROCESSOR

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    ADVANTAGES OF VHDL

    VHDL offers several advantages to the designer.

    Standard language. Readily available tools.

    Powerful and versatile description language.

    Multiple mechanisms to support design hierarchy.

    Versatile design reconfiguration support. Support for multiple levels of abstraction.

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    FUTURE ASPECTS OF VHDL.

    VHDL describe the behavior is a fast growing industry and with

    unbelievable future aspects.

    Floating point multiplier VHDL future scope

    16-bit microprocessor using VHDL.

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    CONCLUSION

    I conclude that the VHDL language is more comprehensive andsimple.

    As a knowledge of Hardware Description Language has

    become a very important aspect for ELECTRONICS ANDCOMMUNICATION ENGINEERING students.

    Moreover with the advent of new technology every 5 to 6

    months, it has become very important to know the varioustechnology advancements happening in electronics field,

    and for this the Hardware Modeling Language provide a very

    convenient platform.

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    CONTINUE

    Each and every component is simulated

    individually, also CPU simulated using component.

    All the component and CPU shows good results.

    Waveforms are shown in the report, which showscorrect results.

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    QUESTION????