Filters FPGA

8/13/2019 Filters FPGA

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Implementing Filters on FPGAsDepartment of Electrical and Computer Engineering

Real-Time DSP and FPGA Development LabMar S! Manalo and A"#an A"#rafi

$


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Table of Contents

%ntroduction!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!&

Analog to Digital Conver"ion!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!&

Adding a DC 'ff"et!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!(De"igning a Lo)pa"" Digital Filter in MATLA*!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!+

%mplementing a Filter on an FPGA!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!$,Lea"t Mean Suare Adaptive Filter on FPGA!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!$(

Appendi.!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!,$

Analog to Digital Conver"ion Code!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!,$

MATLA* Filter Code!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!,/Digital Filter Code!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!,(

Adaptive Filter 0DL!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!&1

Reference"!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!&(

,


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Introduction

T#i" paper e.plain" t#e proce"" of de"igning a digital filter in MATLA*2 converting it to 0DL u"ing

0DL Coder and programming it onto an FPGA! T#e reader "#ould #ave e.perience )it# creating a

pro3ect in 4ilin. %SE2 implementing t#e pro3ect and programming it onto an FPGA2MATLA*5Simulin2 and ba"ic digital filter concept"! T#e reader "#ould al"o #ave a )oring

no)ledge of t#e 60DL language and concept" "uc# a" component in"tantiation! T#e "oft)are ver"ion

u"ed are a" follo)"7

4ilin. %SE $&!, 8(/-bit92 MATLA* 8R,1$$a9 )it# DSP toolbo. and Simulin 0DL Coder!

Analog to Digital Conversion

T#e ADC5DAC t#at )e )ill be u"ing i" t#e PM'DAD$ and PM'DDA, module" from Digilent! T#e

PM'DAD$ u"e" t#e Analog Device" AD:/:( $,-bit2 A5D Converter! T#e PM'DDA, u"e" t#e

;ational Semiconductor CAD$,$S$1$2 $,-bit D5A Converter! T#e"e device" are controlled u"ing t#eSerial Perip#eral %nterface 8SP%9 ! For a tutorial and e.ample 60DL code on u"ing t#e"e module" on

t#e Spartan-&E "tarter board "ee7 #ttp755)))!co"miac!org5tutorial t#i" code 8note7 )e are

u"ing t#e 4G% E.pan"ion 0eadere"2 ( 0eader of t#e ML=1( to interface )it# t#e

PmodAD$5PmodDA,97

# ML506 100 MHz clock pinNET "CLK" LOC = "AH15";

# Pmod AD1 ADC Pin on !6 Hd$

NET "C%" LOC = "H&&";

NET "D'N" LOC = "(&)";NET "%CLK" LOC = "*&&";

&
http://www.cosmiac.org/tutorial_15.htmlhttp://www.cosmiac.org/tutorial_15.htmlhttp://www.cosmiac.org/tutorial_15.htmlhttp://www.cosmiac.org/tutorial_15.htmlhttp://www.cosmiac.org/tutorial_15.html


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# Pmod DA+ DAC Pin on !6 Hd$

NET "%,NC" LOC = "!&)";

NET "DO-T" LOC = "L&&";NET "%CLK+" LOC = "P&)";

Bour pro3ect )or"pace "#ould no) loo "omet#ing lie 8figure $97

;o) connect t#e pmod" to t#e ML=1( ( #eader"2 maing "ure t#at ever> t#ing i" connected properl>!

T#e ( 0eader al"o "upplie" t#e po)er and ground pin" of t#e Pmod"! 8Figure ,9 i" a picture of t#e"etup7

/

(i./$ 1 /c2 2il


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After ever>t#ing i" connected2 generate a programming file in 4ilin. %SE b> clicing on ?GenerateProgramming File? in t#e proce"" )indo)7

Turn on t#e board and program t#e FPGA )it# iMPACT or an> ot#er programming tool of c#oice!

To te"t t#i" code a function generator i" u"ed to to produce a =110@ "ine )ave )it# 1!=6pp and #ig#-@

output! T#i" "ine )ave i" t#en fed into t#e A1 pin of t#e ADC! T#e "ignal get" converted to digital and

t#en get" converted bac to analog! A" >ou can "ee in 8Figure &92 t#e output "eem" to be rectified! T#i"i" becau"e t#e ADC onl> accept" voltage" bet)een 1-&!&6 and t#e DAC can onl> output 1-&!&62 but t#e

=

(i./$ + ML506 !6 Hd$


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output of t#e function generator i" bet)een -1!=6 and 1!=6!

T#u"2 )e need to add a DC off"et to our input "ignal "o )e can properl> digiti@e it! T#i" can ea"il> bedone b> c#anging t#e function generator "etting" to automaticall> add a DC off"et! *ut if )e are u"ing

an audio "ignal2 )e don?t #ave t#e lu.ur> of doing t#i"! %n"tead2 )e mu"t build a circuit )#ic# can add

a DC off"et to our "ignal! T#i" i" di"cu""ed in t#e ne.t "ection!

Adding a DC Offset

T#e ADC5DAC module" )e u"ed onl> "upport" voltage" of 1-&!&6! 0o)ever t#e voltage coming from

a t>pical audio audio "ignal -1!= to 1!=6! So before "ending t#i" "ignal into t#e ADC )e mu"t fir"t add

a DC off"et to t#e input "ignal! Since our input voltage i" 1!=6pp )e c#o"e a DC off"et of $!=6! T#e

circuit t#at doe" t#i" i" "#o)n in 8Figure /9

(

(i./$ & 3c4i2id %i.nl


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0ere i" t#e circuit implemented on a breadboard 8note t#at t#e circuit "#o)n #a" t)o input" and bot#

t#e input" are added a DC off"et2 >ou onl> need one input at t#e moment2 t#e "econd input i" u"ed for

t#e adaptive filter di"cu""ed later97

:

(i./$ ) DC O224

(i./$ 5 DC O224 Ci$c/i4 on $do$d


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;o) )#en )e appl> our "ignal )it# t#e DC off"et )e get no rectification a" "#o)n belo)7

(i./$ 6 DC O224 ci$c/i4 Connc4 4o ADC7DAC c8ip

(i./$ 9 %i.nl :i48 no $c4i2ic4ion


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Designing a Lowpass Digital Filter in MATLAB

After converting t#e analog "ignal to a digital "ignal2 "everal DSP tec#niue" can be u"ed to manipulate

t#e input"ignal! %n t#i" ca"e )e )ill implement a lo)pa"" digital filte!

Fir"t )e )ill create a lo)pa"" filter u"ing MATLA*! To facilitate t#i" proce"" )e )ill u"e t#e

MATLA* demo ?0DL *utter)ort# Filter?!

8To find t#i" demo2 "tart MATLA* and clic #elp Product 0elp! %n t#e "earc# bar t>pe7 ?0DL*utter)ort# Filter?9

%n MATLA* create a ne) "cript file a" "#o)n in 8Figure 97

T#en Clic File "ave a"!! and name t#e file ?m> called?lo)pa""


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T#en cop>-pa"te t#e code from 8Appendi.7 MATLA* Filter Code9 a "lig#tl> modified ver"ion of t#e

butter)ort# e.ample 8T#i" )ill create a lo)pa"" filter )it# a "ampling freuenc> of =, 0@ and acutoff freuenc> of $111 0@2 )it# $, bit input5output )idt#" and $$ fractional lengt#97

;o) clic on t#e green pla> arro) and clic ?C#ange Folder? if it a""7

T#en MATLA* "#ould create a te"tbenc# and a 60DL module for t#e filter )e "pecified a" "#o)n in

8figure $$97

$1

(i./$ 10 MATLA (il4$


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;o) if )e loo into t#e ?lo)pa"" )e created earlier2 )e "#ould #ave a ne)director> called ?#dl i" t#e 60DL module and

te"tbenc# for our lo)pa"" filter! %n t#e ne.t "ection )e )ill u"e t#e 60DL file t#at MATLA* created

and in"tantiate it in our ADC5DAC module!

$$

(i./$ 11 MATLA C$4 HDL

(i./$ 1+ HDL (il


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Implementing a Filter on an FPA

After MATLA* create" t#e 0DL file"2 )e )ill in"tantiate t#em into our ADC5DAC circuit!

Go bac to 4ilin. %SE and rig#t-clic t#e pro3ect and clic ?add "ource?7

;avigate to t#e #dlbutter!v#d file t#at MATLA* created and add it7

$,

(i./$ 1& N: o/$c

(i./$ 1) Addin. HDL 2il 4o p$oc4


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;o) )e mu"t create a cloc for t#e filter u"ing DCM! Rig#t-clic t#e pro3ect and clic ?;e) Source?!

Clic ?%P 8C'RE Generator Arc#itecture i@ard9? and name it ?cl ba"ic function and clic on ?Double cloc freuenc> 8DCM9? and clic ;e.t and Fini"# 8t#i"

i" "#o)n in t#e follo)ing page on Figure $(97

%n t#e ne.t )indo) c#oo"e t#e follo)ing option" in figure $: and clic '7

$&

(i./$ 15 >ilin? 'P Co$

(i./$ 16 Add DCM


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e )ill divide t#e $11M0@ ML=1( cloc b> ,1 to get = M0@! C#oo"e t#e follo)ing option" "#o)n in

figure $ 7

Clic t#e ?Advanced? button and c#ec t#e ?Divide %nput Cloc *> ,? option7

$/

(i./$ 19 C8oo @HDL 48 2il 4p

(i./$ 1 DCM %44in.


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4ilin. )ill no) create a cloc divider module t#at )ill divide our $11M0@ cloc into a =M0@ cloc!

'ur ne.t "tep i" to in"tantiate t#e cloc divider and t#e lo)pa"" filter into our adc accept" "ignal" t#at #ave@ero DC off"et2 meaning t#at t#e> #ave to be centered around 1! T#u"2 t#e DC off"et )e added to our

"ignal earlier )ill not )or )it# our filter! To fi. t#i"2 )e mu"t "ubtract off t#e DC value in our 60DL

code! T#ere are man> )a>" of doing t#i"2 for t#i" e.ample )e )ill "impl> "ubtract 1.H11H )#ic# i"appro.imatel> $!=6 to ever> value of our "ignal! T#en pa"" t#i" t#roug# t#e filter and t#en add bac

1.H11H to t#e filter output and pa"" it to t#e DAC!

T#e ne) 60DL code t#at )ill in"tantiate t#e lo)pa"" filter2 DCM cloc divider and tae care of t#eDC off"et i" given in t#e Appendi. titled Digital Filter Code 83u"t cop> and pa"te over t#e e.i"ting

adc


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Least Mean !"uare Adaptive Filter on FPA

A lea"t mean "uare adaptive filter can al"o be implemented u"ing a "imilar proce""!

For t#i" "ection )e )ill u"e t#e MATLA* Simulin 0DL Coder e.ample of noi"e cancellation u"ing

t#e LMS Adaptive Filter!

T#i" file can be found in t#e follo)ing pat# 7 Program File" MATLA* R,1$$a toolbo. #dlcoder #dlcoderdemo" #dlcoderlm"!mdl

Fir"t cop>-pa"te t#i" file into a director> called ?;oi"eRemove?!

*efore generating t#e 0DL code for t#i" bloc2 )e mu"t mae t#e follo)ing c#ange"7

C#ange t#e "ampling freuenc> to matc# our previou" 0DL code for t#e lo)pa"" filter )#ic# i"

=,0@

T#e model i" made for $(-bit fi.ed point but our ADC i" $,-bit!

Fir"t c#ange t#e "ampling freuenc> of t#e lm" filter! 'pen #dlcoderlm"!mdl in MATLA*! T#en

c#ange t#e "ampling time from t#e default $5111 to $5=,111 b> double clicing all t#e bloc" andc#anging it! 8T#i" ma> "ound tediou" but >ou onl> need to do t#i" for t#e input bloc" a" mo"t of t#e

ot#er bloc" in#erit t#eir "ampling time from t#e previou" bloc9! Figure ,$ "#o)" a "creen"#ot of #o)

$(

(i./$ +0 A44n/4d o/4p/4 o2 Di.i4l Lo:p (il4$


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to c#ange t#e "ampling time!

T#en )e need to c#ange t#e model to )or )it# $, bit" in"tead of $( bit"!

Double-clic t#e Acou"tic Environment and c#ange t#e Convert bloc to t#e data t>pe "pecified belo)8Figure ,,97

$:

(i./$ +1 C8n. %mplin. Tim

(i./$ ++ 1+ i4


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Double-clic t#e lm" bloc and c#ange t#e final "umming node to #ave t#e follo)ing data t>pe "#o)n

in figure ,&7

Save t#e pro3ect and go to Tool" 0DL Code Generation 'ption"!

Set t#e follo)ing option" to generate 60DL code for t#e lm" bloc and "ave it into a folder named

?lm"


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After t#e 0DL code generation complete"2 )e follo) t#e "tep" in t#e previou" "ection for t#e lo)pa""

filter but in"tead of in"tantiating t#e lo)pa"" filter )e )ould in"tantiate t#e lm" adaptive filter!

T#e 60DL code in"tantiating t#e adaptive filter i" given in t#e appendi. title Adaptive Filter 0DL

0ere i" t#e CF file for interfacing )it# t#e ML=1(7

I ML=1( $11 M0@ cloc pin

;ET JCLJ L'C K JA0$=J

I Pmod AD$ ADC Pin" on ( E.pan"ion 0eader

;ET JCSJ L'C K J0&&J;ET JD%;J L'C K JF&/J I noi"e

;ET JD%;,J L'C K J0&/JI de"ired2 pilot" mic I 8noi"e N clean "ignal9

;ET JSCLJ L'C K JG&&J

I Pmod DA, DAC Pin" on ( E.pan"ion 0eader

;ET JSB;CJ L'C K J&/J

;ET JD'TJ L'C K JL&&J;ET JSCL,J L'C K JP&/J

I gpio ")itc# $;ET J")1J L'C K J,=J

After programming t#e FPGA2 )e created t)o input" u"ing MATLA*! 'ne i" noi"e and t#e ot#er i" a

=110@ "ignal N noi"e! T#e noi"e i" "tored in t#e left c#annel of a !)av file and t#e "ignalNnoi"e i""tored in t#e rig#t c#annel!

e t#en input t#e"e t)o "ignal" "imultaneou"l> into t#e adaptive filter! *elo) are picture" of t#e inputand output! 8Figure" ,= and ,(9

$+

(i./$ +5 %i.nl :i48 noi


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,1

(i./$ +6 (il4$d %i.nl


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Appendi#

Analog to Digital Conversion Code

li$$ 'EEE;

/ 'EEE%TDLO*'C116)ALL;/ i4dlo.ic$i48ll;

n4i4 dcdc ipo$4

CLK in 4dlo.ic; ML506 100MHz clock

C% o/4 4dlo.ic; c8ip lc4 2o$ ADCc4iB lo:F

%,NC o/4 4dlo.ic; %,NC 2o$ DAC

D'N in 4dlo.ic; ADCDO-T o/4 4dlo.ic; DAC

T8 4:o clock i.nl :ill clock 48 ADC7DAC

%CLK o/4 4dlo.ic; ADC %CLK+ o/4 4dlo.ic DAC

F;

nd dcdc;

$c8i4c4/$ 8Bio$l o2 dcdc i

(%M 444p 444p i 'DLEG 3EADDATAG (-NCG 3'TEDATAF;

ini4il 44i.nl 44 444p = 3EADDATA;

d4 2$om 48 ADCi.nl d4 4dlo.icBc4o$11 do:n4o 0F;

co/n4$ B$ili.nl cn4 in4.$ $n. 0 4o +0 = 0;

co/n4$ 2o$ clock diBiion

i.nl clkdiB in4.$ $n. 0 4o 6;

n: clock 2$om diBiion

i.nl n:clk 4dlo.ic = I0I;i.nl $iin.d. 4dlo.ic = I1I;

,$


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$4 i.nl

i.nl $4 4dlo.ic = I0I;

.in

d$iB 48 ADC nd DAC clock pin T8 ADC nd DAC cn clock /p 4o +0 MHz

%CLK J= n:clk;

%CLK+ J= n:clk;

diBid 48 ML506 clock 4o +0 MHz

clockdiBid p$ocCLKG $4F

.ini2 $4 = I1IF 48n

li2 $iin.d.CLKFF 48n

i2 clkdiB = 5F 48n diBid 100MHz 5$iin.d. J= $iin.d. ?o$ I1I;

n:clk J= n:clk ?o$ I1I;

clkdiB J= 0;l

clkdiB J= clkdiB 1;

nd i2;nd i2;

nd p$oc clockdiBid;

min p$oc (%Mmin p$oc CLKG $4F

.ini2 $4 = I1IF 48n

li2 $iin.d.CLKFF 48n

i2 clkdiB = 5 nd $iin.d. = I1IF 48n

c 44 i

c8 44 4k 16 clock ccl 4o 2ini8 ?cp4 (-NC :8ic8 onl 4k 1

:8n 'DLE =C% J= I1I;

%,NC J= I1I;

i2 cn4 = 16F 48ncn4 J= 0;

44 J= 3EADDATA;

lcn4 J= cn4 1;

,,


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44 J= 'DLE;

nd i2;

:8n 3EADDATA =C% J= I0I;

%,NC J= I1I;

cn4 J= cn4 1;

i2 cn4J)F 48n

cn4 J= cn4 1;44 J= 3EADDATA;

li2 cn4 & nd cn4 J 16F 48n

cn4 J= cn4 1;

48 2i$4 ) i4 $ 0000 onl $d 48 l4 1+

d415cn4F J= D'N;

44 J= 3EADDATA;li2 cn4 = 16F 48n

cn4 J= 0;

44 J= (-NC;nd i2;

i.nl p$ocin. :o/ld .o in 48i 44 /4 2o$ no: : donI4 do n48in. in 8$

:8n (-NC =

C% J= I1I;

%,NC J= I1I;cn4 J= 0;

44 J= 3'TEDATA;

:8n 3'TEDATA =

C% J= I1I;%,NC J= I0I;

i2 cn4 = 0 o$ cn4 = 1F 48n

cn4 J= cn4 1;DO-T J= I0I;

44 J= 3'TEDATA;

li2 cn4 = + o$ cn4 = &F 48ncn4 J= cn4 1;

DO-T J= I0I;

44 J= 3'TEDATA;li2 cn4 & nd cn4 J 16F 48n

cn4 J= cn4 1;

DO-T J= d415 cn4F;

,&


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44 J= 3'TEDATA;

li2 cn4 = 16F 48n

cn4 J= 0;

44 J= 'DLE;nd i2;

nd c;

nd i2;

nd i2;nd p$oc min;

nd 8Bio$l;

MATLAB Filter Code

%% Design a lowpass filter to filter out some high frequency sounds in an% audio file.%% Create the filterclose all;clear all;Fs = 52000; % ampling freq = 52 !"#Fn = Fs$2;Fd& = '000; % Cutoff frequency% Design the lowpass filter

% filter order is 5( witha d) point at Fd& = 500"#filtdes = fdesign.lowpass*+n(fd&+( 5( Fd&( Fs,;"d = design*filtdes( +&utter+,;% Con-ert it from the default structure *DF2, to the desired structure(% DF'"d = con-ert*"d( +df'sos+,;% /amine the responsef-tool*"d( +Fs+( Fs( +Frequencycale+( +log+,;%% Create the 1uanti#ed Filter"d.arithmetic = +fied+;

"d.nput3ord4ength = '2;"d.nputFrac4ength = '';"d.utput3ord4ength = '2;"d.utputode = +pecify6recision+;"d.utputFrac4ength = '';"d.Coeff3ord4ength = '2;"d.7ccum3ord4ength = 200;"d.8umtate3ord4ength = 20;

,/


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"d.Dentate3ord4ength = 20;"d.Cast)eforeum = false;"d.9oundode = +nearest+;"d.-erflowode = +saturate+;f-tool*"d( +Fs+( Fs( +Frequencycale+( +log+,;%% 9equanti#e the Filter

% n the pre-ious plot( f-tool shows that the quanti#ed pass&and is% approimatley 2d) lower thant the desired response. 7d:ust the% coefficient word length from '2 to ' to get the quanti#ed response% closer to the reference dou&le userstim =userstim(sin*2@pi@n$Fs@*0GFs$n,,>;endgeneratet&*"d( +?"D4+( +est)ench8ame+( +hdl&uttert&+(... +est)enchtimulus+( >(... +est)enchHsertimulus+( userstim(... +argetDirectory+( wor!ingdir,;

,=


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edit*fullfile*wor!ingdir( +hdl&uttert&.-hd+,,;%% imulation% 7fter Creating the ?"D4 and ?"D4 test &ench run it in odelim and% compare the results with the 747) simulation( descri&e &elowG% 6lot the input

range = *0Glength*userstim, < ',;y = filter*"d( userstim,;su&plot*2('(',; plot*range( userstim,;%ais*0 length*userstim, ,;title*+"D4 )utterworth filter in timulus+,;la&el*+ample I+,;% 6lot the output of the filter% 8otice how it attenuates the frequencies higher than 500 "#su&plot*2('(2,; plot*range( y,;%ais*0 length*userstim, ,;title*+"D4 )utterworth filter out 9esponse+,;la&el*+ample I+,;

Digital Filter Code

li$$ 'EEE;/ 'EEE%TDLO*'C116)ALL;

-%E 'EEEn/m$ic4dALL;

n4i4 dcdc ipo$4

CLK in 4dlo.ic; ML506 clock

C% o/4 4dlo.ic; c8ip lc4 2o$ ADCc4iB lo:F%,NC o/4 4dlo.ic; %,NC 2o$ DAC

D'N in 4dlo.ic; ADCDO-T o/4 4dlo.ic; DAC

4/$n lo: p 2il4$ on o$ o22 :i48 %0

:0 in 4dlo.ic;

T8 4:o clock i.nl :ill clock 48 ADC7DAC%CLK o/4 4dlo.ic; ADC

%CLK+ o/4 4dlo.ic DAC F;

nd dcdc;

$c8i4c4/$ 8Bio$l o2 dcdc i

(%M 44

4p 444p i 'DLEG 3EADDATAG (-NCG 3'TEDATAF;i.nl 44 444p = 3EADDATA;

i.nl d4 4dlo.icBc4o$11 do:n4o 0F;i.nl cn4 in4.$ $n. 0 4o +0 = 0;i.nl clkdiB in4.$ $n. 0 4o +0;i.nl n:clk 4dlo.ic = I0I;

i.nl $iin.d. 4dlo.ic = I1I;


,(


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2il4$ clocki.nl n:clk2il4$ 4dlo.ic = I0I;i.nl 2il4$cn4 in4.$ $n. 0 4o 100 = 0;

5MHz clock 2$om DCMi.nl clk56 4dlo.ic;

COMPONENT clkdiB

PO3TCLK'N'N 'N 4dlo.ic;

CLKD@O-T O-T 4dlo.ic;CLK0O-T O-T 4dlo.ic;

LOCKEDO-T O-T 4dlo.icF;

END COMPONENT;

lo:p 2il4$ i.nli.nl clknl 4dlo.ic = I1I;

i.nl 2il4$in 4dlo.icBc4o$11 do:n4o 0F;i.nl 2il4$o/4 4dlo.icBc4o$11 do:n4o 0F;

componn4 8dl/44$

po$4 clk in 4dlo.ic;clknl in 4dlo.ic;$4 in 4dlo.ic;

2il4$in in 4dlo.icBc4o$11 do:n4o 0F;2il4$o/4 o/4 4dlo.icBc4o$11 do:n4o 0F

F;nd componn4;

con4n4 4o conB$4 48 ADC Bl/ 4o i.nd

con4n4 on2iB 4dlo.icBc4o$11 do:n4o 0F = >"00"; 15@

.in

'n4n4i4 48 /44$:o$48 2il4$

/44$1 8dl/44$ po$4 mpclk = n:clk2il4$Gclknl = clknlG

$4 = $4G2il4$in = 2il4$inG2il4$o/4 = 2il4$o/4

F;

'n4n4i4 48 DCM clock diBid$'n4clkdiB clkdiB PO3T MAP

CLK'N'N = CLKG

CLKD@O-T = clk56GCLK0O-T = opnG

LOCKEDO-T = opnF;

d$iB 48 ADC nd DAC clock pin

%CLK J= n:clk;%CLK+ J= n:clk;

Ec8 o2 48 44 4k 16 clock ccl lon.

T8 DCM 4k 48 100MHz (P*A clock nd diBid i4 100M8z7 +10F = 5 MHz /4 i4 4k &16 clock ccl 4o mpl nd o/4p/4 48 o/nd

,:


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o 5 MHz7 &16F = 10)19 kHz mplin. 2$/nc

/4 on c8 $iin. d. o2 48 10)19 kHz clock : inc$mn4 clkdiB 1 %o n:clock i 10)19 kHz 7 + = 5+0 kHz :8ic8 i /4 oB 48 CD mplin. $4 o2 ))1kHz

clockdiBid p$occlk56G $4F.in

i2 $4 = I1IF 48n li2 $iin.d.clk56FF 48n

i2 clkdiB = 1F 48n$iin.d. J= $iin.d. ?o$ I1I;

n:clk J= n:clk ?o$ I1I;clkdiB J= 0;

lclkdiB J= clkdiB 1;

nd i2;nd i2;

nd p$oc clockdiBid;

C8n. 48 clock 2$/nc o2 48 2il4$ clk 4o 5+0 kHz2il4$clock p$occlk56F.in

i2 $iin.d.clk56FF 48n

i2 2il4$cn4 = )F 48ni2 clkdiB = 1 nd $iin.d. = I1IF 48n

n:clk2il4$ J= n:clk2il4$ ?o$ I1I;2il4$cn4 J= 0;

nd i2;l

2il4$cn4 J= 2il4$cn4 1;nd i2;

nd i2;nd p$oc 2il4$clock;

min p$oc (%M

min p$oc clk56G $4G :0G 2il4$o/4F

ConB$4 4o i.nd

B$il D'N4mp 4dlo.icBc4o$1+ do:n4o 0F;B$il on2iB4mp 4dlo.icBc4o$1+ do:n4o 0F;B$il D'Ni.nd4mp i.nd1+ do:n4o 0F;

B$il D'Ni.nd4mp+ i.nd1+ do:n4o 0F;B$il D'Ni.nd i.nd11 do:n4o 0F;B$il on2iBi.nd i.nd1+ do:n4o 0F;

ConB$4 4o /ni.ndB$il d4o/44mp i.nd1+ do:n4o 0F;B$il d4o/4/ni.nd4mp i.nd1+ do:n4o 0F;B$il d4o/4/ni.nd4mp+ i.nd11 do:n4o 0F;

B$il d4o/4/ni.nd /ni.nd11 do:n4o 0F;

.ini2 $4 = I1IF 48n

li2 $iin.d.clk56FF 48ni2 clkdiB = 1 nd $iin.d. = I1IF 48n

c 44 i

:8n 'DLE =

C% J= I1I;%,NC J= I1I;i2 cn4 = 16F 48n

,


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cn4 J= 0;

44 J= 3EADDATA;l

cn4 J= cn4 1;44 J= 'DLE;

nd i2;


%,NC J= I1I;cn4 J= cn4 1;

i2 cn4J)F 48n


li2 cn4 & nd cn4 J 16F 48ncn4 J= cn4 1;d415cn4F J= D'N;

44 J= 3EADDATA;

li2 cn4 = 16F 48ncn4 J= 0;

44 J= (-NC;nd i2;

:8n (-NC =C% J= I1I;%,NC J= I1I;

cn4 J= 0;

$moB 48 o224 o2 15@ nd conB$4 4o i.nd

D'N4mp = I0I d4;on2iB4mp = I0I on2iB;

conB$4 4o i.nd

D'Ni.nd4mp = i.ndD'N4mpF;on2iBi.nd = i.ndon2iB4mpF;

D'Ni.nd4mp+ = D'Ni.nd4mp on2iBi.nd;D'Ni.nd = D'Ni.nd4mp+11 do:n4o 0F;

2il4$in J= 4dlo.icBc4o$D'Ni.ndF;

44 J= 3'TEDATA;

:8n 3'TEDATA =C% J= I1I;

%,NC J= I0I;

i2 cn4 = 0 o$ cn4 = 1F 48ncn4 J= cn4 1;

DO-T J= I0I;44 J= 3'TEDATA;

li2 cn4 = + o$ cn4 = &F 48ncn4 J= cn4 1;

DO-T J= I0I;44 J= 3'TEDATA;

li2 cn4 & nd cn4 J 16F 48ncn4 J= cn4 1;

,+


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conB$4 ck 4o /ni.nd nd

dd 48 o224 o2 15@ = 0?000?9((d4o/44mp = I0I i.nd2il4$o/4F;d4o/4/ni.nd4mp = d4o/44mp on2iBi.nd;

d4o/4/ni.nd4mp+ = d4o/4/ni.nd4mp11 do:n4o 0F;d4o/4/ni.nd = /ni.ndd4o/4/ni.nd4mp+F;

i2 :0 = I1IF 48nDO-T J= d4o/4/ni.nd15cn4F;

lDO-T J= d415cn4F;

nd i2;

44 J= 3'TEDATA;

li2 cn4 = 16F 48ncn4 J= 0;

44 J= 'DLE;nd i2;

nd c;

nd i2;nd i2;

nd p$oc min;

nd 8Bio$l;

Adaptive Filter HDL

L'3A3, 'EEE;-%E 'EEE4dlo.ic116)ALL;

-%E 'EEEn/m$ic4dALL;

n4i4 dp4iB2il4$ ipo$4

CLK in 4dlo.ic; ML506 Clock

ADC nd DAC PinC% o/4 4dlo.ic; c8ip lc4 2o$ ADCc4iB lo:F

%,NC o/4 4dlo.ic; %,NC 2o$ DACD'N in 4dlo.ic; ADCD'N+ in 4dlo.ic; ADCDO-T o/4 4dlo.ic; DAC

4/$n on 2il4$ :i48 :i4c8

:0 in 4dlo.ic;

T8 4:o clock i.nl :ill clock 48 ADC7DAC

%CLK o/4 4dlo.ic; ADC %CLK+ o/4 4dlo.ic DAC

F;

nd dp4iB2il4$;

&1


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$c8i4c4/$ 8Bio$l o2 dp4iB2il4$ i

(%M 444p 444p i 'DLEG 3EADDATAG (-NCG 3'TEDATAF;

i.nl 44 444p = 3EADDATA;

ADC7DAC Tmpo$$ %i.nli.nl d4 4dlo.icBc4o$11 do:n4o 0F;i.nl d4+ 4dlo.icBc4o$11 do:n4o 0F;

i.nl cn4 in4.$ $n. 0 4o +0 = 0;i.nl lmcn4 in4.$ $n. 0 4o 150 = 0;

i.nl clkdiB in4.$ $n. 0 4o 11;i.nl n:clk 4dlo.ic = I0I;

i.nl $iin.d. 4dlo.ic = I1I;


LM% Tmpo$$ %i.nli.nl $4 4dlo.ic = I0I;

i.nl clknl 4dlo.ic = I1I;

000+ 000000000100i.nl %4p%iz 4dlo.icBc4o$11 do:n4o 0F = "000000000100";

i.nl 34i.84 4dlo.ic = I0I;i.nl co/4 4dlo.ic;i.nl E$$o$O/4 4dlo.icBc4o$11 do:n4o 0F;

i.nl 'np/4 4dlo.icBc4o$11 do:n4o 0F;i.nl Di$d 4dlo.icBc4o$11 do:n4o 0F;

Adp4iB 2il4$ clock

i.nl n:clk2il4$ 4dlo.ic = I0I;i.nl 2il4$cn4 in4.$ $n. 0 4o 100 = 0;

5MHz clock 2$om DCM

i.nl clk56 4dlo.ic;

Dcl$ 48 DCM clock diBid$

COMPONENT clkdiBPO3TCLK'N'N 'N 4dlo.ic;

CLKD@O-T O-T 4dlo.ic;CLK0O-T O-T 4dlo.ic;

LOCKEDO-T O-T 4dlo.icF;

END COMPONENT;

Dcl$ 48 LM% MATLA Componn4componn4 lm

po$4clk in 4dlo.ic;$4 in 4dlo.ic;clknl in 4dlo.ic;

'np/4 in 4dlo.icBc4o$11 do:n4o 0F;Di$d in 4dlo.icBc4o$11 do:n4o 0F;

%4p%iz in 4dlo.icBc4o$11 do:n4o 0F;34i.84 in 4dlo.ic;

co/4 o/4 4dlo.ic;E$$o$O/4 o/4 4dlo.icBc4o$11 do:n4o 0F

F;nd componn4;

&$


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.in

'n4n4i4 48 LM% MATLA lockLM%lock lm

po$4 mp

clk = n:clk2il4$G$4 = $4Gclknl = clknlG

'np/4 = 'np/4G

Di$d = Di$dG%4p%iz = %4p%izG

34i.84 = 34i.84Gco/4 = co/4G

E$$o$O/4 = E$$o$O/4F;

'n4n4i4 48 DCM clock diBid$'n4clkdiB clkdiB PO3T MAP

CLK'N'N = CLKG

CLKD@O-T = clk56GCLK0O-T = opnG

LOCKEDO-T = opnF;

d$iB 48 ADC nd DAC clock pin%CLK J= n:clk;%CLK+ J= n:clk;

Ec8 o2 48 44 4k 16 clock ccl lon. T8 DCM 4k 48 100MHz (P*A clock nd diBid i4 100M8z7 +10F = 5 MHz

/4 i4 4k &16 clock ccl 4o mpl nd o/4p/4 48 o/nd o 5 MHz7 &16F = 10)19 kHz mplin. 2$/nc

/4 on c8 $iin. d. o2 48 10)19 kHz clock : inc$mn4

clkdiB 1 %o n:clock i 10)19 kHz 7 + 5+ kHz :8ic8 i /4 oB 48 CD mplin. $4 o2 ))1kHz

clockdiBid p$occlk56G $4F

.in i2 $4 = I1IF 48nli2 $iin.d.clk56FF 48n

i2 clkdiB = 1F 48n$iin.d. J= $iin.d. ?o$ I1I;n:clk J= n:clk ?o$ I1I;clkdiB J= 0;

lclkdiB J= clkdiB 1;

nd i2;nd i2;

nd p$oc clockdiBid;

C8n. 48 clock 2$/nc o2 48 2il4$ clk 4o 5+ kHz 5 MHz 7 +)F 5+ kHz

2il4$clock p$occlk56F.in

i2 $iin.d.clk56FF 48ni2 2il4$cn4 = )F 48n

i2 clkdiB = 1 nd $iin.d. = I1IF 48nn:clk2il4$ J= n:clk2il4$ ?o$ I1I;

2il4$cn4 J= 0;nd i2;

l

&,


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2il4$cn4 J= 2il4$cn4 1;

nd i2;nd i2;

nd p$oc 2il4$clock;

min p$oc (%Mmin p$oc clk56G :0G E$$o$O/4G $4F

ConB$4 4o i.nd

B$il D'N4mp 4dlo.icBc4o$1+ do:n4o 0F;B$il D'N4mp+ 4dlo.icBc4o$1+ do:n4o 0F;

B$il on2iB4mp 4dlo.icBc4o$1+ do:n4o 0F;B$il D'Ni.nd4mp i.nd1+ do:n4o 0F;

B$il D'Ni.nd4mp) i.nd1+ do:n4o 0F;B$il D'Ni.nd4mp+ i.nd1+ do:n4o 0F;

B$il D'Ni.nd4mp i.nd1+ do:n4o 0F;B$il D'Ni.nd i.nd11 do:n4o 0F;B$il D'Ni.nd+ i.nd11 do:n4o 0F;B$il on2iBi.nd i.nd1+ do:n4o 0F;

ConB$4 4o /ni.ndB$il d4o/44mp i.nd1+ do:n4o 0F;B$il d4o/4/ni.nd4mp i.nd1+ do:n4o 0F;

B$il d4o/4/ni.nd4mp+ i.nd11 do:n4o 0F;B$il d4o/4/ni.nd /ni.nd11 do:n4o 0F;

con4n4 4o conB$4 48 ADC Bl/ 4o i.nd

con4n4 on2iB 4dlo.icBc4o$11 do:n4o 0F = >"00"; 15@

.ini2 $4 = I1IF 48n

li2 $iin.d.clk56FF 48ni2 clkdiB = 1 nd $iin.d. = I1IF 48n

c 44 i

:8n 'DLE =

C% J= I1I;

%,NC J= I1I;i2 cn4 = 16F 48ncn4 J= 0;

44 J= 3EADDATA;l

cn4 J= cn4 1;44 J= 'DLE;

nd i2;


%,NC J= I1I;cn4 J= cn4 1;

i2 cn4J)F 48n


li2 cn4 & nd cn4 J 16F 48ncn4 J= cn4 1;

48 2i$4 ) i4 $ 0000 onl $d 48 l4 1+

d415cn4F J= D'N;d4+15cn4F J= D'N+;

44 J= 3EADDATA;

&&


34/36

li2 cn4 = 16F 48n

cn4 J= 0;44 J= (-NC;

nd i2;

:8n (-NC =C% J= I1I;%,NC J= I1I;cn4 J= 0;

$moB 48 o224 o2 15@ nd conB$4 4o i.nd

D'N4mp = I0I d4;

D'N4mp+ = I0I d4+;on2iB4mp = I0I on2iB;

conB$4 4o i.ndD'Ni.nd4mp = i.ndD'N4mpF;D'Ni.nd4mp)= i.ndD'N4mp+F;

on2iBi.nd = i.ndon2iB4mpF;

D'Ni.nd4mp+= D'Ni.nd4mp on2iBi.nd;D'Ni.nd4mp= D'Ni.nd4mp) on2iBi.nd;

D'Ni.nd = D'Ni.nd4mp+11 do:n4o 0F;D'Ni.nd+ = D'Ni.nd4mp11 do:n4o 0F;

Noi'np/4 J= 4dlo.icBc4o$D'Ni.ndF;

%i.nl NoiDi$d J= 4dlo.icBc4o$D'Ni.nd+F;

44 J= 3'TEDATA;

:8n 3'TEDATA =

C% J= I1I;

%,NC J= I0I;

i2 cn4 = 0 o$ cn4 = 1F 48n

cn4 J= cn4 1;DO-T J= I0I;44 J= 3'TEDATA;

li2 cn4 = + o$ cn4 = &F 48n

cn4 J= cn4 1;DO-T J= I0I;44 J= 3'TEDATA;

li2 cn4 & nd cn4 J 16F 48n

cn4 J= cn4 1;

conB$4 ck 4o /ni.nd nd dd 48 o224 o2 15@ = 0?000?9((d4o/44mp = I0I i.ndE$$o$O/4F;

d4o/4/ni.nd4mp = d4o/44mp on2iBi.nd;d4o/4/ni.nd4mp+ = d4o/4/ni.nd4mp11 do:n4o 0F;

d4o/4/ni.nd = /ni.ndd4o/4/ni.nd4mp+F;

i2 :0 = I1IF 48nDO-T J= d4o/4/ni.nd15 cn4F;

lDO-T J= d4+15 cn4F;

nd i2;

&/


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44 J= 3'TEDATA;li2 cn4 = 16F 48n

cn4 J= 0;44 J= 'DLE;

nd i2;

nd c;

nd i2;nd i2;

nd p$oc min;

nd 8Bio$l;

&=


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$eferences

JCo"miac - Spartan &E Tutorial" - Configurable Space Micro">"tem" %nnovation" Application"Center!J Comic! eb! ,$ Feb! ,1$,! O#ttp755)))!co"miac!org5"partan&e

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