Solid-State Electronics 94 (2014) 51–55

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Solid-State Electronics

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Field-dependent charge trapping analysis of ONO inter-poly dielectricsfor NAND flash memory applications

http://dx.doi.org/10.1016/j.sse.2014.02.0070038-1101/� 2014 Elsevier Ltd. All rights reserved.

⇑ Corresponding author. Tel.: +82 2 2123 4619; fax: +82 2 313 2879.E-mail address: iyun@yonsei.ac.kr (I. Yun).

Pyung Moon a, Jun Yeong Lim a, Tae-Un Youn b, Sung-Kye Park b, Ilgu Yun a,⇑a School of Electrical and Electronic Engineering, Yonsei University, Seoul, Republic of Koreab Research & Development Division, SK Hynix Semiconductor Inc, Icheon, Republic of Korea

a r t i c l e i n f o a b s t r a c t

Article history:Received 13 September 2013Received in revised form 8 February 2014Accepted 11 February 2014

The review of this paper was arranged byProf. S. Cristoloveanu

Keywords:Oxide/nitride/oxide (ONO)Leakage currentField dependent charge trappingInter-poly dielectric (IPD)

The effect of the operation voltage on the leakage current of SiO2/Si3N4/SiO2 (ONO) stack is investigatedwhich is used for the inter-poly dielectric (IPD) of the floating gate (FG) type NAND flash memory. In thiswork, the field dependent charge trapping mechanism of ONO stack and the effect of the trapped chargeson the electrical characteristics are examined. The leakage current density–electric field (J–E) and thecapacitance–voltage (C–V) characteristics are measured for various test samples of ONO stack by varyingthe voltage sweep ranges. The charge trapping/detrapping mechanisms of ONO stack are observed asthe range of the applied sweep voltage is increased and then decreased to a given voltage, which iscorresponding to the given electric field. The numbers of trapped and detrapped charges are extractedfrom the difference of J–E curves using the same recursive voltage sweeps and the effects on the electricalcharacteristics of ONO stack are demonstrated. Moreover, the dominant trapping layer is alsoinvestigated by varying the thickness of ONO stack.

� 2014 Elsevier Ltd. All rights reserved.

1. Introduction

The inter-poly dielectric (IPD) is crucial for nonvolatile NANDflash memory applications with scaling down because IPD isrelated to the coupling ratio and the performance of flash memorysuch as the programming speed and the read current. A multi-stackdielectric, silicon oxide–silicon nitride–silicon oxide (ONO), hasbeen used for the scaled IPD, since ONO stack has high breakdownvoltage and low trap density compared with an equivalentthickness of oxide [1,2]. The quality of ONO stack is related tothe electrical characteristics and the reliability of flash memorysince the trapped charges in ONO stack are impacted on thecoupling ratio and the leakage current during the data retention[3]. For this reason, many researches have been investigated aboutcharge trapping as follows.

For the enhancement of the reliability of memory cell, thestudies of both the leakage current mechanism and trap stateswere necessary to investigate [4–6]. In addition, deep trap profilingin ONO stack was analyzed using thermally simulated exoelectronemission, and the trap state related to the low electric fieldconduction mechanism was investigated and confirmed by thetheoretical energy level of trap state [4,7]. The reduction method

of the trap density in bottom oxide was examined using additionalplasma oxidation and the trap location was also inspected usingphotocurrent characteristics [6].

However, the studies about the effect of a short and recursiveapplied bias on ONO stack have not been investigated. The studiesof the relationship between the charge trapping and the appliedelectric field are necessary since the operation voltage of the cellis able to cause the charge trapping repeatedly, resulting in thevariation of the electrical characteristics of ONO stack. Thus, in thispaper, the number of the charge trapping and effective trap centerwith varying the applied electric field are analyzed using the cur-rent–voltage (I–V) and capacitance–voltage (C–V) characteristics.

2. Experiments and measurements

The ONO test structure was fabricated on 12-inch wafers usingthe 2� NAND flash process by SK Hynix Semiconductor Inc. Thetest structures of IPD were constructed with ONO stack sand-wiched with two heavily doped poly-Si layers, which are floatinggate (FG) and control gate (CG), as shown schematically in Fig. 1[8]. The silicon oxide (bottom oxide, BO), silicon nitride and siliconoxide (top oxide, TO) of ONO stack were sequentially blanketdeposited using low pressure chemical vapor deposition (LPCVD)and the area of test structures was 2.78 � 10�4 cm2.

Fig. 2. The variation in leakage current density and capacitance characteristics(inset) between the 1st and 2nd sweeps of ONO stack due to charge trapping.

Fig. 1. Schematic of the test structure and measurement.

52 P. Moon et al. / Solid-State Electronics 94 (2014) 51–55

The oxide and nitride layer thickness of ONO stack were variedto demonstrate the effect of each layer thickness on the number oftrap charges. The test samples were divided into two groups: group1 was consisted of S1 and S2 varying with nitride layer thickness.The equivalent of oxide thickness (EOT) of S2 was 0.15 nm lessthan S1 (S1 is a reference sample). Group 2 was composed of S1,S3 and S4 varying with both TO and BO coincidentally. The EOTsof S3 and S4 were 0.45 nm less and 0.45 nm more than S1, respec-tively. Although the variation of the ONO layer thickness wassmall, the effect of thickness variation was significant since thescale of ONO stack was small enough to be impacted by the ONOlayer thickness variation.

To analyze the leakage current and charge trapping characteris-tics, the current–voltage (I–V) and capacitance–voltage (C–V) char-acteristics were measured using an Agilent 4156C parameteranalyzer and Agilent E4980A LCR meter at 10 kHz, respectively.The leakage current density–electric field (J–E) characteristics werethen calculated from the I–V curves, which were the applied biasdivided by the equivalent oxide thickness (EOT) of the ONO stack.

For the I–V measurement, a positive bias and ground were ap-plied to CG and FG, respectively, and the positive bias swept fromzero to a given sweep voltage (or electric field) depending on theEOT of ONO stack and the sweep voltage was increased to analyzethe effect of applied electric field on the charge trapping. Thecapacitance was measured after I–V sweep to verify the chargetrapping during I–V sweep. More detail measurement methodswhich were the sequential procedure for I–V and C–V measure-ments were as follows: (1) the initial C–V characteristic was mea-sured from �5 to 5 V; (2) I–V characteristics were measured twicefor the same range of the sweep voltage denoted by the 1st and2nd sweeps, respectively; (3) C–V characteristic was measuredagain; (4) steps (2) and (3) were repeated by increasing the rangeof the sweep voltage (VS) from 7 V to VS.m with 1 V interval, whichis equivalent to an electric field of about 10 MV/cm; and (5) steps

Table 1The measurement procedure for I–V and C–V characteristics.

Measurement scheme and symbol I–V measu

1st Sweep

Increasing sweep range E1 0 � 7 VE2 0 � 8 VEi 0 � VS

Em-2 0 � VS.m –Em-1 0 � VS.m –Em 0 � VS.m

Decreasing sweep range Em+1 0 � VS.m –Em+2 0 � VS.m –Em+3 0 � VS.m –

(2) and (3) were repeated by decreasing the VS from VS.m with thesame interval of steps (4). The detailed measurement procedurewas summarized in Table 1.

3. Results and discussion

Fig. 2 shows the repetitive J–E curves swept from 0 to VS. Here,DE is the difference in the electric fields between two sequential J–E sweep curves at arbitrary current density of 0.1 lA/cm2. Based onthe measurements, it can be said that the variation of DE wascaused by charge trapping/detrapping in trap sites of ONO stackwhen the electric field was applied. The number of trapped chargesis proportional to DE and the reduced capacitance compared to aninitial capacitance [6,9,10]. C–V curves as shown in the inset ofFig. 2 were measured before and after the 1st J–E sweep. Thecapacitance of ONO stack exhibits parabolic shape like as metal–insulator–metal (MIM) capacitor because two poly-Si were heavilydoped and the depletion of polysilicon was induced as the appliedvoltage was increased [11]. Thus, C–V curve can be fitted with aquadratic polynomial:

C ¼ aV2 þ bV þ c ð1Þ

where C is the normalized capacitance, V is the applied voltage, anda, b, and c are the coefficients of capacitance. Using the Eq. (1), thevariations of the voltage shift and the maximum capacitance of C–Vcurves were extracted.

The measured curves of J–E and C–V with varying the sweeprange for S1 were shown in Figs. 3 and 4, respectively. The tenden-cies of J–E and C–V curves for S2, S3, and S4 were similar to that ofS1, thus the measured data of S1 was shown as a representative.

rement C–V measurement

2nd Sweep

0 � 7 V �5 � 5 V0 � 8 V �5 � 5 V0 � VS �5 � 5 V

2 V 0 � VS.m – 2 V �5 � 5 V1 V 0 � VS.m – 1 V �5 � 5 V

0 � VS.m �5 � 5 V1 V 0 � VS.m – 1 V �5 � 5 V2 V 0 � VS.m – 2 V �5 � 5 V3 V 0 � VS.m – 3 V �5 � 5 V

Fig. 3. The leakage current as a function of the variation of the sweeping E-fieldrange for sample S1: the case of (a) increasing the range and (b) decreasing therange.

Fig. 4. The normalized maximum capacitance as a function of varying the voltagesweep range and the shifting of C–V curve for ONO stack with varying the sweeprange (inset) for sample S1.

Fig. 5. The charge trapping/detrapping of shallow trap states for ONO stack withvarying the sweep range of (a) Em and (b) Em+1 (where Em > Em+1).

P. Moon et al. / Solid-State Electronics 94 (2014) 51–55 53

Fig. 3(a) shows J–E curves with increasing the sweep range andFig. 4 illustrates the variations of the voltage shift and the maxi-mum capacitance of C–V curves with varying the sweep range.The maximum capacitance was normalized by initial maximumcapacitance to verify the charge trapping during I–V sweep. Thevariations of C–V curves shift as shown in inset of Fig. 4 were cal-culated using the difference of voltages at the maximum capaci-tance of C–V curves.

As shown in Fig. 3(a), when the voltage sweep range was in-creased the leakage current of ONO stack was increased and J–Ecurves were shift toward positive direction. In addition, the maxi-mum capacitance after the 1st J–E sweep for each voltage sweeprange was reduced and C–V curves were positive shifted continu-ously with the increase of the voltage sweep range as shown inFig. 4. It was due to the electrons were more easily trapped thanthe holes when the external voltage was applied on ONO stack[9,10]. Trap levels were deeper for injected electrons to escapethe trap sites comparing with injected holes because the trap statesin bulk of Si3N4 are located at 2.5, 2.76, 3.03, 3.36, and 3.76 eV be-low the conduction band of nitride [12–15]. It indicates that thecharge was trapped during the voltage sweep and the trappedcharges screened the applied positive bias resulting in the decreas-ing the effective applied voltage.

Moreover, the shift of J–E curves was remarkable after the 1st J–E sweep for each voltage sweep range compared with those of therepetition of the same voltage sweep range. In the inset of Fig. 3(a),

the same voltage sweep range was repeated three times. Here, asan example, it is found that DE between the 1st and 2nd sweepsfor E3 was 0.276 MV/cm2 and DE between the 2nd and 3rd sweepswas 0.071 MV/cm2 at a current density of 0.1 lA/cm2. It was due tothe trapped charges affected by the electric field of ONO stack andthe charge trapping was reduced as the same voltage sweep rangewas repeated.

Fig. 3(b) illustrates J–E curves as the voltage sweep range wasdecreased. When the sweep range was decreased, J–E curves wereshifted slightly to the opposite direction and the leakage current ofa moderate electric field was reduced. The capacitance of ONOstack was increased and C–V curves were negative shifted as thesweep range decreased as shown in Fig. 4. These results were re-lated to the charge detrapping [1,12,16]. In ONO stack, the varioustrap sites exist and their energy levels were different as shown inFig. 5. The trap states below the Fermi level of charge injection

Fig. 6. The number of cumulative trapped charges for group 1 which was varyingthe nitride thickness when the trap center was in nitride layer.

Fig. 8. The number of trapped and/or detrapped charges as a function of varying the swrange (inset).

Fig. 7. The number of cumulative trapped charges for group 2 which was varyingthe oxide thickness when the trap center were in top oxide (TO) or bottom oxide(BO).

54 P. Moon et al. / Solid-State Electronics 94 (2014) 51–55

layer were filled [16]. The trapped charges in ONO stack were emit-ted from the traps when the sweep range was decreased comparedwith the previous sweep range since the band bending of ONOstack was reduced and the trap sites occupied by the trap chargeswere raised above Fermi level of FG as shown in Fig. 5(b) [16,17]. Inother words, the trapped charges located at relatively shallow andnear FG were escaped from the traps easily than those of the deeptrap sites when the sweep range was decreased compared with theprevious sweep range. Thus, the charges trapping/detrapping wereimpacted on the reduction of the leakage current in a moderateelectric field region. The changes of J–E and C–V curves were de-creased in the region of the decreasing sweep range. However, theyare smaller than those in the region of the increasing sweep range.In Fig. 4, the difference of capacitance occurred although the ap-plied sweep range of Em+2 was equal to that of Em�2. It can be con-cluded that the detrapped charges of Em+2 were much smaller thanthose of the trapped charges of Em�2.

To verify the charge trapping and/or detrapping of ONO stackwith varying the sweep range, the following equation was used[10,18–20]:

DVþg ¼ �qNT

e0eox½ðdTO � XTOÞ þ

eox

enitðdnit � XnitÞ þ ðdBO � XBOÞ� ð2Þ

where q is the electron charge (C), NT is the number of trappedcharge (cm�2), e0 is vacuum permittivity, eox, enit are dielectric con-stant of oxide and nitride, dTO, dnit and dBO are the thicknesses ofeach layer (cm), XTO, Xnit and XBO are the trap centers which arethe distances of the trapped charges from the CG/TO interface,TO/nitride interface and nitride/BO interface (cm), respectively.The three assumptions were necessary to extract the trappedcharges density: (1) the dominant trapping layer was assumed;(2) the trap center was half of the dominant trapping layer thick-ness; and (3) the trapped charges in the other layers were ignored.

The trap center was assumed to be located in the bulk of the ni-tride layer and Xnit was the half of nitride thickness. Fig. 6 showsthe result of group 1 which is the amount of trapped charges forthe nitride thickness variation of ONO stack. As the nitride thick-ness was decreased, the number of cumulative trapped chargeswas reduced. The trapped charges were about 1012–1013 cm�2

and the number of trapped charges was consistent with the previ-

eep range for sample S1. The cumulative trapped charges with varying the sweep

P. Moon et al. / Solid-State Electronics 94 (2014) 51–55 55

ous results for silicon nitride [7,21]. This indicates that the domi-nant trap sites of ONO stack were in the bulk of the silicon nitrideand it is consistent with the previous researches [15,17].

The number of cumulative trapped charges for the oxide thick-ness variation is shown in Fig. 7. Since the top and bottom oxidethicknesses were varied simultaneously, the trap center used forEq. (2) was separated from the bulk of top oxide and bottom oxide.The number of trapped charges of the trap center in TO and BO waswere found to be 2 � 1013 cm�2 and 6 � 1012 cm�2 at around10 MV/cm, respectively. Unlike varying the nitride thickness, how-ever, there was no significant change in the trapped charges whenthe oxide thicknesses were varied for both assumptions of trapcenter. The dominant trapping sites, therefore, are in nitride layerand the variations of oxide thickness have less effect on the num-ber of trapped charges comparing with that of nitride thickness.Based on the results of Figs. 6 and 7, the number of trapped chargesfor applied electric field was extracted using trap center was in thenitride layer.

Fig. 8 shows the number of trapped charges for S1 with varyingthe applied electric field. As the sweep range was increased, thenumber of charges in the range of 1011–1012 cm�2 was continu-ously trapped. The trapped charges were then detrapped withdecreasing the sweep range and the number of detrapped chargeswas approximately 1010 cm�2. Since the number of detrappingcharges was smaller than that of trapping charges, there was nosignificant change of J–E curve in Fig. 3(b) except the leakage cur-rent at a moderate field region. The results of the trapped chargedensities for S2, S3, and S4 were similarly to that of S1. The tenden-cies of charges trapping/detrapping with varying the electric field,thus, were in agreement with the variations of the measured J–Eand C–V curves.

4. Conclusion

The charge trapping and its effect on the electrical characteris-tics were examined with applying the external electric field toinvestigate the effect of the operation voltage of the cell on ONOstack. When the voltage sweep range was increased comparedwith the previous sweep range, the charges were continuouslytrapped and J–E and C–V curves were shift toward positive direc-tion and reduced, respectively. The number of trapped charges

was varied as a function of nitride thickness because the trap siteswere in nitride layer. When the voltage sweep range was de-creased, the trapped charges of shallow trap states were detrapped.However, the number of detrapping charges was much smallerthan that of the trapped charges. From the electrical characteristicsof ONO stack, the number of trapped charges can be extracted andthe total number of trapped charges can be impacted on the effec-tive electric field on ONO stack. In addition, the charge trapping/detrapping of shallow trap states affected the leakage current den-sity of ONO stack at a moderate electric field region.

Acknowledgment

This work was supported as a research project of SK Hynix.

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