FET MEMORY CELL STRUCTURE AND PROCESS

NAME - RITESH JAISWAL

SCHOLAR NO.-141114024

ABSTRACTA dense, vertical MOS FET memory cell has a high charge storage capacitance per unit area of substrate surface. The charge storage capacitor structure is formed within a well etched in the silicon semiconductor substrate by a combination of reactive ion etching and a self-limiting wet etch.

Publication number US4397075 A

Publication type Grant

Application number US 06/165,592

Publication date Aug 9, 1983

Filing date Jul 3, 1980

Priority date Jul 3, 1980

Inventors Joseph J. Fatula, Jr., Paul L. Garbarino

Original Assignee International Business Machines Corporation

Export Citation BiBTeX, EndNote, RefMan

IMAGES:

DESCRIPTION

BACKGROUND OF THE INVENTIONThe present invention relates generally to FET Memory Cells and more particularly to a compact memory cell device and the process for forming the device which includes a capacitor structure within a silicon semiconductor body for charge storage.A single device memory cell with an FET and a capacitor is described by Dennard in U.S. Pat. No. 3,387,286. The capacitor plates are parallel to the surface of the substrate and occupy a relatively large area of the substrate surface. In an effort to reduce the size of the cell, capacitor structures have been formed within the semiconductor substrate, for example, as described in the article "Capacitor For Single FET Memory Cell", IBM Technical Disclosure Bulletin, Vol. 19, No. 9, Pages 2579-2580, February 1975 where the capacitor is formed in a V-shaped trench filled with polysilicon and co-pending application by Abbas entitled "High Density Single Device Memory Cell", Ser. No. 48,410, filed June 14, 1979, now abandoned, in which the capacitor is formed in a U-shaped trench which is reactively ion etched into the silicon surface. Capacitor structures and charge storage regions formed in trenches in a semiconductor body are also described in U.S. Pat. Nos. 3,962,713 and 4,141,765.

SUMMARYWe have now discovered an improved memory cell structure and the process for its manufacture.In accordance with this invention, there is provided a method for producing a dense, vertical MOS FET device comprising the steps of

providing a monocrystalline silicon substrate having a gate including a gate dielectric layer on said substrate, a gate electrode layer on said dielectric layer and source and drain regions in said substrate on opposite sides of said gate;

reactive ion etching a substantially U-shaped opening into said substrate in said drain region adjacent to said gate;

growing a silicon dioxide layer on the surface of said U-shaped opening;

reactive ion etching said U-shaped opening deeper into said substrate to form a deeper U-shaped opening;

etching said deeper opening with a directional etchant to form a well having an enlarged buried opening;

removing said silicon dioxide from said well;

diffusing an impurity into the surfaces of said well and forming electrical contacts to said source and drain regions and to said gate electrode layer.

\CLAIMS1. The method of claim 1 wherein the directional etchant is ethylene diamine pyrocatechol.2. The method of claim 1 wherein the reactive ion etching of said U-shaped opening is in a fluorine or chlorine containing atmosphere.3. The method of claim 1 wherein said substrate is P type silicon and said impurity is N type.4. The method of claim 4 wherein said impurity is phosphorus.5. The method of claim 4 wherein said impurity is arsenic.6. The method of claim 1 wherein said enlarged buried opening has faces lying along the (111) crystal planes of said substrate.7. The method of claim 8 wherein said reactive ion etching of said U-shaped opening is in a fluorine or chlorine containing atmosphere and the said directional etchant is ethylene diamine pyrocatechol.8. The method of claim 8 wherein said first conductivity type is P type, said second conductivity type is N type, and said substrate is composed of silicon.9. The method of claim 8 wherein said diffusing is done from a phosphosilicate glass layer that has been formed upon the surface of said well.