FCP11N60FCPF11N60-SuperFET

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    SuperFET

    2004 Fairchild Semiconductor Corporation Rev. B, March 2004

    F C P 1 1 N 6 0 / F C P F 1 1 N 6 0

    TM

    FCP11N60/FCPF11N60General DescriptionSuperFET TM is a new generation of high voltage MOSFETsfrom Fairchild with outstanding low on-resistance and lowgate charge performance, a result of proprietary technologyutilizing advanced charge balance mechanisms.This advanced technology has been tailored to minimizeconduction loss, provide superior switching performance,and withstand extreme dv/dt rate and higher avalancheenergy. Consequently, SuperFET is very suitable for various AC/DC power conversion in switching modeoperation for system miniaturization and higher efficiency.

    Features 650V @T j = 150 C Typ. Rds(on)=0.32 Ultra low gate charge (typ. Qg=40nC) Low effective output capacitance (typ. Coss.eff=95pF) 100% avalanche tested

    Absolute Maximum Ratings TC = 25C unless otherwise noted

    * Drain current limited by maximum junction termperature

    Thermal Characteristics

    Symbol Parameter FCP11N60 FCPF11N60 UnitsID Drain Current - Continuous (T C = 25C) 11 11* A

    - Continuous (T C = 100C) 7 7* A

    IDM Drain Current - Pulsed (Note 1) 33 33* AVGSS Gate-Source Voltage 30 VE AS Single Pulsed Avalanche Energy (Note 2) 340 mJI AR Avalanche Current (Note 1) 11 AE AR Repetitive Avalanche Energy (Note 1) 12.5 mJdv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/nsP D Power Dissipation (T C = 25C) 125 36 W

    - Derate above 25C 1.0 0.29 W/CTJ , T STG Operating and Storage Temperature Range -55 to +150 C

    TLMaximum lead temperature for soldering purposes,1/8 " from case for 5 seconds

    300 C

    Symbol Parameter FCP11N60 FCPF11N60 UnitsR JC Thermal Resistance, Junction-to-Case 1.0 3.5 C /WR CS Thermal Resistance, Case-to-Sink 0.5 -- C /WR JA Thermal Resistance, Junction-to-Ambient 62.5 62.5 C /W

    TO-220FCP SeriesG SD

    TO-220FFCPF Series

    G SD

    !!! !

    !!! !

    !!! !

    !!! !

    !!! !

    !!! !

    S

    D

    G

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    Rev. B, March 2004

    F C P 1 1 N 6 0 / F C P F 1 1 N 6 0

    2004 Fairchild Semiconductor Corporation

    Electrical Characteristics TC = 25C unless otherwise noted

    Notes:1. Repetitive Rating : Pulse width limited by maximum junction temperature2. I AS = 5.5A, V DD = 50V, R G = 25 , Starting T J = 25C3. ISD 11A, di/dt 200A/ s, V DD BVDSS, Starting T J = 25C4. Pulse Test : Pulse width 300 s, Duty cycle 2%5. Essentially independent of operating temperature

    Symbol Parameter Test Conditions Min Typ Max Units

    Off Characteristics

    BVDSS Drain-Source Breakdown VoltageVGS = 0 V, I D = 250 A, T J = 25C 600 -- -- VV

    GS= 0 V, I

    D= 250 A, T

    J= 150C -- 650 -- V

    BVDSS/ TJ

    Breakdown Voltage Temperature Coef-ficient

    ID = 250 A, Referenced to 25C -- 0.6 -- V/C

    BVDSDrain-Source Avalanche BreakdownVoltage

    VGS = 0 V, I D = 11 A -- 700 -- V

    IDSSZero Gate Voltage Drain Current

    VDS = 600 V, V GS = 0 V -- -- 1 AVDS = 480 V, T C = 125C -- -- 10 A

    IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, V DS = 0 V -- -- 100 nAIGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, V DS = 0 V -- -- -100 nA

    On CharacteristicsVGS(th) Gate Threshold Voltage VDS = VGS , ID = 250 A 3.0 -- 5.0 VRDS(on) Static Drain-Source

    On-ResistanceVGS = 10 V, I D = 5.5 A -- 0.32 0.38

    gFS Forward Transconductance VDS = 40 V, I D = 5.5 A (Note 4) -- 9.7 -- S

    Dynamic CharacteristicsC iss Input Capacitance VDS = 25 V, V GS = 0 V,

    f = 1.0 MHz

    -- 1148 1490 pFCoss Output Capacitance -- 671 870 pFC rss Reverse Transfer Capacitance -- 63 82 pF

    Coss Output CapacitanceVDS = 480 V, V GS = 0 V,f = 1.0 MHz

    -- 35 -- pF

    Coss eff. Effective Output Capacitance VDS = 0V to 480 V, V GS = 0 V -- 95 -- pF

    Switching Characteristicstd(on) Turn-On Delay Time VDD = 300 V, I D = 11 A,

    RG = 25

    (Note 4, 5)

    -- 34 80 ns

    tr Turn-On Rise Time -- 98 205 nstd(off) Turn-Off Delay Time -- 119 250 nstf Turn-Off Fall Time -- 56 120 nsQ g Total Gate Charge VDS = 480 V, I D = 11 A,

    VGS = 10 V (Note 4, 5)

    -- 40 52 nCQ gs Gate-Source Charge -- 7.2 -- nCQ gd Gate-Drain Charge -- 21 -- nC

    Drain-Source Diode Characteristics and Maximum RatingsIS Maximum Continuous Drain-Source Diode Forward Current -- -- 11 AISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 33 AVSD Drain-Source Diode Forward Voltage VGS = 0 V, I S = 11 A -- -- 1.4 Vtrr Reverse Recovery Time VGS = 0 V, I S = 11 A,

    dIF

    / dt = 100 A/ s (Note 4)-- 390 -- ns

    Qrr

    Reverse Recovery Charge -- 5.7 -- C

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    2004 Fairchild Semiconductor Corporation Rev. B, March 2004

    F C P 1 1 N 6 0 / F C P F 1 1 N 6 0

    Typical Characteristics

    Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

    Figure 2. Transfer CharacteristicsFigure 1. On-Region Characteristics

    10-1 100 101

    10-1

    100

    101

    102V

    GS

    Top : 15.0 V10.0 V

    8.0 V7.0 V6.5 V6.0 V

    Bottom : 5.5 V

    * Notes :1. 250 s Pulse Test2. TC = 25

    oC

    I D , D

    r a i n C u r r e n

    t [ A ]

    VDS, Drain-Source Voltage [V]2 4 6 8 10

    10-1

    100

    101

    * Note1. VDS = 40V2. 250 s Pulse Test

    -55oC

    150oC

    25oC

    I D , D

    r a i n C u r r e n

    t [ A ]

    VGS

    , Gate-Source Voltage [V]

    0 5 10 15 20 25 30 35 400.0

    0.2

    0.4

    0.6

    0.8

    1.0

    VGS = 20V

    VGS

    = 10V

    * Note : TJ

    = 25oC

    R

    D S ( O N )

    [ ] ,

    D r a

    i n - S o u r c e

    O n - R e s

    i s t a n c e

    ID, Drain Current [A]

    10 -1 100 10 10

    1000

    2000

    3000

    4000

    5000

    6000C

    iss= C

    gs+ C

    gd(C

    ds= shorted)

    Coss

    = Cds

    + Cgd

    Crss = Cgd

    * Notes :1. V

    GS= 0 V

    2. f = 1 MHz

    Crss

    Coss

    Ciss

    C a p a c

    i t a n c e

    [ p F ]

    VDS

    , Drain-Source Voltage [V]

    0 5 10 15 20 25 30 35 40 450

    2

    4

    6

    8

    10

    12

    VDS

    = 250V

    VDS

    = 100V

    VDS

    = 400V

    * Note : ID

    = 11A

    V G S , G

    a t e -

    S o u r c e

    V o l

    t a g e

    [ V ]

    QG, Total Gate Charge [nC]

    0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.610-1

    100

    101

    25 oC150oC

    * Notes :1. VGS = 0V2. 250 s Pulse Test

    I D R ,

    R e v e r s e

    D r a

    i n C u r r e n t

    [ A ]

    VSD

    , Source-Drain Voltage [V]

    Figure 3. On-Resistance Variation vs.Drain Current and Gate Voltage

    Figure 4. Body Diode Forward VoltageVariation vs. Source Current

    and Temperature

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    2004 Fairchild Semiconductor Corporation Rev. B, March 2004

    F C P 1 1 N 6 0 / F C P F 1 1 N 6 0

    Typical Characteristics (Continued)

    -100 -50 0 50 100 150 2000.8

    0.9

    1.0

    1.1

    1.2

    * Notes :1. V

    GS= 0 V

    2. ID

    = 250 A

    B V

    D S S , (

    N o r m a l

    i z e d

    )

    D r a

    i n - S o u r c e

    B r e a k

    d o w n

    V o l

    t a g e

    TJ, Junction Temperature [ oC]

    -100 -50 0 50 100 150 2000.0

    0.5

    1.0

    1.5

    2.0

    2.5

    3.0

    * Notes :1. V

    GS= 10 V

    2. ID

    = 5.5 A

    R D S ( O N ) , (

    N o r m a l

    i z e d

    )

    D r a

    i n - S o u r c e

    O n -

    R e s

    i s t a n c e

    TJ, Junction Temperature [ oC]

    25 50 75 100 125 1500.0

    2.5

    5.0

    7.5

    10.0

    12.5

    I D , D r

    a i n

    C u r r e n t

    [ A ]

    TC, Case Temperature [ oC]

    Figure 7. Breakdown Voltage Variationvs. Temperature

    Figure 8. On-Resistance Variationvs. Temperature

    Figure 10. Maximum Drain Currentvs. Case Temperature

    100 101 102 10310-2

    10-1

    100

    101

    102

    100 us

    DC

    100 ms

    10 ms

    1 ms

    Operation in This Areais Limited by R

    DS(on)

    * Notes :1. T

    C= 25 oC

    2. TJ

    = 150 oC3. Single Pulse

    I D , D

    r a i n C u r r e n t

    [ A ]

    VDS

    , Drain-Source Voltage [V]

    100 101 102 10310-2

    10-1

    100

    101

    102 Operation in This Areais Limited by R DS(on)

    DC

    10 ms

    1 ms

    100 us

    * Notes :1. T

    C= 25 oC

    2. T J = 150oC

    3. Single Pulse

    I D , D

    r a i n C u r r e n t

    [ A ]

    VDS

    , Drain-Source Voltage [V]

    Figure 9-2. Maximum Safe Operating Areafor FCPF11N60

    Figure 9-1. Maximum Safe Operating Areafor FCP11N60

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    Rev. B, March 2004

    F C P 1 1 N 6 0 / F C P F 1 1 N 6 0

    2004 Fairchild Semiconductor Corporation

    Typical Characteristics (Continued)

    10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1

    10 -2

    10 -1

    10 0

    * N o t e s :1. Z

    JC( t ) = 1 .0 o C / W M a x .

    2 . Du ty Facto r, D=t1/t

    2

    3. TJM

    - TC

    = PDM

    * Z JC

    (t)

    s ing le pu lse

    D = 0 . 5

    0 .02

    0. 2

    0 .05

    0. 1

    0 .01

    Z

    J C

    ( t ) , T h e r m a

    l R e s p o

    n s e

    t1, S q u a r e W a v e P u l s e D u r a t i o n [ s e c ]

    t1

    P DM

    t2

    10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1

    10 -2

    10 -1

    10 0

    * N o t e s :1. Z

    JC ( t ) = 3 .5oC / W M a x .

    2 . Du ty Facto r, D=t1/t

    2

    3. T JM - T C = P DM * Z JC (t)

    s ing le pu lse

    D=0.5

    0 .02

    0. 2

    0 .05

    0. 1

    0 .01

    Z J C

    ( t ) , T h e r m a

    l R e s p o n s e

    t 1 , S q u a r e W a v e P u l s e D u r a t io n [ s e c ]

    Figure 11-1. Transient Thermal Response Curve for FCP11N60

    Figure 11-2. Transient Thermal Response Curve for FCPF11N60

    t1

    P DM

    t2

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    2004 Fairchild Semiconductor Corporation Rev. B, March 2004

    F C P 1 1 N 6 0 / F C P F 1 1 N 6 0

    Charge

    VGS

    10VQ g

    Qgs Q gd

    3mA

    VGS

    DUT

    VDS

    300nF

    50K

    200nF12V

    Same Typeas DUT

    Charge

    VGS

    10VQ g

    Qgs Q gd

    3mA

    VGS

    DUT

    VDS

    300nF

    50K

    200nF12V

    Same Typeas DUT

    VGS

    VDS

    10%

    90%

    td(on) tr

    t on t off

    td(off) tf

    VDD

    10V

    VDSRL

    DUT

    RGVGS

    VGS

    VDS

    10%

    90%

    td(on) tr

    t on t off

    td(off) tf

    VDD

    10V

    VDSRL

    DUT

    RGVGS

    E AS = L I AS 2----21 --------------------

    BVDSS - VDD

    BVDSS

    VDD

    VDS

    BVDSS

    t p

    VDD

    I AS

    VDS (t)

    ID (t)

    Time

    10V DUT

    RG

    L

    I D

    t p

    E AS = L I AS 2----21E AS = L I AS 2----21----21 --------------------

    BVDSS - VDD

    BVDSS

    VDD

    VDS

    BVDSS

    t p

    VDD

    I AS

    VDS (t)

    ID (t)

    Time

    10V DUT

    RG

    LL

    I DI D

    t p

    Gate Charge Test Circuit & Waveform

    Resistive Switching Test Circuit & Waveforms

    Unclamped Inductive Switching Test Circuit & Waveforms

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    2004 Fairchild Semiconductor Corporation Rev. B, March 2004

    F C P 1 1 N 6 0 / F C P F 1 1 N 6 0

    Peak Diode Recovery dv/d t Test Circuit & Waveforms

    DUT

    VDS

    +

    _

    Driver RG

    Same Typeas DUT

    VGS dv/dt controlled by R G ISD controlled by pulse period

    VDD

    LI SD

    10VVGS

    ( Driver )

    I SD( DUT )

    VDS( DUT )

    VDD

    Body DiodeForward Voltage Drop

    VSD

    IFM , Body Diode Forward Current

    Body Diode Reverse Current

    IRM

    Body Diode Recovery dv/dt

    di/dt

    D =Gate Pulse WidthGate Pulse Period

    --------------------------

    DUT

    VDS

    +

    _

    Driver RG

    Same Typeas DUT

    VGS dv/dt controlled by R G ISD controlled by pulse period

    VDD

    LLI SD

    10VVGS

    ( Driver )

    I SD( DUT )

    VDS( DUT )

    VDD

    Body DiodeForward Voltage Drop

    VSD

    IFM , Body Diode Forward Current

    Body Diode Reverse Current

    IRM

    Body Diode Recovery dv/dt

    di/dt

    D =Gate Pulse WidthGate Pulse Period

    --------------------------D =Gate Pulse WidthGate Pulse Period

    --------------------------

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    Rev. B, March 20042004 Fairchild Semiconductor Corporation

    F C P 1 1 N 6 0 / F C P F 1 1 N 6 0

    Package Dimensions

    4.50 0.209.90 0.20

    1.52 0.10

    0.80 0.102.40 0.20

    10.00 0.20

    1.27 0.10

    3.60 0.10

    (8.70)

    2 . 8

    0 0

    . 1 0

    1 5

    . 9 0 0

    . 2 0

    1 0

    . 0 8

    0

    . 3 0

    1 8

    . 9 5 M A X

    .

    ( 1 . 7

    0 )

    ( 3 . 7

    0 )

    ( 3 . 0

    0 )

    ( 1 . 4

    6 )

    ( 1 . 0

    0 )

    ( 4 5

    )

    9 . 2

    0 0

    . 2 0

    1 3

    . 0 8 0

    . 2 0

    1 . 3

    0 0

    . 1 0

    1.30 +0.10 0.05

    0.50 +0.10 0.052.54TYP

    [2.54 0.20 ]2.54TYP

    [2.54 0.20 ]

    TO-220

    Dimensions in Millimeters

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    Rev. B, March 2004

    F C P 1 1 N 6 0 / F C P F 1 1 N 6 0

    2004 Fairchild Semiconductor Corporation

    Package Dimensions

    (7.00) (0.70)

    MAX1.47

    ( 3 0 )

    #1

    3 . 3

    0

    0 . 1

    0

    1 5

    . 8 0

    0

    . 2 0

    1 5

    . 8 7

    0

    . 2 0

    6 . 6

    8

    0 . 2

    0

    9 . 7

    5

    0 . 3

    0

    4 . 7

    0

    0 . 2

    0

    10.16 0.20

    (1.00x45 )

    2.54 0.20

    0.80 0.10

    9.40 0.20

    2.76 0.200.35 0.10

    3.18 0.10

    2.54TYP[2.54 0.20 ]

    2.54TYP[2.54 0.20 ]

    0.50 +0.10 0.05

    TO-220F

    Dimensions in Millimeters

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    DISCLAIMER

    FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANYPRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITYARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES ITCONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

    TRADEMARKS

    The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and isnot intended to be an exhaustive list of all such trademarks.

    LIFE SUPPORT POLICY

    FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.As used herein:1. Life support devices or systems are devices orsystems which, (a) are intended for surgical implant intothe body, or (b) support or sustain life, or (c) whosefailure to perform when properly used in accordancewith instructions for use provided in the labeling, can bereasonably expected to result in significant injury to theuser.

    2. A critical component is any component of a lifesupport device or system whose failure to perform canbe reasonably expected to cause the failure of the lifesupport device or system, or to affect its safety oreffectiveness.

    PRODUCT STATUS DEFINITIONS

    Definition of Terms

    Datasheet Identification Product Status Definition

    Advance Information

    Preliminary

    No Identification Needed

    Obsolete

    This datasheet contains the design specifications forproduct development. Specifications may change inany manner without notice.

    This datasheet contains preliminary data, andsupplementary data will be published at a later date.Fairchild Semiconductor reserves the right to makechanges at any time without notice in order to improvedesign.

    This datasheet contains final specifications. FairchildSemiconductor reserves the right to make changes atany time without notice in order to improve design.

    This datasheet contains specifications on a productthat has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.

    Formative orIn Design

    First Production

    Full Production

    Not In Production

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