Preface - Real Chip Design and Verification Using Verilog and VHDL
Fast Arbitrary Waveform Generator using FPGA · MATLAB. The programming language chosen to model...
Transcript of Fast Arbitrary Waveform Generator using FPGA · MATLAB. The programming language chosen to model...
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FastArbitraryWaveformGenerator
usingFPGA
KyleRomero
IEEE#80306278
April2009
E.E.4334-001
Project25
Instructor:Dr.Zieher
Adviser:JohnWalter
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Abstract
ThetopicofthispaperisaFastArbitraryWaveformGenerator(AWG).Thegeneraldesignand
differentoperationalcapabilitiesofthisArbitraryWaveformGeneratoraredescribed.Someofthe
projectcomponentsthatarediscussedinclude:FPGAprogramming,MATLABprogramming,Capture
schematicgeneration,Layoutschematicgeneration,andprototypeboardcreation.Specifically,the
DigilentBASYSFPGAboardwasusedtogeneratean8bitdigitalsignal,andaDACDaughterboardwas
designedusingaTIDAC908toconvertthesignaltoanalog,withanOPA690providingsignal
amplificationwithagainof2.TheFPGAboardhasanonboardclockat100MHz,andtheDACcan
sampleatupto165MS/s.
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TableofContents
Abstract........................................................................................................................................................ii
ListofFigures..............................................................................................................................................iv
1. Introduction..........................................................................................................................................1
2. Components.........................................................................................................................................1
i. TheSoftware....................................................................................................................................2
a) VHDLProgram[5].........................................................................................................................2
b) MATLABProgram[5]..................................................................................................................11
3. TheHardware.....................................................................................................................................13
i. BASYSBoard[5]..............................................................................................................................14
ii. DACDaughterboard.......................................................................................................................16
a) TheDAC[5].................................................................................................................................16
b) Op-Amp[5].................................................................................................................................17
c) DC-DCConverter[5]...................................................................................................................17
d) RecommendedSetup[5]............................................................................................................18
iii. PrototypeBoard[5]........................................................................................................................19
iv. ProductionBoard...........................................................................................................................23
4. BoardPerformance............................................................................................................................25
5. HighSpeedBoardDesign...................................................................................................................26
6. Conclusion..........................................................................................................................................28
WorksCited................................................................................................................................................29
AppendixA:Budget...................................................................................................................................30
AppendixB:GanttChart.............................................................................................................................30
AppendixB:GanttChart.............................................................................................................................31
AppendixC:BASYSBoardPinOut..............................................................................................................32
AppendixD:SignalAnalysis........................................................................................................................33
AppendixE:WRITTENLABREPORTEVALUATIONFORM...........................................................................34
[5]=SectionReferencedfromKyleRomero,Fall2008FinalReport
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ListofFigures
Figure1:SystemBlockChart........................................................................................................................2Figure2:XilinxProjectSetup[5]..................................................................................................................3Figure3:PortDefinitions.............................................................................................................................4Figure4:BehavioralArchitecture[5]...........................................................................................................5Figure5:ClockBufferandDigitalClockManager........................................................................................6Figure6:OriginalClockSource.....................................................................................................................7Figure7:SynthesizedClockSource..............................................................................................................8Figure8:Process..........................................................................................................................................9Figure9:UserConstraintsFile[5]..............................................................................................................10Figure10:MATLABProgram[5].................................................................................................................11Figure11:Sinewaveformfile[5]...............................................................................................................12Figure12:SineWaveformplot[5].............................................................................................................13Figure13:DigilentExport[5].....................................................................................................................14Figure14:PinDelayandJitter[5]..............................................................................................................15Figure15:DAC908Pinout[1][5]................................................................................................................17Figure16:RecommendedSetup[5][1]......................................................................................................18Figure17:ComponentAnalysis[5]............................................................................................................19Figure18:Schematic[5].............................................................................................................................20Figure19:Layout(PrototypeBoard)[5].....................................................................................................20Figure20:PrototypeBoard[5]...................................................................................................................21Figure21:[email protected](50ΩLoad)........................................................................................22Figure22:ProductionboardSchematic.....................................................................................................23Figure23:ProductionBoardLayout...........................................................................................................24Figure24:ProductionBoard......................................................................................................................24Figure25:Productionboardoutput...........................................................................................................25Figure26:BoardPerformanceComparison...............................................................................................26Figure27:Accomplishments......................................................................................................................28
[5]=SectionReferencedfromKyleRomero,Fall2008FinalReport
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1. Introduction
Anarbitrarywaveformgeneratorisadevicethatallowsthecreationofanyanalogsignalthatis
desiredbytheuser.PossibleusesforanAWGincludetestingofdevicesthatmeasureasignal,suchas
heartrate,orfunctiongenerationfortestingofcircuits.
Themaingoalsforthisprojectwereasfollows:
1. 8bitresolutionDAC,atleast200MS/s.
a. Eventually,thisoutputrateneedstoapproach2GS/s.
2. ParallelDACinterface.
3. Initially,calculatewaveformonPCandloadtoFPGA.
a. Lateron,calculatewaveforminternally.
Inthefollowingsections,thedifferentcomponentsoftheAWGaswellastheoperationofeach
componentwillbedescribed.
2. Components
Severaldiscretecomponentsmakeupthearbitrarywaveformgenerator,includingboth
softwareandhardware.Theseinclude:
• MATLABprogramforcreatingWaveformFile
• VHDLprogrammingfortheXilinxSpartan3E
• DigilentBASYSFPGAevaluationboard
• DACdaughterboard(PrototypeandProduction)
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• Figure1:SystemBlockChart
i. TheSoftware
ProgrammingoftheFPGAencompassedalargepartoftheproject.TheFPGAwasprogrammed
usingtheXilinxISEprogrammingenvironmentincombinationwithawaveformtextfilegeneratedusing
MATLAB.TheprogramminglanguagechosentomodelthehardwarewasVHDL.Verilogwasalso
considered,butduetogreaterflexibility,VHDLwaschosen.Thefirstpartofthesoftwarethatshouldbe
examinedistheVHDLprogram.
a) VHDLProgram[5]
Aspreviouslystated,theXilinxSpartan3EFPGA,whichresidesontheDigilentBASYSevaluation
board(whichwillbeexaminedinmoredetailinlatersectionsofthispaper),wasprogrammedusingthe
XilinxISEprogrammingenvironment.Thisenvironmentisspecificallydesignedtoeasetheprogramming
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complexityofXilinxFPGAs.ThemainthingtoensurewhensettingupaXilinxFPGAprojectisthatthe
programsettingsarecorrect.Thesettingsforthisspecificprojectareillustratedinthefollowingpicture.
Figure2:XilinxProjectSetup[5]
Ascanbeseen,VHDLischosenastheselectedlanguage,theSpartan3EistheselectedFPGA
target,andthebuiltinSynthesisandSimulationtoolsareselected.
TheVHDLprogramisdesignedtodoseveraldifferentthings.First,atcompiletime(.bitfile
creation),itreadsinauserdefinedwaveformtextfileandstores it internally in a block RAM configured
as a ROM.AfterthefileiscompiledandloadedontotheFPGA,theprogramwilloutputthecontentsof
theROM(thewaveform)ontothedatabuspins.Inordertovisuallyensurethattheprogramisworking,
adelayhasbeenlinkedtoButton1oftheBASYSboard,andtheLEDsmirrorwhatisbeingoutputted
ontothedatabuspins.Soessentially,ifyouwanttoseeiftheprogramisworkingcorrectly,simplyhit
button1,andtheLEDswilloutputthewaveformataratevisibletothehumaneye.Also,anadditional
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featureoftheVHDListheabilitytosynthesizeanewclocksignal.Thisallowsthedatatobeoutputted
totheDACdaughterboardataratefasterthanallowableusingtheinternalclocksource.
TheactualVHDLprogramconsistsofseveralparts,whichwillnowbediscussed.
Part1:PortDefinitions[5]
Figure3:PortDefinitions
Asyoucanseeintheaboveillustration,5portsaredefinedinthisprogram:
1. CLK–Theinputclock.
2. CLCKPIN–Theoutputclockpin.
3. DAT–TheDataBus
4. LED–LEDoutputpins
5. BTN–Button1ontheBASYSBoard
AportoftypeSTD_LOGIC_VECTORisavectorcontainingaBinaryNumberString,suchas
“01010101”.TheBinarynumberstringisimportantbecausethisishowthewaveformtobegenerated
isstored.Todefinethebitresolutionofthevector,youtellitwhatthehighestandlowestbitnumberis.
Becausethisprojectisdesignedtobe8bitresolution,thelogicvectorsaredefinedasfollows:
STD_LOGIC_VECTOR(7downto0);
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AportoftypeSTD_LOGICsimplycontainsa“0”or“1”.Inthecaseofthisprogram,itisusedto
connecttotheclocksignal.Also,aportoftypeBooleanwillproducea“true”ifaninputsignalis
detectedandisusedtocreatethedelaybuttonfunctionality.
Part2:BehavioralArchitecture[5]
Figure4:BehavioralArchitecture[5]
ThebehavioralarchitecturesectionoftheVHDLprogramcontrolstypedefinitions.Forinstance,the
typeROMARRAYisdefinedtobeanarraywithenoughspaceallocatedtoholdthedatapointsofthe
waveformthatarestoredasbit_vectors.
Thebehavioralsectionofthisprogramalsocontainsthecompiletimefunctionthatreadsinthe
waveformtextfileandloadsitintomemory.Thefunction,READFUNC,takesinastringFINwhich
definesthenameofthetextfilethatcontainsthewaveform.Itthenreadsthefilelinebylineandthenit
storesthereaddataintheROMmemorythathasbeencreated.
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Part3:DigitalClockManagerandGlobalClockBuffer
Figure5:ClockBufferandDigitalClockManager
Thedigitalclockmanagerandglobalclockbufferarelibrarycomponentsusedtosynthesizea
newclockfrequency.Theoriginalclocksignalispassedintotheglobalclockbuffer,whichprovidesalow
skewsignalclockoutput.ThisclockbufferoutputsignalisthenpassedintotheDCM,whereitisusedto
synthesizeanewclocksignal.VarioussettingsintheDCMallowstheusertospecifywhatclockoutput
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istobecreated.TheuserisabletothenusethesynthesizedclocksignalbyusingCLKFX.Thereareother
signalsthatcanalsobeused,suchasphaseshifts,buttheywereunnecessaryforthescopeofthis
project.Currently,thesystemissetto250MHz,whichis2.5xtheoriginalclocksource.
Theoutputoftheclocksynthesizerwascomparedtotheoutputoftheoriginalclocksource.The
resultsarepicturedbelow:
Figure6:OriginalClockSource
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Figure7:SynthesizedClockSource
Ascanbeseen,thesynthesizedclockismuchmoreregularandstablethanthecrystalclock
source.Oncetheclocksynthesizerwasused,anoticeableimprovementinsignalperformancewas
noted.ThenoisyclockontheFPGAismorethanlikelythesourceofsomenoiseinthesystem.However,
thisisfromthecrystalitselfandcannotbecorrectedwithoutchangingFPGAboards.
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Part4:Process[5]
Figure8:Process
TheProcesssectionoftheprogramisrunwhenthesoftwareisloadedontotheFPGA.First,
severalvariablesareinitialized,IxandDELAY.Ixisanindexnumberusedtotrackthepositioninthe
ROMthatiscurrentlybeingoutput.Itissetinarangefrom0tothesizeoftheROM.DELAYisthe
numberthatdefinesthespeedatwhichtheprogramrunswhenthedelaybuttonispushed.Inthiscase,
itdividestheclockspeedby8million,slowingtheprogramdowntohuman-visiblespeeds.
Afterthevariablesaredefined,theactualfunctionisdefined.Thefirstconditiontestswhether
thesignalCLKFX(thesynthesizedclocksignal)ishighorlow.Itthentestswhetherthedelaybuttonhas
beenpushed.Ifithas,itaddsinthedelaytothesystembycountingupto8million.Theprogramthen
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incrementstheindexnumber“Ix”,andoutputsthesignaltotheDATandLEDSTD_LOGIC_VECTOR
ports.Theprogramalsoresets“Ix”to0ifithasoverflowedthesizeoftheROM.
Part5:UserConstraintsFile[5]
Figure9:UserConstraintsFile[5]
Theuserconstraintsfile(UCF)issimplythefilewheretheactualnetlistisdefined.Thenetlistis
linkstheportnametothephysicalpinsontheboard.Inthiscase,eachbitoftheDATandLEDvectorsis
settoadifferentport.Also,allportsusedinthesoftwarearedefinedhere.Thesepinsettingswere
takenfromdocumentationprovidedbyDigilent.SeeAppendixCforBASYSboardpinsettings.
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b) MATLABProgram[5]
ThesecondpartofthesoftwarethatneedstobeanalyzedistheMATLABwaveformgeneration
program.Thecodeislistedinthefollowingillustration:
Figure10:MATLABProgram[5]
Thefirstandsecondlinesoftheprogramreceiveuserinput.TheprogramasksfortheRangeof
thefunction,whichdeterminesthenumberofpointsgenerated,andtheactualfunctiontobe
evaluated.
Lines3to6manipulatetheevaluateddatapointsintodatausablebytheVHDLprogram.Line3
shiftsallthedatapointsupbythelowestvaluedatapointing,forcingallvaluesgreaterthanorequalto
0.Line4thennormalizesthedatatobebetween0and255.255waschosenbecauseofthe8bit
resolutionoftheDAC.Because2^8=256,novaluesabove255canbeoutputtedusing8bitresolution.
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Line5roundsallnumbersupsothatonlyintegersarepresent.Finally,line6convertstheintegervalues
intobinarynumberstrings.
Line7through12opensandoutputsthedatageneratedintheprevioussteptothefilelocation
thatwillbereadbytheVHDLprogram.Toillustratewhatthefinalfilegeneratedislike,thefollowing
illustrationcontainstheoutputforfunctionsin(x)overrange0to(2*pi),whichisoneperiodofsin(x).
Figure11:Sinewaveformfile[5]
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Finally,thelastlinegeneratesaplotofthedatatoensuretheproperwaveformhasbeen
generated.
Figure12:SineWaveformplot[5]
ThisconcludesthediscussionofthesoftwarecomponentsoftheAWG.Thefollowingsections
willnowdiscussthehardwarecomponents.
3. TheHardware
AnothercrucialelementoftheAWGisitshardwareimplementation.Thehardware
componentsareasfollows:
• DigilentBASYSFPGAevaluationboard
• DigitaltoAnalogconversiondaughterboard
• USBinterfacetoPC
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i. BASYSBoard[5]
TheDigilentBASYSboardisdesignedtotestthefunctionalityoftheSpartan3EFPGA.Itcontains
4connectionheaders,eachofwhichcontain4GPIOpinsaswellapowerandgroundpin.Theboardcan
bepoweredfromeitheranexternalpowersourceorfromtheincludedUSBcable.Theinternallogicand
outputpowerpinsontheboardrunat3.3V.
TheBASYSboardalsofeaturesaconfigurablesystemclock,whichcanbesetto25,50,or100
MHzbysettingajumper.Otherfeaturesthattheboardoffersare:4generalpurposebuttons,8
programmableswitches,aresetbutton,4characterLCD,PS/2connection,VGAoutput,8programmable
LEDs,andpowersourceselection.SeeAppendixCforacompleteillustrationoftheboardanditspin
settings.
Programmingtheboardisatwostepprocess.Firstofall,theFPGAsoftwaremustbe
programmedusingtheXilinxISEasdescribedinprevioussectionsofthispaper.Aftertheprogramhas
beendesignedandcompiledintoa.bitfile,itmustthenbetransferredtotheFPGAviaUSB.This
transferisaccomplishedbyusingtheDigilentAdeptsoftwarepackage.
Figure13:DigilentExport[5]
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TheusermaychoosewhethertoprogramtheFPGAortheROMandbrowsetochoosethe
appropriate.bitfile.NotethatadifferentclocksourcemustbedefinedintheXilinxsoftware,basedon
thelocationtowhichyouareprogramming.Also,theFPGAisvolatileandmustbereprogrammedonce
powerislost.Oncethe.bitfilehasbeenchosen,ProgramChainmustbeselectedandtheprogramwill
beloadedontotheboard.TheVHDLprogramwillthenberun,andthusthewaveformwillbeoutputted
totheGPIOpinschosenintheuserconstraintsfile.
OnemainproblemthatwasencounteredwhenusingthisboardwasthefactthattheGPIOpins
werenotlaidoutforhighspeedoutput.Thus,anoticeablepindelayisdetectedatfastoutput
frequencies.Thefollowingillustrationshowsthis,aswellashighlightingsignallengthjitter:
Figure14:PinDelayandJitter[5]
Theshadedareashighlightallareaswherethesignalgoeshigh.Therefore,thesignalisnot
completelystable.Also,apindelayexistsbetweenthefirstpingoinghighandthelastpingoinghigh.
However,thiscouldnotbeavoidedduetothelayoutoftheboard,andthejitterandpindelayswere
notenoughtocauseseriousproblemsforthisproject.
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ii. DACDaughterboard
TheDACdaughterboardwasdesignedtotaketheoutputdigitalwaveformsignalfromtheGPIO
pinsoftheBASYSboardandconvertitintoananalogoutputsignal.Severaldifferentcomponentshad
tobechosenforthisboard.
a) TheDAC[5]
TheDigitaltoAnalogconvertoristhemostimportantpartoftheDACdaughterboard.Itisthe
componentthatactuallyconvertsthesignalfromdigitaltoanalog,asthenameimplies.Theparticular
DACchosenwasTexasInstruments’DAC908.SomeofthefeaturesofthisparticularDACare:
• 165MS/Ssamplingrate
• Settlingtimeof30ns
• +3Vor+5Voperation
• Paralleldatainput
• Scalabledifferentialcurrentoutput
• Internalorexternalreferencevoltage
ThisDACwaschosenforseveralreasons.The165MS/ssamplingrateensuresthatitcanhandle
thedefault100MHzoutputclockspeedoftheBASYSboard.However,ithasbeentestedtoworkupto
250MHzoverclocked,eventhoughatthesespeeds,reliabilityisreduced.Also,itworksat3.3Vand
thuscanbepoweredfromtheheadervoltageoutputpins.Finally,theparalleldatainterfaceallowsan
entiredatapointofthewaveformtobeinputinonemoreclockcycle.Asanaddedbonus,arbitrary
waveformgenerationisspecificallydesignatedinthedatasheet.
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Figure15:DAC908Pinout[1][5]
b) Op-Amp[5]
AdifferentialamplifierwasrequiredtoamplifythedifferentialcurrentoutputoftheDACto
drive50ohms,aswellasconvertingthesignaltoavoltagesignal.Thechosenop-ampwastheOPA690,
alsomadebyTexasInstrumentsandsuggestedbytheDAC908datasheet.
c) DC-DCConverter[5]
Fortheoperationoftheop-amp,a+/-5Vsupplyisrecommendedfordualrailsetups.
Therefore,aDCtoDCconverterwasneededtoconverttheinputted3.3Vto+/-5V.Theconverter
chosenforthistaskistheMurataNTA0305MC.
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d) RecommendedSetup[5]
TheDAC908datasheetprovidesdetailsonhowtoappropriatelysetuptheDACwitha
differentialOp-Amptoachievethedesiredfunctionality.Therecommendedsetupisillustratedinthe
followingpicture:
Figure16:RecommendedSetup[5][1]
ThedatasheetrecommendstheOPA680.However,thispartisnolongerinproduction.The
OPA690isequivalenttotheOPA680andwaschoseninstead.Theop-ampisconfiguredasadifferential
amplifierwithaclosedloopgainof~2,duetotheratioR2/R1.Also,twoloadresistorshavebeenadded
inparallelwiththeinputimpedanceoftheOPA690tobringtheimpedanceoneachcurrentoutputpin
to25ohms.Ananalysisofthecomponentselectionsareprovidedinthefollowingillustration.
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Figure17:ComponentAnalysis[5]
iii. PrototypeBoard[5]
Followingtherecommendeddesignsettingsfortheboard,thefollowingschematicandlayout
wereproducedforthefirstprototypeboard:
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Figure18:Schematic[5]
Figure19:Layout(PrototypeBoard)[5]
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TheDACdaughterboardwasprototypedusingtheElectricalandComputerEngineering
Department’sautomatedmillingmachine.Thisprototypeboardwasthenpopulatedusingtherequired
components.Thefollowingfigureisaphotographoftheprototypedboard.
Figure20:PrototypeBoard[5]
Aftercorrectingnumerouserrors,theboardwasbroughtuptoaworkingstatus.Thefollowing
figureshowstheoutputfromtheDACDaughterboard(50ohmload):
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Figure21:[email protected](50ΩLoad)
However,duetoboarddesignerrors,theoutputoftheboardwastoonoisytobeuseful.
Therefore,anewboardwasdesignedtoincorporatecorrectionstoimproveboardperformance.
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iv. ProductionBoard
Specificimprovementsthatweremadeovertheprototypeboardare:separateanalogand
digitalvoltagesources,powersupplycapacitanceadded,digitalandanaloggroundplanesadded,and
datalinelengthswerestandardized.Thesechangesandadditionstothelayoutweredonetoreduce
overallsystemnoise.Thefinalproduct,aswellasschematicandlayout,arepicturedbelow:
Figure22:ProductionboardSchematic
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Figure23:ProductionBoardLayout
Figure24:ProductionBoard
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Overall,thisboardperformedmuchbetterthantheprototypeboard.Thesignallackedmuchof
thenoisethatwasfoundintheprototypeboard.Also,duetothefactthatmanycorrectionsweremade
inthelayoutbeforeitwasordered,nocorrectionswerenecessaryontheboardafterpopulation.An
exampleoftheboardoutputispicturedbelow:
Figure25:Productionboardoutput
Ascanbeseen,thissignalismuchcleanerthanthatoutputbytheprototypeboard.
4. BoardPerformance
TheperformanceoftheDACdaughterboardsweremeasuredandanalyzedaftertheproduction
boardwassuccessfullypopulated.Theresultsshowthattheprototypeboarddoesindeedproducea
muchcleaneroutputsignal.Acomparisonoftheprototypevs.productionboardperformanceislisted
below.Forinformationonthespecificmeasurementstaken,seeAppendix.
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Figure26:BoardPerformanceComparison
Tomakethesemeasurements,aSpectrumanalyzerwasused.Specifically,measurementswere
takenofthefollowingpowerlevels:thefundamentalfrequency,thenoisefloor,andthe1stharmonic
frequency.Toseewhytheproductionboardhadanimprovedoutputovertheprototypeboard,the
nextsectionwilldiscusshighspeedboarddesignaspectsthatwereincorporatedintothedesignofthe
productionboard.
5. HighSpeedBoardDesign
Oneofthefirstaspectsofhighspeeddesigntakenintoaccountwiththeproductionboard
designwastominimizesignaltracelength.Thisminimizesthedistancethesignalhadtotravel,thus
preventingnoisefrombeingintroducedintothesignal,aswellaspreventinginductance/capacitance
effectsfromtakingeffectinthetransmissionline.Also,topreventlatencybetweenbitsinthedigital
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bus,allsignaltracesweremaderoughlythesamelength.Thisinsuresthatallbitsofthesignalwillbeat
theDACwhentheclockflips.
Asecondbigconsiderationwhendesigningtheboardwasthecreationofappropriatedigital
andanaloggroundplanes.Thedigitalplanewasplacedbelowalldigitallinesontheboard,andthe
analogplanewaslikewiseplacedbelowtheanalogplanes.Thisminimizescurrentpathsthatthe
differentcurrentflowsmusttake.Also,itpreventsanycouplingbetweenthedifferenttraces,and
removesinterferencebetweendigitalandanalogvoltagesources.Thetwoplaneswereconnected
belowtheDACtoallowacommonground,andbecauseitwasrecommendedinthedatasheet.
Onefinalbigconsiderationintheboarddesignwastheproperseparationofthedigitaland
analogsources.Intheprototypeboard,thevoltagesourcesfortheDACwereconnectedtogether.This
causedinterferenceintheanalogsupplybecausethedigitalsupplywasdraggingthecurrentdown
whenitwasbeingused,causingunstablevoltagelevelsattheanalogsupplypin.Intheproduction
board,thevoltagesourcepinsaresourceddifferently,causinglessnoisyvoltagesupplies.Also,to
furtherstabilizethepowersignals,decouplingcapacitorswereconnectedtothepowertracesasclose
totheICsaspossible.Thisdecouplesthepowersystemandmakesforamoresteadypowersource.
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6. Conclusion
Allinall,theprojectwassuccessful.Afirstgenerationarbitrarywaveformgeneratorwas
created,andperformedreasonablywell.Specificaccomplishmentsvs.projectgoalsarepicturedbelow:
Accomplishments• VHDLProgram
– OutputWaveform– Bufferclock– SynthesizeClock
Frequency• Matlab Program
– GenerateWaveformFile
• DACDaugtherboard– Overclock frequency
200MHz– GoodSignal
Performance
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• VHDLProgramtooutputawaveform
• DACDaugtherboardcapableofatleast100MHzclockspeed
Goals Achieved
Figure27:Accomplishments
Ascanbeseen,allstatedgoalsoftheprojectweresuccessfullycompleted.Inaddition,several
additionalfeatureswereaddedtothesystem,includingtheabilitytoover-clocktheFPGAboardaswell
asaseparateMatlabprogramtogenerateawaveformfileautomatically.
FuturegoalsoftheprojectwillmainlyfocusonimprovingtheDACsamplingrate,aswellas
improvingtheoverallperformanceofthesystem.Also,thereshouldbeanemphasisonimprovinguser
friendlinessforoperatingthesystem,foratthemoment,thesystemhasasteeplearningcurve.
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WorksCited
1. TexasInstruments,“DAC908.pdf”,DAC908DataSheet,October8,2008.
2. TexasInstruments,“OPA690.pdf”,OPA690DataSheet,October8,2008.
3. MurataPowerSolutions,“kdc_nta.pdf”,NTAseriesDC-DCConverterDataSheet,October8,2008.
4. JohnWalter,AdvisingSessions,Fall2008–Spring2009.
5. KyleRomero,FinalReport,Fall2008
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AppendixA:Budget
Budget:Total
Weekly Budget (4/21/2009)Labor Costs
Name Hourly Pay Rate Hours Worked Total PayKyle Romero $20.00 160 $3200.00
Total Labor Cost $3200.00
75% Overhead $2400.00
Total Labor and Overhead $5600.00
Parts CostsPart Name Cost Quantity Total Cost
PCB $33 1 $33PCB Parts $90 1 $90
Total Parts Cost $123
Equipment Rental CostsEquipment Name Purchase Cost Day Rental Rate Days Rented Total Cost
Spartan Eval Board $99 ~$.20 80 $16
Total Rental Costs $16
Budget Total $5736.00
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AppendixB:GanttChart
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AppendixC:BASYSBoardPinOut
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AppendixD:SignalAnalysis
Measurements
27an-02_measuring dynamic specifications.pdf
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AppendixE:WRITTENLABREPORTEVALUATIONFORM
StudentName:KyleRomero
CourseNumber:4334-001
Pleasescorethestudentbycirclingoneoftheresponsesfollowingeachofthestatements.
1)Thestudent'swritingstyle(clarity,directness,grammar,spelling,style,format,etc)
A B C D F Zero
2)Thequalityandleveloftechnicalcontentofthestudent'sreport
A B C D F Zero
3)Thequalityofresultsandconclusions
A B C D F Zero
4)Qualityofmeasurementsplanned/taken
A B C D F Zero
Grade: